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AUIRLR3105TRL

AUIRLR3105TRL

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TO252-3

  • 描述:

    AUTOMOTIVE HEXFET N-CHANNEL

  • 数据手册
  • 价格&库存
AUIRLR3105TRL 数据手册
AUTOMOTIVE GRADE AUIRLR3105   Features  Advanced Planar Technology  Logic-Level Gate Drive  Dynamic dv/dt Rating  Low On-Resistance  175°C Operating Temperature  Fast Switching  Fully Avalanche Rated  Repetitive Avalanche Allowed up to Tjmax  Lead-Free, RoHS Compliant  Automotive Qualified * HEXFET® Power MOSFET D-Pak typ. 30m max. ID 37m 25A D G S D-Pak AUIRLR3105 G Gate D Drain Standard Pack Form Quantity Tube 75 Tape and Reel Left 3000 Package Type AUIRLR3105 55V RDS(on) Description Specifically designed for Automotive applications, this Stripe Planar design of HEXFET® Power MOSFETs utilizes the latest processing techniques to achieve low on-resistance per silicon area. This benefit combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in Automotive and a wide variety of other applications. Base part number VDSS   S Source Orderable Part Number AUIRLR3105 AUIRLR3105TRL Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 25 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 18 A IDM PD @TC = 25°C Pulsed Drain Current  Maximum Power Dissipation 100 57 W VGS EAS EAS (Tested) IAR EAR dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited)  Single Pulse Avalanche Energy Tested Value  Avalanche Current  Repetitive Avalanche Energy  Peak Diode Recovery dv/dt  Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance   Symbol RJC RJA RJA Parameter Junction-to-Case  Junction-to-Ambient ( PCB Mount)  Junction-to-Ambient Max. Units 0.38 ± 16 61 94 See Fig.15,16, 12a, 12b 3.4 -55 to + 175 W/°C V mJ A mJ V/ns °C   300 Typ. Max. Units ––– ––– ––– 2.65 50 110 °C/W HEXFET® is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-12-11 AUIRLR3105   Static @ TJ = 25°C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Trans conductance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 55 ––– ––– V VGS = 0V, ID = 250µA ––– 0.056 ––– V/°C Reference to 25°C, ID = 1mA ––– 30 37 VGS = 10V, ID = 15A  m ––– 35 43 VGS = 5.0V, ID = 13A  1.0 ––– 3.0 V VDS = VGS, ID = 250µA 15 ––– ––– S VDS = 25V, ID = 15A  ––– ––– 20 VDS = 55V, VGS = 0V µA ––– ––– 250 VDS = 44V,VGS = 0V,TJ =150°C ––– ––– 200 VGS = 16V nA ––– ––– -200 VGS = -16V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 8.0 57 25 37 20 5.6 9.0 ––– ––– ––– ––– LD Internal Drain Inductance ––– 4.5 ––– LS Internal Source Inductance ––– 7.5 ––– ––– ––– ––– ––– ––– ––– 710 150 28 890 110 210 ––– ––– ––– ––– ––– ––– Min. Typ. Max. Units ––– ––– 25 ––– ––– 100 ––– ––– ––– ––– 52 82 1.3 78 120 Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Output Capacitance Coss Coss eff. Effective Output Capacitance Diode Characteristics   Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge ton Forward Turn-On Time ID = 15A nC   VDS = 44V VGS = 5.0V, See Fig.6 & 13  VDD = 28V ID = 15A ns RG = 24 RD = 5.0, See Fig. 18  Between lead, 6mm (0.25in.) nH   from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 5 pF   VGS = 0V, VDS = 1.0V ƒ = 1.0MHz VGS = 0V, VDS = 44V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 44V Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25°C,IS = 15A, VGS = 0V  ns TJ = 25°C ,IF = 15A, VDD = 28V nC di/dt = 100A/µs  Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)  Limited by TJmax , starting TJ = 25°C, L = 0.55mH, RG = 25, IAS = 15A, VGS =10V. ISD 25A, di/dt 290A/µs, VDD V(BR)DSS, TJ  175°C.  Pulse width 300µs; duty cycle  2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population, starting 100% tested to this value in production.  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ approximately 90°C. 2 2015-12-11 AUIRLR3105   1000 100 VGS 15V 10V 5.0V 3.0V 2.7V 2.5V 2.25V BOTTOM 2.0V VGS 15V 10V 5.0V 3.0V 2.7V 2.5V 2.25V BOTTOM 2.0V 100 10 TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 1 0.1 2.0V 0.01 0.1 1 20µs PULSE WIDTH Tj = 25°C 10 10 2.0V 1 20µs PULSE WIDTH Tj = 175°C 0.1 100 0.1 VDS, Drain-to-Source Voltage (V) 1 10 100 VDS, Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics Fig. 1 Typical Output Characteristics 30 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current A) 1000.00 T J = 25°C 100.00 T J = 175°C 10.00 1.00 0.10 VDS = 25V 20µs PULSE WIDTH 0.01 2.0 4.0 6.0 20 T J = 25°C 15 10 5 VDS = 25V 20µs PULSE WIDTH 0 0 8.0 VGS , Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 T J = 175°C 25 10 20 30 40 ID, Drain-to-Source Current (A) Fig. 4 Typical Forward Trans conductance Vs. Drain Current 2015-12-11 AUIRLR3105   1600 ID= 15A SHORTED VGS , Gate-to-Source Voltage (V) Coss 1200 C, Capacitance (pF) 20 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds Crss = Cgd = Cds + Cgd Ciss 800 Coss 400 Crss VDS = 44V VDS= 28V VDS= 11V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 0 1 10 0 100 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage T J = 175°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 10.0 1.0 T J = 25°C VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 20 30 40 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 100.0 1.6 VSD, Source-toDrain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage   4 10 Q G Total Gate Charge (nC) 100 10 100µsec 1msec 1 0.1 1.8 OPERATION IN THIS AREA LIMITED BY RDS (on) 10msec Tc = 25°C Tj = 175°C Single Pulse 1 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area 2015-12-11 AUIRLR3105   3.0 25 2.5 I D , Drain Current (A) 20 15 10 5 0 25 50 75 100 125 150 175 I D = 25A 2.0 (Normalized) RDS(on) , Drain-to-Source On Resistance 30 1.5 1.0 0.5 V GS = 10V 0.0 -60 -40 TC , Case Temperature ( °C) -20 0 20 40 60 80 TJ , Junction Temperature Fig 9. Maximum Drain Current Vs. Case Temperature 100 120 140 160 180 ( ° C) Fig 10. Normalized On-Resistance Vs. Temperature (Z thJC ) 10 D = 0.50 1 Thermal Response 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 t1/ t 2 J = P DM x Z thJC +T C 0.01 0.1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2015-12-11 AUIRLR3105   15V 100 TOP + V - DD IAS 20V EAS , Single Pulse Avalanche Energy (mJ) 80 D.U.T RG A 0.01 tp ID 6.1A 11A 15A DRIVER L VDS Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp BOTTOM 60 40 20 0 25 50 75 100 125 150 175 ( ° C) Starting Tj, Junction Temperature Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms 2.0 Id Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 13a. Gate Charge Waveform VGS(th) Gate threshold Voltage (V) Vds ID = 250µA 1.5 1.0 0.5 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) Fig 14. Threshold Voltage Vs. Temperature Fig 13b. Gate Charge Test Circuit   6 2015-12-11 AUIRLR3105   1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming  Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 0.01 10 0.05 0.10 1 0.1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs. Pulse width Notes on Repetitive Avalanche Curves , Figures 15, 16: 70 TOP Single Pulse BOTTOM 50% Duty Cycle ID = 15A EAR , Avalanche Energy (mJ) 60 (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 50 40 30 20 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 10 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (°C) 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] Fig 16. Maximum Avalanche Energy Vs. Temperature 7 EAS (AR) = PD (ave)·tav 2015-12-11 AUIRLR3105   Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Fig 18a. Switching Time Test Circuit   8 Fig 18b. Switching Time Waveforms 2015-12-11 AUIRLR3105   D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number AULR3105 YWWA IR Logo XX  Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2015-12-11 AUIRLR3105   D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 2015-12-11 AUIRLR3105   Qualification Information Qualification Level Moisture Sensitivity Level   Machine Model ESD Human Body Model   Charged Device Model RoHS Compliant Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL1 Class M2 (+/- 200V)† AEC-Q101-002 Class H1A (+/- 500V) † AEC-Q101-001 Class C5 (+/-2000V)† AEC-Q101-005 Yes † Highest passing voltage. Revision History Date 12/11/2015 Comments   Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.   11 2015-12-11
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