BSC040N10NS5SCATMA1

BSC040N10NS5SC MOSFET OptiMOSTM5Power-Transistor,100V PG-WSON-8-2 Features •Doublesidedcooledpackage-withlowestJunction-topthermalresistance •175°Crated •OptimizedforhighperformanceSMPS,e.g.sync.rec. •100%avalanchetested •Superiorthermalresistance •N-channel •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 tab 5 4 3 2 Gate Pin 4 Table1KeyPerformanceParameters Unit VDS 100 V RDS(on),max 4.0 mΩ ID 140 A Qoss 75 nC QG(0V..10V) 58 nC Type/OrderingCode Package BSC040N10NS5SC PG-WSON-8-2 Final Data Sheet 8 Drain Pin 5-8 FullyqualifiedaccordingtoJEDECforIndustrialApplications Value 7 1 Productvalidation Parameter 6 Source Pin 1-3, tab Marking 040N10SC 1 RelatedLinks - Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 140 99 18 A VGS=10V,TC=25°C1) VGS=10V,TC=100°C VGS=10V,TC=25°C,RthJA=50K/W2) - 560 A TC=25°C - - 268 mJ ID=50A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 167 3.0 W TC=25°C TA=25°C,RthJA=50K/W3) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current3) ID,pulse - Avalanche energy, single pulse4) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Values Min. Typ. Max. RthJC - 0.5 0.9 K/W - Thermal resistance, junction - case, top RthJC - 0.4 0.86 K/W - Device on PCB, 6 cm2 cooling area2) RthJA - - 50 K/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature at 25°C. For higher Tcase please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3.0 3.8 V VDS=VGS,ID=95µA - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 3.4 4.0 4.0 5.6 mΩ VGS=10V,ID=50A VGS=6V,ID=25A Gate resistance RG - 1.3 2.0 Ω - Transconductance gfs 60 120 - S |VDS|>2|ID|RDS(on)max,ID=50A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 4100 5300 pF VGS=0V,VDS=50V,f=1MHz Coss - 630 820 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 28 49 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 13 - ns VDD=50V,VGS=10V,ID=50A, RG,ext=3Ω Rise time tr - 9 - ns VDD=50V,VGS=10V,ID=50A, RG,ext=3Ω Turn-off delay time td(off) - 32 - ns VDD=50V,VGS=10V,ID=50A, RG,ext=3Ω Fall time tf - 10 - ns VDD=50V,VGS=10V,ID=50A, RG,ext=3Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 19 - nC VDD=50V,ID=50A,VGS=0to10V Qg(th) - 12 - nC VDD=50V,ID=50A,VGS=0to10V Gate to drain charge Qgd - 12 18 nC VDD=50V,ID=50A,VGS=0to10V Switching charge Qsw - 18 - nC VDD=50V,ID=50A,VGS=0to10V Gate charge total Qg - 58 72 nC VDD=50V,ID=50A,VGS=0to10V Gate plateau voltage Vplateau - 4.6 - V VDD=50V,ID=50A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 50 - nC VDS=0.1V,VGS=0to10V Qoss - 75 100 nC VDD=50V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 152 A TC=25°C - 560 A TC=25°C - 0.9 1.1 V VGS=0V,IF=50A,Tj=25°C trr - 54 108 ns VR=50V,IF=IS,diF/dt=100A/µs Qrr - 90 180 nC VR=50V,IF=IS,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 175 160 140 150 120 125 ID[A] Ptot[W] 100 100 80 75 60 50 40 25 0 20 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 100 10 1 µs 0.5 10 µs 102 100 µs 0.2 1 ID[A] 10 ZthJC[K/W] 1 ms 10 ms 100 DC 0.1 10-1 0.05 0.02 0.01 10-1 single pulse 10-2 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 400 8 7V 5V 10 V 360 7 6V 320 5.5 V 6 280 6V ID[A] 240 5.5 V 200 160 RDS(on)[mΩ] 5 7V 4 10 V 3 120 5V 2 80 1 40 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 5.0 0 50 100 150 VDS[V] 200 250 300 350 400 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 600 200 175 500 150 400 gfs[S] ID[A] 125 300 100 75 200 50 100 25 175 °C 0 0 1 2 3 25 °C 4 5 6 7 0 0 25 VGS[V] 75 100 125 ID[A] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 50 gfs=f(ID),VDS=5V,Tj=25°C 7 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 2.4 4 2.0 1.6 95 µA VGS(th)[V] RDS(on)(normalizedto25°C) 950 µA 3 1.2 2 0.8 1 0.4 0.0 -80 -40 0 40 80 120 160 0 -60 200 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj),ID=50A,VGS=10V VGS(th)=f(Tj);VGS=VDS Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss Coss 3 102 IF[A] C[pF] 10 102 101 Crss 101 0 20 40 60 80 100 100 0.0 VDS[V] 1.0 1.5 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.5 IF=f(VSD);parameter:Tj 8 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 9 25 °C 8 50 V 7 100 °C 20 V 80 V VGS[V] IAV[A] 6 101 5 4 150 °C 3 2 1 100 100 101 102 103 tAV[µs] 0 0 10 20 30 40 50 60 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=50Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 108 106 VBR(DSS)[V] 104 102 100 98 96 94 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC 5PackageOutlines DIMENSION A A1 b c D D1 D2 E E1 E2 e L1 L2 aaa ddd DOCUMENT NO. Z8B00184589 MILLIMETERS MIN. MAX. 0.75 0.05 0.35 0.45 0.203 4.95 5.05 4.11 4.31 3.03 5.95 6.05 3.66 3.86 4.11 1.27 0.675 0.775 0.625 0.825 0.05 0.10 REVISION 03 SCALE 10:1 0 1 2mm EUROPEAN PROJECTION ISSUE DATE 03.06.2019 Figure1OutlinePG-WSON-8-2,dimensionsinmm Final Data Sheet 10 Rev.2.0,2019-11-19 OptiMOSTM5Power-Transistor,100V BSC040N10NS5SC RevisionHistory BSC040N10NS5SC Revision:2019-11-19,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-11-19 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2019InfineonTechnologiesAG AllRightsReserved. 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Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.0,2019-11-19