BSC117N08NS5

BSC117N08NS5 MOSFET OptiMOSTM5Power-Transistor,80V SuperSO8 8 Features •OptimizedforhighperformanceSMPS,e.g.sync.rec. •100%avalanchetested •Superiorthermalresistance •N-channel •QualifiedaccordingtoJEDEC1)fortargetapplications •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 7 5 6 4 1 2 3 6 5 3 2 4 7 8 1 Table1KeyPerformanceParameters Parameter Value Unit S1 8D VDS 80 V S2 7D RDS(on),max 11.7 mΩ S3 6D ID 49 A G4 5D Qoss 19 nC QG(0V..10V) 15 nC Type/OrderingCode Package BSC117N08NS5 PG-TDSON-8 1) Marking 117N08NS RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Final Data Sheet 2 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 1Maximumratings atTj=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 49 31 19 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TC=25°C,RthJA=50K/W1) - 196 A TC=25°C - - 14 mJ ID=50A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 50 2.5 W TC=25°C TA=25°C,RthJA=50K/W1) Operating and storage temperature Tj,Tstg -55 - 150 °C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse3) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Values Min. Typ. Max. RthJC - 1.5 2.5 K/W - Thermal resistance, junction - case, top RthJC - - 20 K/W - Device on PCB, 6 cm2 cooling area1) RthJA - - 50 K/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See figure 3 for more detailed information 3) See figure 13 for more detailed information Final Data Sheet 3 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.8 V VDS=VGS,ID=22µA - 0.1 10 1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 9.6 13.7 11.7 16.3 mΩ VGS=10V,ID=25A VGS=6V,ID=12.5A Gate resistance1) RG - 1.1 1.7 Ω - Transconductance gfs 19 38 - S |VDS|>2|ID|RDS(on)max,ID=25A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 80 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Values Min. Typ. Max. Ciss - 1000 1300 pF VGS=0V,VDS=40V,f=1MHz Coss - 180 230 pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance Crss - 11 19 pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 10 - ns VDD=40V,VGS=10V,ID=25A, RG,ext=3Ω Rise time tr - 4 - ns VDD=40V,VGS=10V,ID=25A, RG,ext=3Ω Turn-off delay time td(off) - 16 - ns VDD=40V,VGS=10V,ID=25A, RG,ext=3Ω Fall time tf - 3 - ns VDD=40V,VGS=10V,ID=25A, RG,ext=3Ω Unit Note/TestCondition Input capacitance1) 1) Output capacitance 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 5 - nC VDD=40V,ID=25A,VGS=0to10V Qg(th) - 3 - nC VDD=40V,ID=25A,VGS=0to10V Gate to drain charge Qgd - 3 5 nC VDD=40V,ID=25A,VGS=0to10V Switching charge Qsw - 6 - nC VDD=40V,ID=25A,VGS=0to10V Gate charge total Qg - 15 18 nC VDD=40V,ID=25A,VGS=0to10V Gate plateau voltage Vplateau - 5.0 - V VDD=40V,ID=25A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 13 - nC VDS=0.1V,VGS=0to10V Qoss - 19 25 nC VDD=40V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 45 A TC=25°C - 196 A TC=25°C - 0.9 1.1 V VGS=0V,IF=25A,Tj=25°C trr - 37 73 ns VR=40V,IF=25A,diF/dt=100A/µs Qrr - 45 90 nC VR=40V,IF=25A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 4Electricalcharacteristicsdiagrams Diagram2:Draincurrent 60 60 50 50 40 40 ID[A] Ptot[W] Diagram1:Powerdissipation 30 30 20 20 10 10 0 0 25 50 75 100 125 150 0 175 0 25 50 75 TC[°C] 100 125 150 175 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 1 µs 102 0.5 100 100 µs 101 0.2 ZthJC[K/W] ID[A] 10 µs 1 ms 0.1 0.05 0.02 10 ms 10-1 0.01 DC 100 single pulse 10-1 10-1 100 101 102 10-2 10-6 10-5 VDS[V] 10-3 10-2 10-1 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-4 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 320 22 5 V 5.5 V 20 280 6V 7V 18 240 10 V 16 14 RDS(on)[mΩ] ID[A] 200 160 7V 120 10 V 12 10 8 6 80 6V 4 5.5 V 40 2 5V 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 4.0 0 50 100 VDS[V] 150 200 250 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 120 100 100 80 80 gfs[S] ID[A] 60 60 40 40 20 20 150 °C 0 0 2 25 °C 4 6 8 10 0 0 20 VGS[V] 60 80 100 120 140 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 40 gfs=f(ID);Tj=25°C 7 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 20 4 18 220 µA 16 3 max 22 µA 12 VGS(th)[V] RDS(on)[mΩ] 14 typ 10 8 2 6 1 4 2 0 -60 -20 20 60 100 140 0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=25A;VGS=10V VGS(th)=f(Tj);VGS=VDS Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 150 °C 25 °C, max 150 °C, max 103 Ciss IF[A] C[pF] 102 Coss 102 101 101 Crss 100 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 9 40 V 8 7 64 V 16 V 101 VGS[V] IAV[A] 6 25 °C 5 4 100 °C 3 2 125 °C 100 100 101 1 102 103 tAV[µs] 0 0 5 10 15 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=25Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 86 84 VBR(DSS)[V] 82 80 78 76 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 5PackageOutlines DOCUMENT NO. Z8B00003332 REVISION 07 DIMENSION A A1 b D D1 D2 E E1 E2 e L M MILLIMETERS MIN. MAX. 0.90 1.20 0.15 0.35 0.34 0.54 4.80 5.35 3.90 4.40 0.03 0.23 5.70 6.10 5.90 6.42 3.88 4.31 1.27 0.45 0.71 0.45 0.69 SCALE 10:1 0 1 2 3mm EUROPEAN PROJECTION ISSUE DATE 06.06.2019 Figure1OutlinePG-TDSON-8,dimensionsinmm Final Data Sheet 10 Rev.2.1,2020-02-07 OptiMOSTM5Power-Transistor,80V BSC117N08NS5 PG-TDSON-8: RecommenGHd BoDrdpads & Apertures 1.905 1.905 1.27 3x 0.6 1.27 3x copper Figure 2 Final Data Sheet 1.6 0.2 1.27 3x 0.825 2.863 0.5 0.925 2.863 1.27 3x 1.905 0.875 1.5 0.75 0.2 2.9 4.455 3.325 0.8 0.5 1.5 0.4 1.905 stencil apertures solder mask all dimensions in mm Outline Boardpads (TDSON-8), dimensions in mm 11 Rev.2.1,2020-02-07 OptiMOS TM5 Power-Transistor , 80 V BSC117N08NS5 Dimension in mm Figure 3 Final Data Sheet Outline Tape (TDSON-8) 12 Rev. 2.1, 2020-02-07 OptiMOS TM5 Power-Transistor , 80 V BSC117N08NS5 Revision History BSC117N08NS5 Revision: 2020-02-07, Rev. 2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-12-17 Release of final version 2.1 2020-02-07 Update package drawings Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG 81726 München, Germany © 2020 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Final Data Sheet 13 Rev. 2.1, 2020-02-07