BSC120N12LSGATMA1

BSC120N12LS MOSFET OptiMOSTM2Power-Transistor,120V SuperSO8 8 Features •N-channel,logiclevel •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •150°Coperatingtemperature •Pb-freeleadplating;RoHScompliant •Idealforhigh-frequencyswitchingandsynchronousrectification •Halogen-freeaccordingtoIEC61249-2-21 7 5 6 4 1 2 3 6 5 3 2 4 7 8 1 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Table1KeyPerformanceParameters S1 8D S2 7D Parameter Value Unit S3 6D VDS 120 V G4 5D RDS(on),max 12 mΩ ID 68 A Qoss 51 nC QG(0V..10V) 51 nC Type/OrderingCode Package BSC120N12LS PG-TDSON-8 Final Data Sheet Marking 120N12LS 1 RelatedLinks - Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Final Data Sheet 2 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 68 53 10 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=4.5V,TA=25°C, RTHJA=45°C/W1) - 274 A TA=25°C - - 155 mJ ID=50A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 114 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 150 °C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Continuous drain current Pulsed drain current2) 3) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Thermal resistance, junction - case, top Values Min. Typ. Max. RthJC - 0.64 1.1 °C/W - RthJC - - 18 °C/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 °C/W - Thermal resistance, juntion - ambient, 6 cm² cooling area2) - - 45 °C/W - RthJA 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 1.85 2.4 V VDS=VGS,ID=72µA - 0.01 10 1 100 µA VDS=120V,VGS=0V,Tj=25°C VDS=120V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 9.8 11.7 12.0 14.2 mΩ VGS=10V,ID=34A VGS=4.5V,ID=17A Gate resistance1) RG - 0.7 - Ω - Transconductance gfs 42 81 - S |VDS|≥2|ID|RDS(on)max,ID=34A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 120 - Gate threshold voltage VGS(th) 1.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 3700 4900 pF VGS=0V,VDS=60V,f=1MHz Coss - 380 495 pF VGS=0V,VDS=60V,f=1MHz Reverse transfer capacitance Crss - 19 25 pF VGS=0V,VDS=60V,f=1MHz Turn-on delay time td(on) - 8 - ns VDD=60V,VGS=10V,ID=17A, RG,ext=1.6Ω Rise time tr - 5 - ns VDD=60V,VGS=10V,ID=17A, RG,ext=1.6Ω Turn-off delay time td(off) - 22 - ns VDD=60V,VGS=10V,ID=17A, RG,ext=1.6Ω Fall time tf - 6 - ns VDD=60V,VGS=10V,ID=17A, RG,ext=1.6Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 11.4 - nC VDD=60V,ID=17A,VGS=0to10V Gate to drain charge1) Qgd - 8.4 - nC VDD=60V,ID=17A,VGS=0to10V Switching charge Qsw - 13.1 - nC VDD=60V,ID=17A,VGS=0to10V Gate charge total Qg - 51 - nC VDD=60V,ID=17A,VGS=0to10V Gate plateau voltage Vplateau - 3.1 - V VDD=60V,ID=17A,VGS=0to10V Qoss - 51 - nC VDS=60V,VGS=0V 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 79 A TC=25°C - 274 A TC=25°C - 0.87 1.2 V VGS=0V,IF=34A,Tj=25°C trr - 85 - ns VR=60V,IF=17A,diF/dt=100A/µs Qrr - 220 - nC VR=60V,IF=17A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 120 70 60 100 50 40 ID[A] Ptot[W] 80 60 30 40 20 20 0 10 0 20 40 60 80 100 120 140 0 160 0 20 40 60 TC[°C] 80 100 120 140 160 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 2 10 10 µs 100 100 µs ZthJC[K/W] ID[A] 101 1 ms DC 100 10 ms 10-1 10-1 10-2 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS Diagram5:Typ.outputcharacteristics 300 Diagram6:Typ.drain-sourceonresistance 30 10 V 5V 250 3V 25 3.5 V 4V 20 ID[A] 4.5 V 150 100 RDS(on)[mΩ] 200 15 4.5 V 5V 10 4V 50 10 V 5 3.5 V 0 3V 2.8 V 0 1 2 3 4 0 5 0 25 50 75 VDS[V] 100 125 150 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 280 30 25 °C 240 25 200 20 150 °C ID[A] RDS(on)[mΩ] 160 120 150 °C 15 10 25 °C 80 5 40 0 0 1 2 3 4 5 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=50A;parameter:Tj 7 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS Diagram10:Typ.gatethresholdvoltage 2.4 2.4 2.0 2.0 1.6 1.6 720 µA VGS(th)[V] RDS(on)(normalizedto25°C) Diagram9:Normalizeddrain-sourceonresistance 1.2 1.2 72 µA 0.8 0.8 0.4 0.4 0.0 -80 -40 0 40 80 120 0.0 -80 160 -40 0 Tj[°C] 40 80 120 160 Tj[°C] RDS(on)=f(Tj),ID=50A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 150 °C 150 °C, max Ciss 102 IF[A] C[pF] 103 Coss 102 101 101 Crss 0 20 40 60 80 100 120 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 24 V 60 V 96 V 8 101 25 °C 6 VGS[V] IAV[A] 100 °C 4 0 10 125 °C 2 10-1 100 101 102 103 tAV[µs] 0 0 10 20 30 40 50 60 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=25Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 131 129 127 VBR(DSS)[V] 125 123 121 119 117 115 113 -80 -40 0 40 80 120 160 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS 5PackageOutlines   Figure1OutlinePG-TDSON-8,dimensionsinmm Final Data Sheet 10 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS Dimension in mm Figure2OutlineTape(TDSON-8) Final Data Sheet 11 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS   Figure3OutlineFootprint(TDSON-8) Final Data Sheet 12 Rev.2.0,2019-11-25 OptiMOSTM2Power-Transistor,120V BSC120N12LS RevisionHistory BSC120N12LS Revision:2019-11-25,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-11-25 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 13 Rev.2.0,2019-11-25