BSO080P03SHXUMA1

BSO080P03S H OptiMOS™-P Power-Transistor Product Summary Features V DS -30 V • P-Channel R DS(on),max 8 m: • Enhancement mode ID -14.9 A • Logic level • 150°C operating temperature PG-DSO-8 • Qualified according JEDEC for target applications • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type Package Marking lead free Halogen free packing BSO080P03S H P-DSO-8 080P3S Yes Yes dry Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Value Symbol Conditions ID Unit 10 secs steady state T A=25 °C1) -14.9 -12.6 T A=70 °C1) -11.9 -10 A Pulsed drain current I D,pulse T A=25 °C2) -60 Avalanche energy, single pulse E AS I D=-14.9 A, R GS=25 : 248 mJ Gate source voltage V GS ±25 V Power dissipation P tot Operating and storage temperature T j, T stg ESD class T A=25 °C1) 1.79 -55 ... 150 W °C JESD22-A114 HBM 260 Soldering temperature 55/150/56 IEC climatic category; DIN IEC 68-1 Rev. 1.31 2.5 page 1 2010-02-10 BSO080P03S H Parameter Values Symbol Conditions Unit min. typ. max. - - 35 minimal footprint, t p 10 s - - 110 minimal footprint, steady state - - 150 6 cm2 cooling area1), t p 10 s - - 50 6 cm2 cooling area1), steady state - - 70 Thermal characteristics Thermal resistance, junction - soldering point R thJS Thermal resistance, junction - ambient R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=-250PA -30 - - Gate threshold voltage V GS(th) V DS=V GS, I D=-250 μA -1 -1.5 -2.2 Zero gate voltage drain current I DSS V DS=-30 V, V GS=0 V, T j=25 °C - -0.1 -1 V DS=-30 V, V GS=0 V, T j=150 °C - -10 -100 Gate-source leakage current I GSS V GS=-25 V, V DS=0 V - - -100 Drain-source on-state resistance R DS(on) V GS=-10 V, I D=-14.9 A - 6.7 8.0 Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=-14.9 A 22 43 - V μA nA S 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.31 page 2 2010-02-10 BSO080P03S H Parameter Values Symbol Conditions Unit min. typ. max. - 4430 5890 - 1180 1570 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=-25 V, f =1 MHz Output capacitance C oss Reverse transfer capacitance C rss - 970 1500 Turn-on delay time t d(on) - 15 23 Rise time tr - 22 33 Turn-off delay time t d(off) - 130 195 Fall time tf - 110 165 Gate to source charge Q gs - -11 -15 Gate charge at threshold Q g(th) - -7.1 -9.5 Gate to drain charge Q gd - -35 Switching charge Q sw - -40 -59 Gate charge total Qg - -102 -136 Gate plateau voltage V plateau - -2.5 - Output charge Q oss - -36 -48 - - -2.1 - - -60 V DD=-15 V, V GS=-10 V, I D=-1 A, R G=6 : pF ns Gate Charge Characteristics 3) V DD=-24 V, I D=-14.9 A, V GS=0 to -10 V V DD=-15 V, V GS=0 V nC V Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=-14.9 A, T j=25 °C - -0.82 -1.2 V Reverse recovery time t rr V R=15 V, I F=-14.9A, di F/dt =100 A/μs - 32 40 ns Reverse recovery charge Q rr - -20 -25 nC 2) 3) T A=25 °C A See figure 3 See figure 16 for gate charge parameter definition Rev. 1.31 page 3 2010-02-10 BSO080P03S H 1 Power dissipation 2 Drain current P tot=f(T A); t p 10 s I D=f(T A); |V GS| 10 V; t p 10 s 16 3 2.5 12 -I D [A] P tot [W] 2 1.5 8 1 4 0.5 0 0 0 40 80 120 0 160 40 80 T A [°C] 120 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T A=25 °C1); D =0 Z thJS=f(t p) parameter: t p parameter: D =t p/T 102 160 T A [°C] 102 100 100 10 μs 1 μs 100 μs 101 10 0.5 101 1 ms limited by on-state resistance 0.2 10 0.1 0.05 100 10-1 Z thJS [K/W] -I D [A] 10 ms 1 0.02 100 0.01 10-1 0.1 1 0.1 DC single pulse 10-2 0.1 10 Rev. 1.31 10-2 0.01 1 -1 10 10 0 -V DS [V] 10 100 1 10 2 page 4 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10-5 10-4 10-3 10-2 10-1 100 t p [s] 10 101 2010-02-10 BSO080P03S H 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 25 60 -10 V -3.5 V -4.5 V 2.5 3.0 2.7 -3.2 V 50 20 3.2 40 R DS(on) [m:] -I D [A] -3 V 30 15 3.5 10 4.5 -2.7 V 20 10 5 -2.5 V 10 -2.3 V 0 0 0 1 2 0 3 10 20 -V DS [V] 30 40 -I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 60 60 50 40 g fs [S] -I D [A] 40 30 20 20 C °150 10 C °25 0 0 0 1 2 3 4 Rev. 1.31 0 10 20 30 -I D [A] -V GS [V] page 5 2010-02-10 BSO080P03S H 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=-14.9 A; V GS=-10 V V GS(th)=f(T j); V GS=V DS; I D=-250 PA 2.5 12 10 2 max. 98 % -V GS(th) [V] R DS(on) [m:] 8 typ. 6 1.5 typ. min. 1 4 0.5 2 0 0 -60 -20 20 60 100 140 -60 180 -20 20 T j [°C] 60 100 140 180 T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 100 10000 25 °C, typ 150 °C, typ Ciss 150 °C, 98% 10 25 °C, 98% 103 I F [A] C [pF] Coss Crss 1000 1 102 0.1 100 0 5 10 15 20 25 30 Rev. 1.31 0 0.5 1 1.5 -V SD [V] -V DS [V] page 6 2010-02-10 BSO080P03S H 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 : V GS=f(Q gate); I D=-14.9 A pulsed parameter: T j(start) parameter: V DD 100 10 9 8 6 15 24 7 10 6 -V GS [V] -I AV [A] 25 100 125 5 4 3 2 1 1 0 1 10 100 1000 0 20 40 60 80 100 -Q gate [nC] t AV [μs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=-250 PA 36 V GS 34 Qg 32 -V BR(DSS) [V] 30 28 V g s(th) 26 24 Q g(th) 22 Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 1.31 page 7 2010-02-10 BSO080P03S H Package Outline P-DSO-8: Outline Rev. 1.31 page 8 2010-02-10 BSO080P03S H Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.31 page 9 2010-02-10