IPB100N04S4-H2

IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 OptiMOS®-T2 Power-Transistor Product Summary V DS 40 V R DS(on),max (SMD version) 2.4 mW ID 100 A Features PG-TO263-3-2 • N-channel - Enhancement mode PG-TO262-3-1 PG-TO220-3-1 • AEC qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green Product (RoHS compliant) • 100% Avalanche tested Type Package Marking IPB100N04S4-H2 PG-TO263-3-2 4N04H2 IPI100N04S4-H2 PG-TO262-3-1 4N04H2 IPP100N04S4-H2 PG-TO220-3-1 4N04H2 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current1) ID Conditions Value T C=25°C, V GS=10V 100 T C=100°C, V GS=10V2) 100 Unit A Pulsed drain current2) I D,pulse T C=25°C 400 Avalanche energy, single pulse2) E AS I D=50A 280 mJ Avalanche current, single pulse I AS - 100 A Gate source voltage V GS - ±20 V Power dissipation P tot T C=25°C 115 W Operating and storage temperature T j, T stg - -55 ... +175 °C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Rev. 1.0 page 1 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 1.3 Thermal resistance, junction ambient, leaded R thJA - - - 62 SMD version, device on PCB R thJA minimal footprint - - 62 6 cm2 cooling area3) - - 40 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0V, I D= 1mA 40 - - Gate threshold voltage V GS(th) V DS=V GS, I D=70µA 2.0 3.0 4.0 Zero gate voltage drain current I DSS V DS=40V, V GS=0V - 0.03 1 T j=85°C2) - 1 20 V DS=18V, V GS=0V, V µA Gate-source leakage current I GSS V GS=20V, V DS=0V - - 100 nA Drain-source on-state resistance R DS(on) V GS=10V, I D=100A - 2.4 2.7 mW V GS=10V, I D=100A, SMD version - 2.1 2.4 Rev. 1.0 page 2 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 Parameter Symbol Values Conditions Unit min. typ. max. - 5520 7180 - 1250 1750 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 42 97 Turn-on delay time t d(on) - 18 - Rise time tr - 13 - Turn-off delay time t d(off) - 19 - Fall time tf - 21 - Gate to source charge Q gs - 32 42 Gate to drain charge Q gd - 10 23 Gate charge total Qg - 70 90 Gate plateau voltage V plateau - 5.5 - V - - 100 A - - 400 V GS=0V, V DS=25V, f =1MHz V DD=20V, V GS=10V, I D=100A, R G=3.5W pF ns Gate Charge Characteristics2) V DD=32V, I D=100A, V GS=0 to 10V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD V GS=0V, I F=100A, T j=25°C - 0.9 1.3 V Reverse recovery time2) t rr V R=20V, I F=50A, di F/dt =100A/µs - 48 - ns Reverse recovery charge2) Q rr - 54 - nC T C=25°C 1) Current is limited by bondwire; with an R thJC = 1.3K/W the chip is able to carry 172A at 25°C. 2) Defined by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS ≥ 6 V; SMD 125 120 100 100 80 I D [A] P tot [W] 75 60 50 40 25 20 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0; SMD Z thJC = f(t p) parameter: t p parameter: D =t p/T 101 1000 1 µs 100 10 µs 0.5 100 Z thJC [K/W] I D [A] 100 µs 1 ms 0.1 10-1 0.05 0.01 10 10-2 single pulse 10-3 1 0.1 1 10 100 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.0 10-6 page 4 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C; SMD R DS(on) = f(I D); T j = 25 °C; SMD parameter: V GS parameter: V GS 400 7V 10 V 9 350 5.5 V 6V 6.5 V 300 7 6.5 V R DS(on) [mW] I D [A] 250 200 6V 5 150 7V 100 5.5 V 3 10 V 50 0 1 0 1 2 3 4 0 100 V DS [V] 200 300 I D [A] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 100 A; V GS = 10 V; SMD parameter: T j 400 4 350 3.5 300 3 R DS(on) [mW] I D [A] 250 200 150 2.5 2 100 175 °C 1.5 50 25 °C -55 °C 0 3 4 5 6 7 V GS [V] Rev. 1.0 1 -60 -20 20 60 100 140 180 T j [°C] page 5 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 4 Ciss 3.5 3 C [pF] V GS(th) [V] Coss 350 µA 103 70 µA 2.5 102 Crss 2 101 1.5 -60 -20 20 60 100 140 0 180 5 10 15 20 25 30 V DS [V] T j [°C] 11 Typical forward diode characteristicis 12 Avalanche characteristics IF = f(VSD) I A S= f(t AV) parameter: T j parameter: Tj(start) 103 1000 102 100 I F [A] I AV [A] 25 °C 175 °C 25 °C 101 150 °C 10 100 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V SD [V] Rev. 1.0 100 °C 1 10 100 1000 t AV [µs] page 6 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 13 Avalanche energy 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D = 1 mA parameter: I D 45 600 25 A 500 43 V BR(DSS) [V] E AS [mJ] 400 300 50 A 41 39 200 100 A 37 100 35 0 25 75 125 -60 175 -20 T j [°C] 20 60 100 140 180 T j [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 100 A pulsed parameter: V DD 10 V GS 9 Qg 8 8V 7 32 V V GS [V] 6 5 V g s(th) 4 3 2 Q g (th) Q sw 1 Q gs 0 0 20 40 60 Q gate Q gd 80 Q gate [nC] Rev. 1.0 page 7 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2010 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2012-07-02 IPB100N04S4-H2 IPI100N04S4-H2, IPP100N04S4-H2 Revision History Version Date Changes Revision 1.0 Rev. 1.0 4/13/2010 Final Data Sheet page 9 2012-07-02