IPP040N08NF2S

IPP040N08NF2S MOSFET StrongIRFETTM2Power-Transistor PG-TO220-3-60;-61;-62 tab Features •Optimizedforawiderangeofapplications •N-Channel,normallevel •100%avalanchetested •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 Productvalidation QualifiedaccordingtoJEDECStandard Drain Pin 2, Tab Table1KeyPerformanceParameters Parameter Value Unit VDS 80 V RDS(on),max 4 mΩ ID 115 A Qoss 65 nC QG 54 nC Type/OrderingCode Package IPP040N08NF2S PG-TO220-3 Final Data Sheet Gate Pin 1 Source Pin 3 Marking 040N08NS 1 RelatedLinks - Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 115 88 83 22 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=6V,TC=100°C VGS=10V,TA=25°C,RthJA=40°C/W2) - 460 A TA=25°C - - 119 mJ ID=95A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 150 3.8 W TC=25°C TA=25°C,RthJA=40°C/W2) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 1) Continuous drain current Pulsed drain current3) 4) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 1 °C/W - Thermal resistance, junction - ambient, RthJA 6 cm² cooling area - - 40 °C/W - Thermal resistance, junction - ambient, RthJA minimal footprint2) - - 62 °C/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.8 V VDS=VGS,ID=85µA - 0.1 10 1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance1) RDS(on) - 3.6 4.5 4.0 5.6 mΩ VGS=10V,ID=80A VGS=6V,ID=40A Gate resistance RG - 1.9 - Ω - gfs 63 - - S |VDS|≥2|ID|RDS(on)max,ID=80A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 80 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current 2) Transconductance Table5Dynamiccharacteristics Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 3800 - pF VGS=0V,VDS=40V,f=1MHz Output capacitance Coss - 620 - pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance Crss - 29 - pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 13.6 - ns VDD=40V,VGS=10V,ID=80A, RG,ext=1.6Ω Rise time tr - 54.2 - ns VDD=40V,VGS=10V,ID=80A, RG,ext=1.6Ω Turn-off delay time td(off) - 27.7 - ns VDD=40V,VGS=10V,ID=80A, RG,ext=1.6Ω Fall time tf - 12.5 - ns VDD=40V,VGS=10V,ID=80A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics3) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 18.6 - nC VDD=40V,ID=80A,VGS=0to10V Gate charge at threshold Qg(th) - 11.3 - nC VDD=40V,ID=80A,VGS=0to10V Gate to drain charge Qgd - 11.9 - nC VDD=40V,ID=80A,VGS=0to10V Switching charge Qsw - 19.2 - nC VDD=40V,ID=80A,VGS=0to10V Gate charge total Qg - 54 81 nC VDD=40V,ID=80A,VGS=0to10V Gate plateau voltage Vplateau - 4.9 - V VDD=40V,ID=80A,VGS=0to10V Output charge Qoss - 65 - nC VDS=40V,VGS=0V 2) 1) RDS(on) is specified at a distance of 1.8 mm distance to the package body; mounting at a larger distance increases the overall package resistance of approximately 0.04 mOhm/mm per leg. 2) Defined by design. Not subject to production test. 3) See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S Table7Reversediode Parameter Symbol Diode continuous forward current Values Unit Note/TestCondition 94 A TC=25°C - 460 A TC=25°C - 0.95 1.2 V VGS=0V,IF=80A,Tj=25°C trr - 40.0 - ns VR=40V,IF=80A,diF/dt=100A/µs Qrr - 46.6 - nC VR=40V,IF=80A,diF/dt=100A/µs Min. Typ. Max. IS - - Diode pulse current IS,pulse - Diode forward voltage VSD Reverse recovery time Reverse recovery charge Final Data Sheet 5 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 160 120 140 100 120 80 ID[A] Ptot[W] 100 80 60 60 40 40 20 20 0 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 10 µs 102 100 µs 100 ID[A] ZthJC[K/W] 1 ms 101 10 ms DC 100 10-1 10-1 10-2 10-1 100 101 102 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 120 12 8V 7V 10 10 V 90 4.5 V 6V 5V 8 RDS(on)[mΩ] ID[A] 5V 60 6 6V 7V 4 8V 30 10 V 4.5 V 0 0.00 0.25 0.50 0.75 2 0 1.00 0 30 60 VDS[V] 90 120 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 120 12 10 90 RDS(on)[mΩ] ID[A] 8 60 175 °C 6 4 25 °C 30 2 0 175 °C 0 1 2 3 25 °C 4 5 6 7 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=80A;parameter:Tj 7 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S Diagram9:Normalizeddrain-sourceonresistance Diagram10:Typ.gatethresholdvoltage 2.0 4.0 3.5 3.0 2.5 1.2 VGS(th)[V] RDS(on)(normalizedto25°C) 1.6 0.8 2.0 850 µA 1.5 85 µA 1.0 0.4 0.5 0.0 -80 -40 0 40 80 120 160 0.0 -80 200 -40 0 40 Tj[°C] 80 120 160 200 Tj[°C] RDS(on)=f(Tj),ID=80A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss 102 C[pF] 103 IF[A] Coss 102 101 Crss 101 0 10 20 30 40 50 60 70 80 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 16 V 40 V 64 V 8 102 101 6 VGS[V] IAV[A] 25 °C 100 °C 4 150 °C 0 10 2 10-1 100 101 102 103 tAV[µs] 0 0 10 20 30 40 50 60 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=80Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 88 86 VBR(DSS)[V] 84 82 80 78 76 -80 -40 0 40 80 120 160 200 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S 5PackageOutlines PACKAGE - GROUP NUMBER: PG-TO220-3-U05 REVISION: 02 DATE: 15.12.2020 MILLIMETERS MIN. MAX. 4.25 4.75 1.40 1.14 2.92 2.47 0.71 0.97 1.14 1.78 0.36 0.61 14.32 15.80 8.39 9.20 11.89 12.80 9.90 10.67 8.10 8.74 2.54 3 6.00 6.70 13.00 14.40 3.56 4.06 3.90 3.54 2.94 2.54 DIMENSIONS A A1 A2 b b1 c D D1 D2 E E1 e N H L L1 øP Q Figure1OutlinePG-TO220-3,dimensionsinmm Final Data Sheet 10 Rev.2.0,2020-12-18 StrongIRFETTM2Power-Transistor IPP040N08NF2S RevisionHistory IPP040N08NF2S Revision:2020-12-18,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2020-12-18 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2020InfineonTechnologiesAG AllRightsReserved. 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Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.0,2020-12-18