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IRFR2905ZTR

IRFR2905ZTR

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT428

  • 描述:

    MOSFET N-CH 55V 42A DPAK

  • 数据手册
  • 价格&库存
IRFR2905ZTR 数据手册
PD - 95811 IRFR2905Z IRFU2905Z AUTOMOTIVE MOSFET HEXFET® Power MOSFET Features ● ● ● ● ● Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax D VDSS = 55V RDS(on) = 14.5mΩ G ID = 42A S Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. D-Pak IRFR2905Z I-Pak IRFU2905Z Absolute Maximum Ratings Parameter Max. ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 59 ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current IDM 42 240 PD @TC = 25°C Power Dissipation VGS EAS (Thermally limited) EAS (Tested ) Single Pulse Avalanche Energy Tested Value c IAR Avalanche Current EAR Repetitive Avalanche Energy TJ Operating Junction and TSTG Storage Temperature Range d h RθJA Junction-to-Ambient j A °C Parameter Junction-to-Ambient (PCB mount) mJ 82 300 (1.6mm from case ) y ij y 10 lbf in (1.1N m) Thermal Resistance RθJA 55 -55 to + 175 Mounting Torque, 6-32 or M3 screw j W W/°C V mJ Soldering Temperature, for 10 seconds Junction-to-Case 110 0.72 ± 20 See Fig.12a, 12b, 15, 16 g RθJC A 42 c Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Units Typ. Max. ––– 1.38 ––– 40 ––– 110 Units °C/W HEXFET® is a registered trademark of International Rectifier. www.irf.com 1 11/24/03 IRFR/U2905Z Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.053 ––– RDS(on) Static Drain-to-Source On-Resistance ––– 11.1 14.5 VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA gfs IDSS Forward Transconductance 20 ––– ––– S VDS = 25V, ID = 36A Drain-to-Source Leakage Current ––– ––– 20 µA ––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 200 Gate-to-Source Reverse Leakage ––– ––– -200 Qg Total Gate Charge ––– 29 44 Qgs Gate-to-Source Charge ––– 7.7 ––– Qgd Gate-to-Drain ("Miller") Charge ––– 12 ––– RG Gate Input Resistance ––– 1.3 ––– td(on) Turn-On Delay Time ––– 14 ––– tr Rise Time ––– 66 ––– td(off) Turn-Off Delay Time ––– 31 ––– tf Fall Time ––– 35 ––– VGS = 10V LD Internal Drain Inductance ––– 4.5 ––– Between lead, IGSS V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 36A e VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V ID = 36A nC VDS = 44V VGS = 10V Ω e f = 1MHz, open drain VDD = 28V ID = 36A ns nH RG = 15 Ω e D LS Internal Source Inductance ––– 7.5 ––– 6mm (0.25in.) from package Ciss Input Capacitance ––– 1380 ––– and center of die contact VGS = 0V Coss Output Capacitance ––– 240 ––– Crss Reverse Transfer Capacitance ––– 120 ––– Coss Output Capacitance ––– 820 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Coss Output Capacitance ––– 190 ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz Coss eff. Effective Output Capacitance ––– 300 ––– VGS = 0V, VDS = 0V to 44V G S VDS = 25V pF ƒ = 1.0MHz f Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units IS Continuous Source Current ––– ––– 36 ISM (Body Diode) Pulsed Source Current ––– ––– 240 VSD (Body Diode) Diode Forward Voltage ––– ––– 1.3 V trr Reverse Recovery Time ––– 23 35 ns Qrr Reverse Recovery Charge ––– 16 24 nC ton Forward Turn-On Time 2 c Conditions MOSFET symbol A showing the integral reverse p-n junction diode. TJ = 25°C, IS = 36A, VGS = 0V e TJ = 25°C, IF = 36A, VDD = 28V di/dt = 100A/µs e Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRFR/U2905Z 1000 1000 100 BOTTOM TOP 10 1 4.5V ≤ 60µs PULSE WIDTH Tj = 25°C ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 BOTTOM 10 4.5V ≤ 60µs PULSE WIDTH Tj = 175°C 1 0.1 0.1 1 10 0.1 0 100 11 10 10 100 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000.0 50 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current (Α) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100.0 T J = 175°C T J = 25°C 10.0 VDS = 25V ≤ 60µs PULSE WIDTH T J = 175°C 40 30 T J = 25°C 20 10 VDS = 15V 380µs PULSE WIDTH 1.0 4.0 5.0 6.0 7.0 8.0 9.0 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10.0 0 0 10 20 30 40 50 ID, Drain-to-Source Current (A) Fig 4. Typical Forward Transconductance Vs. Drain Current 3 IRFR/U2905Z 2400 20 2000 VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C, Capacitance (pF) C oss = C ds + C gd 1600 Ciss 1200 800 Coss 400 Crss VDS= 44V VDS= 28V VDS= 11V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 0 1 ID= 36A 10 0 100 10 20 30 40 50 QG Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000.0 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100.0 T J = 175°C 10.0 T J = 25°C 1.0 10 0.1 0.2 0.6 1.0 1.4 1.8 VSD, Source-toDrain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 2.2 1msec 1 VGS = 0V 0.1 100µsec 10msec Tc = 25°C Tj = 175°C Single Pulse 1 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFR/U2905Z 70 RDS(on) , Drain-to-Source On Resistance (Normalized) 2.0 LIMITED BY PACKAGE ID , Drain Current (A) 60 50 40 30 20 10 0 25 50 75 100 125 150 ID = 36A VGS = 10V 1.5 1.0 0.5 175 -60 -40 -20 T C , Case Temperature (°C) 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) Fig 10. Normalized On-Resistance Vs. Temperature Fig 9. Maximum Drain Current Vs. Case Temperature Thermal Response ( Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 0.05 τJ 0.02 0.01 0.01 R1 R1 τJ τ1 R2 R2 τ2 τ1 τ2 Ci= τi/Ri Ci i/Ri SINGLE PULSE ( THERMAL RESPONSE ) R3 R3 τ3 τC τ τ3 Ri (°C/W) τi (sec) 0.3962 0.00012 0.5693 0.00045 0.4129 0.0015 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFR/U2905Z DRIVER L VDS D.U.T RG + V - DD IAS 20V VGS A 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS, Single Pulse Avalanche Energy (mJ) 240 15V ID 36A 8.6A BOTTOM 4.8A TOP 200 160 120 80 40 0 25 50 75 100 125 150 175 Starting T J, Junction Temperature (°C) I AS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGD 4.5 VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF .3µF D.U.T. + V - DS VGS(th) Gate threshold Voltage (V) QGS 4.0 3.5 ID = 250µA 3.0 2.5 2.0 -75 -50 -25 VGS 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 Fig 14. Threshold Voltage Vs. Temperature www.irf.com IRFR/U2905Z 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 0.01 10 0.05 0.10 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth EAR , Avalanche Energy (mJ) 60 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 36A 50 40 30 20 10 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 7 IRFR/U2905Z D.U.T Driver Gate Drive + ƒ + ‚ „ • • • • D.U.T. ISD Waveform Reverse Recovery Current + dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test P.W. Period *  RG D= VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - - Period P.W. VDD + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V DS VGS RG RD D.U.T. + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRFR/U2905Z D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) 2.38 (.094) 2.19 (.086) 6.73 (.265) 6.35 (.250) 1.14 (.045) 0.89 (.035) -A1.27 (.050) 0.88 (.035) 5.46 (.215) 5.21 (.205) 0.58 (.023) 0.46 (.018) 4 6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 10.42 (.410) 9.40 (.370) 1.02 (.040) 1.64 (.025) 1 2 LEAD ASSIGNMENTS 3 1 - GATE 0.51 (.020) MIN. -B1.52 (.060) 1.15 (.045) 3X 1.14 (.045) 2X 0.76 (.030) 0.89 (.035) 0.64 (.025) 0.25 (.010) 2 - DRAIN 3 - SOURCE 4 - DRAIN 0.58 (.023) 0.46 (.018) M A M B NOTES: 2.28 (.090) 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 4.57 (.180) 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006). D-Pak (TO-252AA) Part Marking Information Notes : T his part marking information applies to devices produced before 02/26/2001 EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 9U1P INT ERNATIONAL RECTIFIER LOGO IRFU120 016 9U 1P DAT E CODE YEAR = 0 WEEK = 16 ASS EMBLY LOT CODE Notes : T his part marking information applies to devices produced after 02/26/2001 EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 1234 AS SEMBLED ON WW 16, 1999 IN T HE AS SEMBLY LINE "A" INT ERNATIONAL RECTIFIER LOGO IRFU120 12 ASS EMBLY LOT CODE www.irf.com PART NUMBER 916A 34 DATE CODE YEAR 9 = 1999 WEEK 16 LINE A 9 IRFR/U2905Z I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) 6.73 (.265) 6.35 (.250) 2.38 (.094) 2.19 (.086) -A- 0.58 (.023) 0.46 (.018) 1.27 (.050) 0.88 (.035) 5.46 (.215) 5.21 (.205) LEAD ASSIGNMENTS 4 6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 1.52 (.060) 1.15 (.045) 1 2 2.28 (.090) 1.91 (.075) 1.14 (.045) 0.76 (.030) 2.28 (.090) 3 - SOURCE 4 - DRAIN 3 -B- 3X 1 - GATE 2 - DRAIN 3X 9.65 (.380) 8.89 (.350) NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006). 0.89 (.035) 0.64 (.025) 1.14 (.045) 0.89 (.035) 0.25 (.010) M A M B 2X 0.58 (.023) 0.46 (.018) I-Pak (TO-251AA) Part Marking Information Notes : T his part marking information applies to devices produced before 02/26/2001 EXAMPLE: T HIS IS AN IRFR120 WIT H AS SEMBLY LOT CODE 9U1P INT ERNAT IONAL RECT IFIER LOGO IRFU120 016 9U 1P DAT E CODE YEAR = 0 WEEK = 16 AS S EMBLY LOT CODE Notes : T his part marking information applies to devices produced after 02/26/2001 EXAMPLE: T HIS IS AN IRFR120 WIT H AS SEMBLY LOT CODE 5678 AS SEMBLED ON WW 19, 1999 IN T HE ASS EMBLY LINE "A" INTERNATIONAL RECT IFIER LOGO ASS EMBLY LOT CODE 10 PART NUMBER IRFU120 919A 56 78 DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A www.irf.com IRFR/U2905Z D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Notes: „ Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). ‚ Limited by TJmax, starting TJ = 25°C, L = 0.08mH … Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25Ω, IAS = 36A, VGS =10V. Part not avalanche performance. recommended for use above this value. † This value determined from sample failure population. 100% ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. tested to this value in production. ‡ When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994 ˆ Rθ is measured at TJ approximately 90°C  Repetitive rating; pulse width limited by Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.11/03 www.irf.com 11 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/
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