IRU3073CQTR

Data Sheet No. PD94699 IRU3073 SYNCHRONOUS PWM CONTROLLER WITH OVER-CURRENT PROTECTION / LDO CONTROLLER FEATURES DESCRIPTION Synchronous Controller plus one LDO controller Current Limit using MOSFET Sensing Single 5V/12V Supply Operation Programmable Switching Frequency up to 400KHz Soft-Start Function Fixed Frequency Voltage Mode Precision Reference Voltage Available Uncommitted Error Amplifier available for DDR voltage tracking application The IRU3073 controller IC is designed to provide a low cost synchronous Buck regulator for on-board DC to DC converter for multiple output applications. The outputs can be programmed as low as 0.8V for low voltage applications. Selectable over-current protection is provided by using external MOSFET's on-resistance for optimum cost and performance. This device features a programmable frequency set from 200KHz to 400KHz, under-voltage lockout for all input supplies, an external programmable soft-start function as well as output under-voltage detection that latches off the device when an output short is detected. APPLICATIONS DDR memory source sink VTT application Low cost on-board DC to DC such as 12V/5V to output voltages as low as 0.8V Graphic Card Hard Disk Drive Multi-Output Applications TYPICAL APPLICATION 3.3V Vcc Q1 Drv2 Fb2 R1 VOUT2 C2 12V VcH R2 L1 C1 +5V U1 VcL IRU3073 VP1 C3 0.1uF C6 HDrv Q4 D1 VREF C4 R8 C7 C9 L2 R7 OCSet VOUT1 Comp LDrv R9 Q5 C10 Rt SS/SD C11 Gnd R10 Fb1 PGnd R11 Figure 1 - Typical application of IRU3073. PACKAGE ORDER INFORMATION TA (°C) 0 To 70 Rev. 1.0 09/17/03 DEVICE IRU3073CQ PACKAGE 16-Pin Plastic QSOP NB (Q) www.irf.com 1 IRU3073 ABSOLUTE MAXIMUM RATINGS Vcc Supply Voltage ................................................... VcL, VcH Supply Voltage .......................................... Storage Temperature Range ...................................... Operating Junction Temperature Range ..................... -0.5 - 25V -0.5 - 25V -65°C To 150°C 0°C To 125°C CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. PACKAGE INFORMATION 16-PIN PLASTIC QSOP NB (Q) Fb2 1 16 OCSet Drv2 2 15 VcH 14 HDrv Rt 3 SS/SD 4 13 Gnd Comp 5 12 PGnd Fb1 6 11 LDrv VP1 7 10 VcL VREF 8 9 Vcc uJA=1128C/W ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vcc=5V, VcL=VcH=12V and TA=0°C to 70°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Feedback Voltage Fb Voltage Fb Voltage Line Regulation Reference Voltage Ref Voltage Initial Accuracy Drive Current UVLO UVLO Threshold - Vcc UVLO Hysteresis - Vcc UVLO Threshold - VcH UVLO Hysteresis - VcH UVLO Threshold - Fb1 UVLO Hysteresis - Fb1 Supply Current Vcc Dynamic Supply Current Vc Dynamic Supply Current Vcc Static Supply Current Vc Static Supply Current Soft-Start Section Charge Current 2 SYM TEST CONDITION MIN TYP MAX UNITS 0.784 0.8 0.2 0.816 0.625 V % 0.784 0.8 2 0.816 V mA UVLO VCC Supply Ramping Up 3.9 4.8 UVLO VCH Supply Ramping Up 3.3 UVLO Fb1 Fb Ramping Down 0.3 4.4 0.25 3.5 0.2 0.4 0.1 V V V V V V 5 5 3.5 3 10 15 10 5 mA mA mA mA 25 30 mA VFB LREG 5 1 and gmZIN >>1 ---(20) By replacing ZIN and Zf according to Figure 7, the transformer function can be expressed as: H(s) = (1+sR7C11)3[1+sC10(R6+R8)] 1 3 sR6(C12+C11) C12C11 1+sR7 C12+C11 3(1+sR8C10) [ ( )] As known, transconductance amplifier has high impedance (current source) output, therefore, consider should be taken when loading the E/A output. It may exceed its source/sink output current capability, so that the amplifier will not be able to swing its output voltage over the necessary range. The compensation network has three poles and two zeros and they are expressed as follows: FP1 = 0 FP2 = FP3 = 1 2p3R83C10 12 ---(21) The stability requirement will be satisfied by placing the poles and zeros of the compensation network according to following design rules. The consideration has been taken to satisfy condition (20) regarding transconductance error amplifier. These design rules will give a crossover frequency approximately one-tenth of the switching frequency. The higher the band width, the potentially faster the load transient speed. The gain margin will be large enough to provide high DC-regulation accuracy (typically -5dB to 12dB). The phase margin should be greater than 458 for overall stability. Based on the frequency of the zero generated by ESR versus crossover frequency, the compensation type can be different. The table below shows the compensation type and location of crossover frequency. Compensator Location of Zero Typical Type Crossover Frequency Output (FO) Capacitor Type II (PI) FPO < FZO < FO < fS/2 Electrolytic, Tantalum Type III (PID) FPO < FO < FZO < fS/2 Tantalum, Method A Ceramic Type III (PID) FPO < FO < fS/2 < FZO Ceramic Method B Table - The compensation type and location of zero crossover frequency. Detail information is dicussed in application Note AN1043 which can be downloaded from the IR Web-Site. 1 ( CC 3C +C ) 2p3R73 VIN 1 3 VOSC 2p3Lo3Co Where: VIN = Maximum Input Voltage VOSC = Oscillator Ramp Voltage Lo = Output Inductor Co = Total Output Capacitors Vp=VREF FZ1 FO = R73C103 12 12 11 ≅ 1 2p3R73C12 11 www.irf.com Rev. 1.0 09/17/03 IRU3073 LDO Section Output Voltage Programming Output voltage for LDO is programmed by reference voltage and external voltage divider. The Fb2 pin is the inverting input of the error amplifier, which is internally referenced to 0.8V. The divider is ratioed to provide 0.8V at the Fb2 pin when the output is at its desired value. The output voltage is defined by using the following equation ( VOUT2 = VREF3 1+ R7 R10 ) For: VOUT2 = 1.6V VREF = 0.8V R10 = 1KV Results to R7=1KV VOUT2 IRU3073 R7 Fb2 R10 Layout Consideration The layout is very important when designing high frequency switching converters. Layout will affect noise pickup and can cause a good design to perform with less than expected results. Start to place the power components. Make all the connections in the top layer with wide, copper filled areas. The inductor, output capacitor and the MOSFET should be close to each other as possible. This helps to reduce the EMI radiated by the power traces due to the high switching currents through them. Place input capacitor directly to the drain of the high-side MOSFET. To reduce the ESR, replace the single input capacitor with two parallel units. The feedback part of the system should be kept away from the inductor and other noise sources and be placed close to the IC. In multilayer PCB, use one layer as power ground plane and have a separate control circuit ground (analog ground), to which all signals are referenced. The goal is to localize the high current path to a separate loop that does not interfere with the more sensitive analog control function. These two grounds must be connected together on the PC board layout at a single point. 500 Figure 13 - Programming the output voltage for LDO. 450 RDS(ON) = Frequency (KHz) 400 LDO Power MOSFET Selection The first step in selecting the power MOSFET for the linear regulator is to select the maximum RDS(ON) based on the input to the dropout voltage and the maximum load current. 350 300 250 200 150 100 50 VIN(LDO) - VOUT2 IOUT2 0 0 50 100 150 200 250 300 350 400 450 500 550 Rt (K V) For: VIN(LDO) = 2.5V VOUT2 = 1.6V IOUT2 = 2A Figure 14 - Switching Frequency vs. Rt. Results to: RDS(ON)(MAX) = 0.45V Note that since the MOSFET RDS(ON) increases with temperature, this number must be divided by ~1.5 in order to find the RDS(ON)(MAX) at room temperature. The IRLR2703 has a maximum of 0.065V RDS(ON) at room temperature, which meets our requirements. Rev. 1.0 09/17/03 www.irf.com 13 IRU3073 TYPICAL APPLICATION 2.5V Vcc Q3 IRLR2703 C13 150uF C16 1uF Drv2 VcL 1.6V @ 2A R2 U1 VcH IRU3073 VP1 C10 0.1uF R7 24K D2 BAT54 VREF C2 33pF C7 2200pF C11 1uF HDrv OCSet Comp 3.3uH 5.1K Q2 IRF7832 SS/SD Gnd Fb1 PGnd C1 47uF L2 Rt C6 0.1uF +5V C3 0.1uF Q1 IRF7832 R4 LDrv L1 1uH D3 BAT54 C19 1uF Fb2 1K C14 R14 150uF 1K C2A,B,C=47uF C9B C9C C12 330uF 330uF 1uF 2.5V @ 8A R9 R10 1K 2.15K Figure 15 - Typical application of IRU3073 for single 5V. 14 www.irf.com Rev. 1.0 09/17/03 IRU3073 TYPICAL APPLICATION 3.3V VcH Q3 IRLR2703 C13 150uF 12V C11 1uF Drv2 Vcc 1.6V @ 1A R2 1K C14 R14 150uF 1K 24K Fb2 VcL U1 IRU3073 VP1 C10 0.1uF R7 C16 1uF HDrv D2 BAT54 VREF C2 33pF C7 2200pF C19 1uF OCSet Comp C2A,B,C=47uF 1uH L2 3.3uH 5.1K Q2 IRF7832 Rt SS/SD C6 0.1uF Gnd Fb1 PGnd +5V C1 47uF Q1 IRF7832 R4 LDrv L1 C9B C9C C12 330uF 330uF 1uF 2.5V @ 8A R9 R10 1K 2.15K Figure 16 - Typical application of IRU3073. Rev. 1.0 09/17/03 www.irf.com 15 IRU3073 DEMO-BOARD APPLICATION 2.5V Vcc Q3 IRLR2703 C13 150uF 12V C11 1uF Drv2 L1 VcH 1.6V @ 2A R2 C15 1uF 1K C14 R14 150uF 1K C10 0.1uF C2 33pF R7 C7 2200pF 24K C16 1uF Fb2 U1 VcL IRU3073 VP1 C19 1uF HDrv D2 BAT54 VREF OCSet Comp 1uH C2C C2B C2A 47uF 47uF 47uF Q1 IRF7832 L2 R4 3.3uH 5.1K LDrv Q2 IRF7832 Rt SS/SD C6 0.1uF Gnd Fb1 PGnd +5V C1 47uF C9B C9C C12 330uF 330uF 1uF 2.5V @ 8A R9 R10 1K 2.15K Figure 17 - Typical application of IRU3073. 16 www.irf.com Rev. 1.0 09/17/03 IRU3073 DEMO-BOARD APPLICATION PARTS LIST Ref Desig Description Q1,Q2 MOSFET Q3 MOSFET U1 Controller D2 Schottky Diode L1 Inductor L2 Inductor C1,C2A,B,C Cap, Poscap C2 Cap, Ceramic C6,C10 Cap, Ceramic C7 Cap, Ceramic C8 Cap, Ceramic C9B,C9C Cap, Poscap C11,12,15, Cap, Ceramic 16,19,20,21 C13,C14 Cap, Poscap R1 Resistor R2,10,14 Resistor R4 Resistor R6 Resistor R7 Resistor R8 Resistor R9 Resistor Rev. 1.0 09/17/03 Value 30V, 4mV 30V, 45mV 1mH, 5.6A 3.3mH, 17A 47mF, 16V 33pF, NPO, 5% 0.1mF, Y5V, 25V 2200pF, X7R, 50V 470pF, X7R, 50V 330mF, 40mV 1mF, Y5V, 16V 150mF, 6.3V 10V 1K, 1% 5.1K, 1% 100K 24K, 1% 4.7V, 1% 2.15K, 1% Qty 2 1 1 1 1 1 4 1 2 1 1 2 7 2 1 3 1 1 1 1 1 Part# IRF7832 IRLR2703 IRU3073CQ BAT54 DO3316P-102 DO5022P-332HC 16TPB47M ECU-V1H330JCV ECJ-2VF1E104 ECU-V1H222KBV ECJ-2VC1H471J 6TPB330M ECJ-2VF1C1O5Z Manuf IR IR IR IR Coilcraft Coilcraft Sanyo Panasonic Panasonic Panasonic Panasonic Sanyo Panasonic Web site (www.) irf.com 6TPB150M Sanyo Any Any Any Any Any Any Any sanyo.com www.irf.com coilcraft.com sanyo.com maco.panasonic.co.jp sanyo.com maco.panasonic.co.jp 17 IRU3073 APPLICATION EXPERIMENTAL WAVEFORMS Figure 18 - Normal condition at no load. Ch1: HDrv Ch2: LDrv Ch4: Inductor Current Figure 19 - Gate signals when SS pin pulls low. Ch1: HDrv Ch2: LDrv Figure 20 - Soft-Start. Ch1: VIN (5V) Ch2: Bias Voltage (12V) Ch3: VOUT1 (PWM) Ch4: VOUT2 (LDO) 18 www.irf.com Rev. 1.0 09/17/03 IRU3073 APPLICATION EXPERIMENTAL WAVEFORMS Figure 21 - Output Shorted at start-up. Ch1: VOUT Ch4: IOUT Figure 22 - Load Transient Response (PWM Section). Ch1: VOUT1 Ch4: IOUT1 (0-8A) Figure 23 - Load Transient Response (LDO Section). Ch2: VOUT2 Ch4: IOUT2 (0-2A) IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 Rev. 1.0 09/17/03 www.irf.com 19 IRU3073 (Q) QSOP Package, Narrow Body 16-Pin H A M B D E DETAIL-A PIN NO. 1 L C 0.366 0.13 x 458 K G1 F DETAIL-A J G SYMBOL A B C D E F G G1 H J K L M 16-PIN MIN MAX 4.80 4.98 0.635 BSC 0.20 0.30 3.81 3.99 5.79 6.20 1.35 1.75 0.10 0.25 1.37 1.50 98 BSC 0.19 0.25 08 88 0.40 1.27 78638 NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. 20 www.irf.com Rev. 1.0 09/17/03 IRU3073 PACKAGE SHIPMENT METHOD PKG DESIG Q PACKAGE DESCRIPTION PIN COUNT PARTS PER REEL TAPE & REEL Orientation 16 2500 Fig A QSOP Plastic, Narrow Body 1 1 1 Feed Direction Figure A IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 Rev. 1.0 09/17/03 www.irf.com 21