SLB9670VQ20

OPTIGA™ T PM SLB 9670 T PM2.0 Trusted Platform Module Data Sheet Devices • SLB 9670VQ2.0 • SLB 9670XQ2.0 Key Features • Compliant to TPM Main Specification, Family "2.0" • Hardware and firmware are validated according to FIPS 140-2 Level 2 • SPI interface • Meeting Intel TXT, Microsoft Windows and Google Chromebook certification criteria for successful platform qualification • Random Number Generator (RNG) according to NIST SP800-90A • Full personalization with Endorsement Key (EK) and EK certificate • Standard (-20..+85°C) and enhanced temperature range (-40..+85°C) • PG-VQFN-32-13 package • Pin compatible to OPTIGA™ TPM SLB 9670 TPM1.2 version • Optimized for battery operated devices: low standby power consumption (typ. 110µA) • 24 PCRs (SHA-1 or SHA-256) • Minimum of 6962 bytes free NV memory • Up to 3 loaded sessions (TPM_PT_HR_LOADED_MIN) • Up to 64 active sessions (TPM_PT_ACTIVE_SESSIONS_MAX) • Up to 3 loaded transient Objects (TPM_PT_HR_TRANSIENT_MIN) • Up to 7 loaded persistent Objects (TPM_PT_HR_PERSISTENT_MIN) • Up to 8 NV counters • Up to 1 kByte for command parameters and response parameters • Up to 768 Byte for NV read or NV write • 1420 Byte I/O buffer • Built-in support by Linux Kernel Data Sheet www.infineon.com Please read the Important Notice and Warnings at the end of this document Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module About this document Scope and purpose This data sheet describes the OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module together with its features, functionality and programming interface. Intended audience This data sheet is primarily intended for system developers. Data Sheet 2 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Table of contents Table of contents Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 List of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Device Types / Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 3.1 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 TPM Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 5.1 5.2 5.3 5.4 5.5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 11 12 13 14 6 6.1 6.2 6.3 Package Dimensions (VQFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Packing Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chip Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 15 16 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Licenses and Notices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Data Sheet 3 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module List of figures List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Data Sheet Pinout of the OPTIGA™ TPM SLB 9670 (PG-VQFN-32-13 Package, Top View) . . . . . . . . . . . . . . . . . . . . . 6 Typical Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 RST# Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package Dimensions PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Tape & Reel Dimensions PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Recommended Footprint PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Chip Marking PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module List of tables List of tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Data Sheet Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Not Connected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Infineon Specific Property Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Functional Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 DC Characteristics of SPI Interface Pins (SCLK, CS#, MISO, MOSI, RST#, PIRQ#) . . . . . . . . . . . . . . . . . 12 DC Characteristics of GPIO and PP Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Device Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AC Characteristics of SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Overview 1 Overview The OPTIGA™ TPM SLB 9670 is a Trusted Platform Module and is based on advanced hardware security technology. This TPM implementation has achieved CC EAL4+ certification and serves as a basis for other TPM products and firmware upgrades. It is available in PG-VQFN-32-13 package. It supports an SPI interface with a transfer rate of up to 43 MHz. The OPTIGA™ TPM SLB 9670 is a TPM based on TCG family 2.0 specifications (see [1], [2] and [3]). 1.1 Power Management In the OPTIGA™ TPM SLB 9670, power management is handled internally; no explicit power-down or standby mode is available. The device automatically enters a low-power state after each successful command/response transaction. If a transaction is started on the SPI bus from the host platform, the device will wake immediately and will return to the low-power mode after the transaction has been finished. 2 Device Types / Ordering Information The OPTIGA™ TPM SLB 9670 product family features devices using a VQFN package. Table 1 shows the different versions. Table 1 Device Configuration Device Name Package Remarks SLB 9670VQ2.0 PG-VQFN-32-13 Standard temperature range SLB 9670XQ2.0 PG-VQFN-32-13 Enhanced temperature range Pin Description NCI 30 NCI NCI NC NCI NC NCI GND NCI/VDD 26 MISO 1 GND TPM SLB 9670VQ2.0 NCI NCI GND 22 MOSI NCI CS# PG-VQFN-32-13 GPIO PP 10 PIRQ # RST# 15 NCI/GND NCI NCI/VDD NCI NCI NCI NCI GND Data Sheet SCLK 18 7 VDD Figure 1 VDD Pinning_VQFN-32-13_SLB9670.vsd 3 Pinout of the OPTIGA™ TPM SLB 9670 (PG-VQFN-32-13 Package, Top View) 6 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Pin Description Table 2 Buffer Types Buffer Type Description TS Tri-State pin ST Schmitt-Trigger pin OD Open-Drain pin Table 3 I/O Signals Pin Number Name Pin Type Buffer Type Function 20 CS# I ST Chip Select The SPI chip select signal (active low). 19 SCLK I ST SPI Clock The SPI clock signal. Only SPI mode 0 is supported by the device. 21 MOSI I ST Master Out Slave In (SPI Data) SPI data which is received from the master. 24 MISO O TS Master In Slave Out (SPI Data) SPI data which is sent to the SPI bus master. 18 PIRQ# O OD Interrupt Request Interrupt request signal to the host. The pin has no internal pull-up resistor. The interrupt is active low. 17 RST# I ST Reset External reset signal. Asserting this pin unconditionally resets the device. The signal is active low and is typically connected to the PCIRST# signal of the host. This pin has a weak internal pull-up resistor. 6 GPIO I/O TS GPIO-Express-00 Signal The TPM2.0 device does not use this functionality. This pin may be left unconnected; it has an internal pull-up resistor. 7 PP I ST Physical Presence The TPM2.0 device does not use this functionality. This pin may be left unconnected; it has an internal pulldown resistor. Name Pin Type Buffer Type Function 8, 22 VDD PWR — Power Supply All VDD pins must be connected externally and should be bypassed to GND via 100 nF capacitors. 2, 9, 23, 32 GND GND — Ground All GND pins must be connected externally. PG-VQFN-32-13 Table 4 Power Supply Pin Number PG-VQFN-32-13 Data Sheet 7 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Pin Description Table 5 Not Connected Pin Number Name Pin Type Buffer Type Function 29, 30 NC NU — No Connect All pins must not be connected externally (must be left floating). 3 - 5, 10 - 13, 15, 25 - 28, 31 NCI — — Not Connected Internally All pins are not connected internally (can be connected externally). 1 NCI/VDD — — Not Connected Internally/VDD This pin is not connected internally (can be connected externally). Note that pin 1 is defined as VDD in the TCG specification [3]. To be compliant, VDD can be connected to this pin. 14 NCI/VDD — — Not Connected Internally/VDD This pin is not connected internally (can be connected externally). Note that pin 14 is defined as VDD in the TCG specification [3]. To be compliant and to ensure upwards compatibility to future TPMs, VDD must be connected to this pin. 16 NCI/GND — — Not Connected Internally/GND This pin is not connected internally (can be connected externally). Note that pin 16 is defined as GND in the TCG specification [3]. To be compliant, GND can be connected to this pin. PG-VQFN-32-13 Data Sheet 8 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Pin Description 3.1 Typical Schematic Figure 2 shows the typical schematic for the OPTIGA™ TPM SLB 9670. The power supply pins should be bypassed to GND with capacitors located close to the device. 3.3V (1.8V) SCLK SCLK TPM_CS# CS# MISO MISO MOSI MOSI PIRQ# PIRQ# RESET# RST# VDD 1 µF GND 2x 100 nF (place close to device VDD/GND pins) GPIO PP NC/NCI SLB 9670 Schematic_SLB9670.vsd Figure 2 Data Sheet Typical Schematic 9 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module TPM Properties 4 TPM Properties All properties defined within the TPM can be read with the command TPM2_GetCapability (capability = TPM_CAP_TPM_PROPERTIES). The values are vendor dependent or determined by a platform-specific specification. The following properties are returned by the Infineon OPTIGA™ TPM SLB 9670: Table 6 Infineon Specific Property Values TPM_PT_MANUFACTURER “IFX” TPM_PT_VENDOR_STRING_1 “SLB9” TPM_PT_VENDOR_STRING_2 “670” TPM_PT_VENDOR_STRING_3 NULL TPM_PT_VENDOR_STRING_4 NULL TPM_PT_FIRMWARE_VERSION_1 Major and minor version (for instance, 0x00070055 indicates V7.85) TPM_PT_FIRMWARE_VERSION_2 Build number and Common Criteria certification state (for instance, 0x0011CB00 or 0x0011CB02) Byte 1: reserved for future use (0x00) Byte 2 and 3: Build number (for instance, 0x11CB) Byte 4: Common Criteria certification state, 0x00 means TPM is CC certified, 0x02 means TPM is not certified TPM_PT_MODES Bit 0 (FIPS_140_2) = 1 Bits 1..31 = 0 Reading these properties returns the current version and state of the firmware. This implies that the values read back might differ from the ones shown in Table 6 above. Data Sheet 10 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Electrical Characteristics 5 Electrical Characteristics This chapter lists the maximum and operating ranges for various electrical and timing parameters. 5.1 Absolute Maximum Ratings Table 7 Absolute Maximum Ratings Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Supply Voltage VDD -0.3 – 5.0 V – Voltage on any pin Vmax -0.3 – VDD+0.3 V – -0.5 – VDD+0.5 V VDD = 3.3V ± 10%; pins MISO, MOSI, SCLK and CS# Ambient temperature TA -20 – 85 °C Standard temperature devices Ambient temperature TA -40 – 85 °C Enhanced temperature devices Storage temperature TS -40 – 125 °C – ESD robustness HBM: 1.5 kΩ, 100 pF VESD,HBM – – 2000 V According to EIA/JESD22-A114-B ESD robustness VESD,CDM – – 500 V According to ESD Association Standard STM5.3.1 - 1999 Latchup immunity Ilatch 100 mA According to EIA/JESD78 Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 5.2 Functional Operating Range Table 8 Functional Operating Range Parameter Supply Voltage Symbol VDD Values Unit Note or Test Condition Min. Typ. Max. 3.0 3.3 3.6 V – 1.65 1.8 1.95 V – Ambient temperature TA -20 – 85 °C Standard temperature devices Ambient temperature TA -40 – 85 °C Enhanced temperature devices Useful lifetime – – 10 y Operating lifetime – – 10 y Average TA over lifetime – 55 – °C Data Sheet 11 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Electrical Characteristics 5.3 DC Characteristics TA = 25°C, VDD = 3.3V ± 0.3V or VDD = 1.8V ± 0.15V unless otherwise noted. Table 9 Current Consumption Parameter Symbol Values Min. Current Consumption in Active Mode IVDD_Active Current Consumption in Sleep Mode IVDD_Sleep Typ. Unit Note or Test Condition Max. 25 mA 110 µA Pin PP = GND, pins GPIO, RST# and PIRQ# = VDD, CS# inactive (= VDD), MOSI, MISOand SCLK don't care Note: Current consumption does not include any currents flowing through resistive loads on output pins! Table 10 DC Characteristics of SPI Interface Pins (SCLK, CS#, MISO, MOSI, RST#, PIRQ#) Parameter Symbol Values Min. Input voltage high Input voltage low Input leakage current VIH VIL ILEAK Typ. Unit Note or Test Condition Max. 0.7 VDD VDD+0.5 V VDD,typ = 3.3V, only pins SCLK, MISO, MOSI and CS# 0.7 VDD VDD+0.3 V VDD,typ = 3.3V, pin RST# 0.7 VDD VDD+0.3 V VDD,typ = 1.8V -0.5 0.3 VDD V VDD,typ = 3.3V, only pins SCLK, MISO, MOSI and CS# -0.3 0.3 VDD V VDD,typ = 3.3V, pin RST# -0.3 0.3 VDD V VDD,typ = 1.8V -20 20 µA 0V < VIN < VDD -150 150 µA Pins SCLK, CS#, MISO, MOSI -0.5V < VIN < VDD+0.5V VDD,typ = 3.3V -150 150 µA Pin RST# -0.5V < VIN < VDD+0.3V VDD,typ = 3.3V -150 150 µA -0.3V < VIN < VDD+0.3V VDD,typ = 1.8V V IOH = -100µA IOL = 1.5mA 0.9 VDD Output high voltage VOH Output low voltage VOL 0.1 VDD V Pad input capacitance CIN 10 pF 40 pF Output load capacitance CLOAD Data Sheet 12 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Electrical Characteristics Table 11 DC Characteristics of GPIO and PP Pins Parameter Symbol Values Min. Typ. Unit Note or Test Condition Max. Input voltage high VIH 0.7 VDD VDD+0.3 V Pins GPIO and PP Input voltage low VIL -0.3 0.2 VDD V Pins GPIO and PP Input leakage current ILEAK -20 20 µA 0V < VIN < VDD -150 150 µA -0.3V < VIN < VDD + 0.3V V IOH = -1mA, pin GPIO Output high voltage VOH Output low voltage VOL 0.3 V IOL < 1mA, pin GPIO Pad input capacitance CIN 10 pF Pins GPIO and PP 5.4 0.7 VDD AC Characteristics TA = 25°C, VDD = 3.3V ± 0.3V or VDD = 1.8V ± 0.15V unless otherwise noted. Table 12 Device Reset Parameter Symbol Values Min. Typ. Unit Note or Test Condition Max. Cold (Power-On) Reset tPOR 80 µs see Section 5.5 Warm Reset tWRST 2 µs see Section 5.5 Reset Inactive Time tRSTIN 60 ms see Section 5.5 tPOR VDD tRSTIN tWRST tRSTIN tWRST tRSTIN TPM commands RST# RST_Timing.vsdx Figure 3 RST# Timing Table 13 AC Characteristics of SPI Interface Parameter Symbol Values Min. SCLK frequency SCLK period Data Sheet Typ. 1/fCLK 5% Note or Test Condition 43 MHz VDD,typ = 3.3V, tSLEW ≥ 1V/ns 22.5 MHz VDD,typ = 1.8V, tSLEW ≥ 1V/ns 38 MHz VDD,typ = 3.3V, tSLEW < 1V/ns 18.5 MHz VDD,typ = 1.8V, tSLEW < 1V/ns 1/fCLK + 5% µs Rising edge to rising edge, measured at VIN = 0.5 VDD Max. fCLK tCLK Unit 1/fCLK 13 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Electrical Characteristics Table 13 AC Characteristics of SPI Interface (continued) Parameter Symbol Values Min. Typ. Unit Note or Test Condition Max. SCLK low time tCLKL 0.45 tCLK µs Falling edge to rising edge, measured at VIN = 0.5 VDD SCLK high time tCLKH 0.45 tCLK µs Rising edge to falling edge, measured at VIN = 0.5 VDD SCLK slew rate (rising/falling) tSLEW 0.216 V/ns between 0.2 VDD and 0.6 VDD CS# high time tCS 50 ns Rising edge to falling edge 60 ns VDD,typ = 1.8V and tSLEW < 1V/ns, rising edge to falling edge, TPM protocol abort only 5 ns CS# falling edge to SCLK rising edge 7 ns VDD,typ = 1.8V and tSLEW < 1V/ns, CS# falling edge to SCLK rising edge CS# setup time tCSS 4 CS# hold time tCSH 5 ns SCLK falling edge to CS# rising edge MOSI setup time tSU 2 ns Data setup time to SCLK rising edge MOSI hold time tH 3 ns Data hold time from SCLK rising edge MISO hold time tHO 0 ns Output hold time from SCLK falling edge MISO valid delay time tV 0 ns Output valid delay from SCLK falling edge 5.5 0.7 tCLKL Timing Some pads are disabled after deassertion of the reset signal for up to 500 µs. The OPTIGA™ TPM SLB 9670 features a sophisticated protection mechanism against dictionary attacks on TPMbased authorization data. Basically, the device counts the number of failed authorization attempts in a counter which is located in the non-volatile memory. An attacker who has physical access to the device could try to cirumvent that mechanism by resetting the device after the authorization attempt but before the updated failure counter has been written into the NVM. Certain countermeasures have been added to the OPTIGA™ TPM SLB 9670. In certain time windows during power-on or warm boot of the device, such reset events might influence the dictionary attack counters and trigger other security mechanisms as well. In worst case, this might trigger special security defense modes from which a recovery is very complex or even not possible. To avoid that the OPTIGA™ TPM SLB 9670 reaches such a security defense state, the RST# signal must not be asserted in certain time windows. After the deassertion of the RST# signal, the system should wait for a minimum time of tRSTIN before asserting RST# again (see Figure 3 and Table 12). TPM commands should only be started after tRSTIN has expired (see Figure 3 again). If a TPM command is running, RST# should not be asserted; otherwise, this might also trigger some security functions. When the TPM shall be reset, the command TPM2_Shutdown should be issued before the assertion of the RST# signal. Data Sheet 14 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Package Dimensions (VQFN) 6 Package Dimensions (VQFN) All dimensions are given in millimeters (mm) unless otherwise noted. The packages are “green” and RoHS compliant. 7 x 0.5 = 3.5 5 A 0.5 0.9 MAX. 0.1 A 2x B 17 32x 0.05 C 0.1 C 24 25 0.1 B 2x SEATING PLANE 5 3.6 ±0.1 16 Index Marking 9 32 8 1 3.6 ±0.1 C (0.2) (4.2) 0.4 ±0.05 0.05 MAX. Figure 4 Package Dimensions PG-VQFN-32-13 6.1 Packing Type Index Marking 32x 0.25 +0.05 -0.07 0.1 M A B C 0.05 M C PG-VQFN-32-13-PO V01 PG-VQFN-32-13: Tape & Reel (reel diameter 330mm), 5000 pcs. per reel 0.3 5.25 12 8 5.25 Index Marking 1.1 PG-VQFN-32-13-TP V01 Figure 5 Tape & Reel Dimensions PG-VQFN-32-13 6.2 Recommended Footprint Figure 6 shows the recommended footprint for the PG-VQFN-32-13 package. The exposed pad of the package is internally connected to GND. It shall be connected to GND externally as well. 4.1 3.6 3.6 0.5 4.1 0.7 Package outline 5 x 5 0.25 PG-VQFN-32-13-FP V01 Figure 6 Data Sheet Recommended Footprint PG-VQFN-32-13 15 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Package Dimensions (VQFN) 6.3 Chip Marking Line 1: SLB9670 Line 2: VQ20 yy or XQ20 yy (see Table 1), the is an internal FW indication (only at manufacturing due to field upgrade option) Line 3: H Infineon 1234567 VQ20 YY XXH Softwarecode Lot Code Figure 7 ChipMarking _VQFN.vsd Chip Marking PG-VQFN-32-13 For details and recommendations regarding assembly of packages on PCBs, please refer to http://www.infineon.com/cms/en/product/technology/packages/ Data Sheet 16 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module References References [1] —, “Trusted Platform Module Library (Part 1-4)”, Family 2.0, Level 00, Rev. 01.16, 2014-10-30, TCG [2] —, “Trusted Platform Module Library (Part 1-4)”, Family 2.0, Level 00, Rev. 01.38, 2016-09-29, TCG [3] —, “TCG PC Client Platform TPM Profile (PTP) Specification”, Family 2.0, Level 00, Rev. 01.03 v22, May 22, 2017, TCG Data Sheet 17 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Terminology Terminology ESW Embedded Software HMAC Hashed Message Authentication Code PCR Platform Configuration Register PUBEK Public Endorsement Key SPI Serial Peripheral Interface (bus) TCG Trusted Computing Group TPM Trusted Platform Module TSS TCG Software Stack Data Sheet 18 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Licenses and Notices Licenses and Notices The following License and Notice Statements are reproduced from [2]. Licenses and Notices 1. Copyright Licenses: Trusted Computing Group (TCG) grants to the user of the source code in this specification (the "Source Code") a worldwide, irrevocable, nonexclusive, royalty free, copyright license to reproduce, create derivative works, distribute, display and perform the Source Code and derivative works thereof, and to grant others the rights granted herein.The TCG grants to the user of the other parts of the specification (other than the Source Code) the rights to reproduce, distribute, display, and perform the specification solely for the purpose of developing products based on such documents. 2. Source Code Distribution Conditions: Redistributions of Source Code must retain the above copyright licenses, this list of conditions and the following disclaimers. Redistributions in binary form must reproduce the above copyright licenses, this list of conditions and the following disclaimers in the documentation and/or other materials provided with the distribution. 3. Disclaimers: THE COPYRIGHT LICENSES SET FORTH ABOVE DO NOT REPRESENT ANY FORM OF LICENSE OR WAIVER, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, WITH RESPECT TO PATENT RIGHTS HELD BY TCG MEMBERS (OR OTHER THIRD PARTIES) THAT MAY BE NECESSARY TO IMPLEMENT THIS SPECIFICATION OR OTHERWISE. Contact TCG Administration (admin@trustedcomputinggroup.org) for information on specification licensing rights available through TCG membership agreements. THIS SPECIFICATION IS PROVIDED "AS IS" WITH NO EXPRESS OR IMPLIED WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, ACCURACY, COMPLETENESS, OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. Without limitation, TCG and its members and licensors disclaim all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification and to the implementation of this specification, and TCG disclaims all liability for cost of procurement of substitute goods or services, lost profits, loss of use, loss of data or any incidental, consequential, direct, indirect, or special damages, whether under contract, tort, warranty or otherwise, arising in any way out of use or reliance upon this specification or any information herein. Any marks and brands contained herein are the property of their respective owners. Data Sheet 19 Revision 1.4 2018-12-07 OPTIGA™ TPM SLB 9670 TPM2.0 Trusted Platform Module Revision History Page or Item Subjects (major changes since previous revision) Revision 1.4, 2018-12-07 Inserted new Chapter 4 describing TPM properties. Revision 1.3, 2018-11-26 Deleted UQFN package. Revision 1.2, 2018-09-21 Updated document template. Added details to Section 5.5. Revision 1.1, 2016-08-30 New document template. Changed SPI AC parameters (maximum clock frequeny, permissible SCLK slew rate, chip select high time and chip select setup time) in Table 13. Revision 1.0, 2015-11-05 Initial version. Data Sheet 20 Revision 1.4 2018-12-07 Please read the Important Notice and Warnings at the end of this document Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-12-07 Published by Infineon Technologies AG 81726 Munich, Germany © 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: security.chipcard.ics@infineon.com IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 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