EUP2520JIR1

Preliminary EUP2520 Dual Output Step-Up Converter for White LED Backlighting and OLED Display Power Supply DESCRIPTION The EUP2520 is a dual step-up DC/DC converter, uses a single inductor and a schottky diode to provide two outputs. One is designed to drive up to 5 white LEDs with a constant current and the other is to power an organic LED display with a constant voltage. Each output is enabled by individual logic inputs. A single external resistor is used to set the maximum LED current. The LED current can be adjusted by applying a PWM signal to the EN pin. For higher efficiency the EUP2520 operates with pulse frequency modulation (PFM) control scheme when the sub-display is enabled. When Main display is enabled, the device is operating in PWM mode. Overvoltage protection circuitry and a 1MHz switching frequency allow for the use of small, low cost external components. Additional features include a low-side NFET switch that can turn off the LED string with no DC current path to ground. The EUP2520 is available in a small 12-pin thermally- enchanced TDFN package. FEATURES 2.7V to 5.5V Input Voltage Range Up to 5 LEDs at 20mA and 4 LEDs at 30mA for Main-display Backlighting Up to 20V @ 50mA for OLED Sub-display Output True shutdown 80% Efficiency 0.7A DMOS Switch 1MHz Switching Frequency 23V Over Voltage Protection Cycle-By-Cycle Current Limit PWM Dimming Control 3mm × 3mm TDFN-12 Package RoHS Compliant and 100% Lead (Pb)-Free APPLICATIONS Clam-shell Cellular Phones with OLED/LCD Displays Typical Application Circuit Figure 1. DS2520 Ver0.1 May. 2007 1 Preliminary Pin Configurations Package Type Pin Configurations EUP2520 TDFN-12 Pin Description PIN VSW VIN AGND MAIN_EN SUB_EN PWM SUB_FB VSUB VO_MAIN MAIN_FB MAIN_RTN DGND Pin 1 2 3 4 5 6 7 8 9 10 11 12 Switching Voltage Input Voltage Analog Ground Main Enable Sub Display Enable PWM Dimming for Main Display, When PWM=HIGH, White LEDs operating at maximum current Sub Display Feedback Sub Display Power Supply Voltage Main Output Voltage Main Display Feedback Main Display Return Voltage Digital Ground DESCRIPTION DS2520 Ver0.1 May. 2007 2 Preliminary Ordering Information Order Number EUP2520JIR1 Package Type TDFN-12 Marking EUP2520 Operating Temperature range -40 °C to 125°C xxxxx 2520A EUP2520 □□□ □ Lead Free Code 1: Lead Free 0: Lead Packing R: Tape & Reel Operating temperature range I: Industry Standard Package Type J: TDFN Block Diagram Figure 2. DS2520 Ver0.1 May. 2007 3 Preliminary Absolute Maximum Ratings VIN ----------------------------------------------------------------------------VO_MAIN ------------------------------------------------------------------------VSW -----------------------------------------------------------------------------Main_FB, Main_RTN, MAIN_EN, PWM & SUB_EN ----------------Thermal Resistance TDFN-12 (θJA)---------------------------------------------------------------Maximum Junction Temperature (TJ-MAX)---------------------------------Junction Temperature Rang (TJ)--------------------------------------------Storage Temperature Range -------------------------------------------------Lead Temperature (Soldering, 10sec.) -------------------------------------- EUP2520 -0.3V to 6V -0.3V to 25V -0.3V to VOUT+0.3V -0.3V to 6V 55°C /W 150°C -40°C to 125°C -65°C to 150°C 265°C Recommended Operating Conditions Supply Voltage, VIN ------------------------------------------------------------ 2.7V to 5.5V Operating Temperature Rang (TA)-------------------------------------------- -40°C to 85°C Electrical Characteristics VIN=3.6V, L=10uH, CIN=10uF, COUT=1uF, CSUB=4.7uF, RSUB1=100KΩ, RSUB2=6.6KΩ,TA=-40℃ to 85℃, Unless otherwise noted. Typical Values are at TA=25℃. Symbol Enable Threshold IEN Low high Parameter Conditions EUP2520 Min Typ Max. 0.3 0.95 Unit V MAIN_EN=3.6V Enable Pin Current SUB_EN=3.6V PWM=3.6V Quiescent Current , Device Not MAIN_FB>0.5V Switching (PWM mode) Quiescent Current , Device Not SUB_FB>1V Switching (PFM mode) Quiescent Current , Device Not MAIN_EN=0V or SUB_EN=0V (open loop) Switching MAIN_EN=0V Power Off Current (Shutdown) SUB_EN=0V PWM=0V Feedback Voltage (MAIN_FB) VIN=3.6V Feedback Voltage (SUB_FB) FB Pin Leakage Current FB Pin Bias Current Switch Current Limit Main_Switch RDS(ON), N1 PMOS Switch RDS(ON), P1 Main_RTN RDS(ON), N2 VIN=3.6V MAIN_FB=0.5V SUB_FB=0V VMAIN_FB=0V,VIN=3.6V ISW=300mA IPMOS=20mA IMain_RTN=30mA 0.5 3 3 3 0.5 0.25 1.75 1 0.455 1.18 0.5 1.23 10 50 0.7 0.5 3 3 5 5 5 0.8 0.45 4.5 2 0.545 1.28 µA V nA 0.9 A Ω mA µA IQ VFB IB ICurrent Limit RDS(ON) DS2520 Ver0.1 May. 2007 4 Preliminary Electrical Characteristics EUP2520 VIN=3.6V, L=10uH, CIN=10uF, COUT=1uF, CSUB=4.7uF, RSUB1=100KΩ, RSUB2=6.6KΩ,TA=-40℃ to 85℃, Unless otherwise noted. Typical Values are at TA=25℃. Symbol Parameter Conditions VMain_RTN=0.5V, VIN=3.6V VFB=0V, VIN=3.6V VIN=3.6V VSW=24V Rising Falling Rising Falling VOUT=VIN, MAIN_EN=SUB_EN=0V VOUT=20V,SUB_EN=0 EUP2520 Min Typ Max. 0.2 92 0.8 22.2 21.5 2.35 2.3 1.1 0.01 23.2 22.5 2.45 2.4 0.1 40 60 1.4 0.5 24.2 23.5 2.58 2.53 Unit µA % MHz µA V V nA µA Imain_RTN_leakage Main_RTN Leakage Current DLimit FSW ILeak OVP UVP IVout_main_leak IVout_main_bias Duty Cycle Limit at PWM & PFM Switching Frequency Switching Leakage Current Threshold Threshold VOUT Leakage Current VOUT Bias Current at No Load DS2520 Ver0.1 May. 2007 5 Preliminary Typical Operating Characteristics EUP2520 DS2520 Ver0.1 May. 2007 6 Preliminary EUP2520 DS2520 Ver0.1 May. 2007 7 Preliminary EUP2520 DS2520 Ver0.1 May. 2007 8 Preliminary Operation Modes The EUP2520 has two operating modes; Figure 3 shows main display in PWM current mode operation, the appropriate selection of RFB resistor in series with four white LEDs set the output current driving the main display. Figure 4 shows Sub display in PFM mode, the appropriate selection of RSUB1 and RSUB2 resistors set the output voltage driving the OLED subdisplay. EUP2520 Circuit Description The EUP2520 is designed for White LED & OLED backlighting in mobile phone applications. It has a main display loop which can drive up to 5 white LEDS in series and a sub display loop which is designed to drive OLED up to 20V/50 mA. The main display loop employs a fixed frequency current mode scheme to regulate the LED current. The sub display loop employs a fixed frequency gated oscillator scheme to regulate the output voltage. The device has two independent control pins to enable the Main or Sub displays. Note that both displays can not be ON at the same time PWM Operation The EUP2520 utilizes a synchronous Current Mode PWM control scheme to regulate the feedback voltage over all load and line conditions for the main display. The EUP2520 is internally compensated preventing the need for external compensation components yielding a compact solution. The operation can best be understood referring to the functional block diagram. The EUP2520 operates as follows: During the first cycle, the oscillator sets the driver logic and turns on the NMOS power device conducting current through the inductor and reverse biases the external diode isolating the output from the VSW node. The LED current is supplied by the output capacitor when the NMOS power device is active. During this cycle, the output voltage of the EAMP controls the current through the inductor. This voltage will increase for larger loads and decrease for smaller loads limiting the peak current in the inductor. The sum of the EAMP voltage and voltage ramp is compared with the sensed switch voltage. Once these voltages are equal, the PWM COMP will then reset the logic turning off the NMOS power device and forward biasing the external diode to the white LED load and flows through the diode to the white LED load and output capacitor. The inductor current recharges the output capacitor and supplies the current for the white LED branches. The oscillator then sets the driver logic again repeating the process. PFM Operation The EUP2520 utilizes a gated oscillator control scheme for the sub-display. There is a hysteresis window to regulate the output voltage. The oscillator frequency is the same as the frequency in PWM control. The Duty cycle of the oscillator signal is always set to maximum. During the first part of each switching cycle, the internal NMOS switch is turned on until the PFM current limit is reached. When the NMOS is off, the voltage of the inductor reverses and forces current through the diode to the output capacitor. This process continues until the upper comparator hysteresis is reached at which point the NMOS is disabled until the lower comparator threshold is reached and the process repeats again. Figure 3. Main Display I LED = (VMAIN _ FB − VMAIN _ RTN ) R FB Figure 4. Sub Display VSUB = (R SUB1 + R SUB2 ) R SUB2 ∗ VSUB _ FB 9 DS2520 Ver0.1 May. 2007 Preliminary Current Limit Protection The EUP2520 has current limiting protection to prevent excessive stress on itself and external components during overload conditions. The internal current limit comparator will disable the NMOS power device at a typical switch peak current limit of 700 mA. Output Over-Voltage Protection The EUP2520 contains dedicated circuitry for monitoring the output voltage. In the event that the primary LED network is disconnected the output will increase and be limited to 23.2V(typ.). There is a ~1V hysteresis associated with this circuitry, which will turn the NMOS off when the output voltage is at 24.2V(max.) until the output voltage reach 22.5V(typ.) or lower. The 23.5V limit allows the use of 25V 1 µF ceramic output capacitors creating an overall small solution for white LED applications. Under Voltage Protection The EUP2520 has an UVP comparator to turn the NMOS power device off in case the input voltage or battery voltage is too low preventing an on state of the power device conducting large amounts of current. Reliability and Thermal Shutdown The EUP2520 has an internal thermal shutdown function to protect the die from excessive temperatures. The thermal shutdown trip point is typically 160˚C, Normal operation resumes when the temperature drops below 140˚C. Startup The EUP2520 does not include a power on reset circuit and relies on external signal to monitor enable signal. In the event of under voltage condition, the device enable pin must be brought low until the input voltage is above the minimum guarantee voltage (2.7V). EUP2520 Application Information Setting LED Current The White LED current is set using the following equation: For main display: I LED = (VMAIN _ FB − VMAIN _ RTN ) R FB ---------------(1) PWM Dimming The LED current can be controlled using a PWM signal on the enable pin with frequencies in the range of 100 Hz to 1 kHz. While EUP2520 LED current can also be controlled with PWM signal on the PWM pin with frequencies in the range of 20kHz to 33kHz, and LED current is linearly proportional to the duty cycle, the PWM frequency above audible range will minimize audible noise from the inductor and/or output capacitor of the boost converter. The maximum LED current would be achieved with 100% duty cycle on PWM pin. Setting SUB Voltage Sub-display voltage is be set by choosing RSUB1 and RSUB2 as illustrated in Figure 5. If RSUB1>100K, a 0.1uF bypass capacitor should be added to improve performance ,VSUB is calculated as follow: VSUB = (R SUB1 + R SUB2 ) R SUB2 ∗ VSUB _ FB ---------(2) Figure 5. The above equation to solve for RSUB1. The EUP2520 is optimized for 20V at 30mA over the input voltage range, for higher output current up to 50mA is achieveable with a minimum input of 3.6V. If lower VSUB is desired, the output current capability will be higher. DS2520 Ver0.1 May. 2007 10 Preliminary Using VSUB in Current Mode Configuration If Vsub is used to drive a string of LEDs, instead of using figure 4 configuration (voltage mode). The LEDs can be arranged in current mode configuration to control load current. EUP2520 Inductor Selection The inductor used with EUP2520 must have a saturation current greater than the device switch peak current limit. Choosing inductors with low DCR decreases power losses and increases efficiency. A 10 µH inductor is optimal for the applications. If a smaller inductor is used, the larger the inductor ripple current. Care must be taken to select the inductor such that the peak current rating of the inductor accounts for maximum load current for the operating condition. It is best to select an inductor with a peak current rating of the maximum switch peak current of the device. The following equation is useful for determining the L min = 2 × IOUT _ MAX × VO − VIN _ MIN − VDIODE I 2 Peak × f max ( ) Figure 6. Main & Sub Enable The EUP2520 has two independent enable pins to control the main and sub displays. A high on the Main Enable signal will enable the main display. While a high on the Sub Enable pin will enable the sub display. When Main Display enable, PWM pin must be High or PWM Signal. Both Main & Sub enable pins should not be ON at the same time during normal operation. If for any reason, the main and Sub enable are high, the main display will enable by default and the sub display will disable by default. The following truth table summarize the logic state. Table 1. MAIN_EN 0 1 SUB_EN 0 X PWM X 1 0 PWM 0 1 X MAIN OFF ON OFF PWM DIMMING OFF SUB OFF OFF OFF OFF ON inductor value for a given application condition. Where IOUT_MAX=maximum output load current, VOUT= output voltage, VIN_VIN= minimum input voltage, VDIODE = diode forward voltage, IPEAK= Peak Current and fmax = maximum switch frequency. Diode Selection To maintain high efficiency, the average current rating of the schottky diode should be larger than the peak inductor current. Schottky diodes with a l ow forward drop and fast switching speeds are ideal for increasing efficiency in portable applications. Choose a reverse breakdown of the schottky diode larger than the output voltage. Some recommended diodes are MBR0530T1 from ON semiconductor and CMMSHI-40 from Central Semiconductor. Capacitor Selection Choose low ESR capacitors for the output to minimize output voltage ripple. Ceramic capacitors such as X5R and X7R are recommended for use as input and output filiters. These capacitors provide an ideal balance between small size, cost, reliability and performance. Do not use Y5V ceramic capacitors as hey have poor dielectric performance over temperature and poor voltage characteristic for a given value. For most applications, a 1 µF ceramic output capacitor is sufficient for the main-display. A minimum of 4.7µF output capacitor is recommended for VSUB output. Larger output capacitor can be used to reduce ripple voltage. The EUP2520 has a maximum OVP of 24.2V, a 25V minimum rated capacitor voltage is recommended for the application to ensure proper biasing. Local bypassing for the input is needed on EUP2520. Multi-layer ceramic capacitors with low ESR are a good choice for this as well. A 10 µF capacitor is sufficient for most applications. Using larger DS2520 Ver0.1 May. 2007 11 Preliminary capacitance decreases input voltage ripple on the input. Extra attention is required if smaller case size capacitor is used in the application. Smaller case size capacitor typically has less capacitance for a given bias voltage as compared to a larger case size capacitor with the same bias voltage. Please contact the capacitor manufacturer for detail information regarding capacitance verses case size. Layout Consideration As for any high frequency switcher, it is important to place the external components as close as possible to the IC to maximize device performance. Below are some layout recommendations: 1) Place input filter and output filter capacitors close to the IC to minimize copper trace resistance which will directly effect the overall ripple voltage. 2) Place the feedback network resistors in the Main and Sub display close to the IC. 3) Route noise sensitive trace away from noisy power components. 4) Connect the ground pins and filter capacitors together via a ground plane to prevent switching current circulating through the ground plane. Similarly the ground connection for the feedback network should tie directly to GND plane. If no ground plan is available, the ground connections should tie directly to the device GND pin. EUP2520 DS2520 Ver0.1 May. 2007 12 Preliminary Packaging Information TDFN-12 EUP2520 SYMBOLS A A1 b E D D1 E1 e L MILLIMETERS MIN. MAX. 0.70 0.80 0.00 0.05 0.18 0.30 2.90 3.10 2.90 3.10 2.40 1.70 0.45 0.30 0.50 INCHES MIN. 0.028 0.000 0.007 0.114 0.114 0.094 0.067 0.018 0.012 0.020 MAX. 0.031 0.002 0.012 0.122 0.122 DS2520 Ver0.1 May. 2007 13