74LVX240

74LVX240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs May 1993 Revised March 2005 74LVX240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description The LVX240 is an octal inverting buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems. Features s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX240M 74LVX240SJ 74LVX240MTC Package Number M20B M20D MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol IEEE/IEC Pin Descriptions Pin Names OE1, OE2 I0–I7 O0–O7 Description 3-STATE Output Enable Inputs Inputs Outputs Truth Tables Inputs OE1 L L In L H X Inputs OE2 L L H H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Outputs (Pins 12, 14, 16, 18) H L Z Outputs In L H X (Pins 3, 5, 7, 9) H L Z Connection Diagram H © 2005 Fairchild Semiconductor Corporation DS011609 www.fairchildsemi.com 74LVX240 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI 0.5V to 7.0V 20 mA 0.5V to 7V 20 mA 20 mA 0.5V to VCC  0.5V r25 mA r75 mA 65qC to 150qC 180 mW Recommended Operating Conditions (Note 2) Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Input Rise and Fall Time ('t/'V) 2.0V to 3.6V 0V to 5.5V 0V to VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO VO 40qC to 85qC 0 ns/V to 100 ns/V 0.5V VCC  0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND ) Storage Temperature (TSTG) Power Dissipation (PD) Note 1: Absolute Maximum Ratings are those values beyond which the safety to the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VOH HIGH Level Output Voltage VOL LOW Level Output Voltage IOZ IIN ICC 3-STATE Output Off-State Current Input Leakage Current Quiescent Supply Current 3.6 3.6 VCC 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 2.0 3.0 3.0 3.6 1.9 2.9 2.58 0.0 0.0 0.1 0.1 0.36 2.0 3.0 TA Min 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.48 0.1 0.1 0.44 V VIN VIH or VIL V 25qC Typ Max TA 40qC to 85qC Min 1.5 2.0 2.4 0.5 0.8 0.8 Max Units Conditions V V VIN VIH or VIL IOH IOH IOH IOL IOL IOL VIN VOUT VIN VIN VIH or VIL VCC or GND 5.5V or GND VCC or GND 50 PA 50 PA 4 mA 50 PA 50 PA 4 mA r0.25 r0.1 4.0 r2.5 r1.0 40.0 PA PA PA Noise Characteristics (Note 3) Symbol VOLP VOLV VIHD VILD Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage tf 3 ns) VCC (V) 3.3 3.3 3.3 3.3 TA Typ 0.5 2 5 qC Limit 0.8 Units V V V V CL (pF) 50 50 50 50 0.5 0.8 2.0 0.8 Note 3: (Input tr www.fairchildsemi.com 2 74LVX240 AC Electrical Characteristics Symbol tPLH tPHL Parameter Propagation Delay Time 3.3 r 0.3 tPZL tPZH 3-STATE Output Enable Time 3.3 r 0.3 tPLZ tPHZ tOSLH tOSHL 3-STATE Output Disable Time Output to Output Skew (Note 4) 2.7 3.3 r 0.3 2.7 3.3 |t PLHm  tPLHn|, tOSHL VCC (V) 2.7 Min TA 25qC Typ 5.7 8.2 4.3 6.8 7.1 9.6 5.5 8.0 11.6 9.7 Max 10.1 13.6 6.2 9.7 13.8 17.3 8.8 12.3 16.0 11.4 1.5 1.5 |t PHLm  tPHLn| TA 40qC to 85qC Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 12.5 16.0 7.5 11.0 16.5 20.0 10.5 14.0 19.0 13.0 1.5 1.5 Units CL ns CL CL CL CL ns CL CL CL ns ns CL CL CL Conditions 15 pF 50 pF 15 pF 50 pF 15 pF, RL 50 pF, RL 15 pF, RL 50 pF, RL 50 pF, RL 50 pF, RL 50 pF 1 k: 1 k: 1 k: 1 k: 1 k: 1 k: 2.7 Note 4: Parameter guaranteed by design. tOSLH Capacitance Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (Note 5) Parameter Min TA 25qC Typ 4 6 17 10 Max 10 TA 40qC to 85qC Min Max 10 Units pF pF pF Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. 3 www.fairchildsemi.com 74LVX240 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 4 74LVX240 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74LVX240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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