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74LVX541

74LVX541

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    74LVX541 - Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
74LVX541 数据手册
74LVX541 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs September 1999 Revised April 2005 74LVX541 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description The LVX541 is an octal non-inverting buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems. Features s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX541M 74LVX541SJ 74LVX541MTC Package Number M20B M20D MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Logic Symbol IEEE/IEC Pin Descriptions Pin Names OE1, OE2 I0 - I7 O0 - O7 Descriptions 3-STATE Output Enable Inputs Inputs 3-STATE Outputs Truth Table Inputs OE1 L H X L H HIGH Voltage Level L LOW Voltage Level OE2 L X H L Outputs I H X X L H Z Z L X Immaterial Z High Impedance © 2005 Fairchild Semiconductor Corporation DS500291 www.fairchildsemi.com 74LVX541 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI 0.5V to 7.0V 20 mA 0.5V to 7V 20 mA 20 mA 0.5V to VCC  0.5V r25 mA r75 mA 65qC to 150qC 180 mW Recommended Operating Conditions (Note 2) Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Input Rise and Fall Time ('t/'V) 2.0V to 3.6V 0V to 5.5V 0V to VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO VO 40qC to 85qC 0 ns/V to 100 ns/V 0.5V VCC  0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) Power Dissipation Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VOH HIGH Level Output Voltage VOL LOW Level Output Voltage IOZ IIN ICC 3-STATE Output OFF-State Current Input Leakage Current Quiescent Supply Current VCC 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 2.0 3.0 3.0 3.6 3.6 3.6 1.9 2.9 2.58 0.0 0.0 0.1 0.1 0.36 2.0 3.0 TA Min 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.48 0.1 0.1 0.44 V VIN VIN VOUT VIN VIN V VIN 25qC Typ Max TA 40qC to 85qC Max 1.5 2.0 2.4 0.5 0.8 0.8 Min Units Conditions V V IOH VIH or VIL IOH IOH IOL VIH or VIL IOL IOL VIH or VIL VCC or GND 5.5V or GND VCC or GND 50 PA 50 PA 4 mA 50 PA 50 PA 4 mA r0.25 r0.1 4.0 r2.5 r1.0 40.0 PA PA PA Noise Characteristics (Note 3) Symbol VOLP VOLV VIHD VILD Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum HIGH Level Dynamic Input Voltage tf 3 ns. VCC (V) 3.3 3.3 3.3 3.3 Typ 0.5 TA 25qC Limits 0.8 Units V V V V CL CL CL CL Conditions 50 pF 50 pF 50 pF 50 pF 0.5 0.8 2.0 0.8 Note 3: Input tr www.fairchildsemi.com 2 74LVX541 AC Electrical Characteristics Symbol tPLH tPHL Parameter Propagation Delay Time 3.3 r 0.3 tPZL tPZH 3-STATE Output Enable Time 9.6 3.3 r 0.3 6.8 9.3 tPLZ tPHZ tOSLH tOSHL 3-STATE Output Disable Time Output to Output Skew (Note 4) 2.7 3.3 r 0.3 2.7 3.3 |tPLHm  tPLHn|; tOSHL |t PHLm  t PHLn|. VCC (V) 2.7 Min TA 2 5 qC Typ 6.1 8.6 4.7 7.2 7.1 Max 11.3 14.9 7.0 10.5 13.8 17.3 10.5 14.0 17.9 15.4 1.5 1.5 TA 40qC to 85qC Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 13.5 17.0 8.5 12.0 16.5 20.0 12.5 16.0 20.0 17.5 1.5 1.5 Units CL ns CL CL CL CL RL CL ns RL CL RL CL RL CL RL CL Conditions 15 pF 50 pF 15 pF 50 pF 15 pF 1 k: 50 pF 1 k: 15 pF 1 k: 50 pF 1 k: 50 pF 1 k: 50 pF 2.7 11.6 10.7 ns ns Note 4: Parameter guaranteed by design. tOSLH Capacitance Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (Note 5) Parameter TA Min 25qC Typ 4 6 19 Max 10 TA 40qC to 85qC Max 10 Min Units pF pF pF Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(opr.) CPD x VCC x fIN  ICC 8 (per bit) 3 www.fairchildsemi.com 74LVX541 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 4 74LVX541 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74LVX541 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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