74VCX245

74VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs June 1999 Revised April 2005 74VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs General Description The VCX245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state. The 74VCX245 is designed for low voltage (1.4V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The 74VCX245 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. Features s 1.4V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s Power-off high impedance inputs and outputs s Supports Live Insertion and Withdrawal (Note 1) s tPD 3.5 ns max for 3.0V to 3.6V VCC s Static Drive (IOH/IOL) r24 mA @ 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latchup performance exceeds 300 mA s ESD performance: Human body model ! 2000V Machine model ! 200V s Leadless DQFN Pb-Free package Note 1: To ensure the high impedance state during power up and power down, OEn should be tied to VCC through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Order Number 74VCX245WM (Note 2) 74VCX245BQX (Note 3) 74VCX245MTC (Note 2) Package Number M20B MLP020B MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free package per JEDEC J-STD-020B. Note 2: D evices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Note 3: D QFN package available in Tape and Reel only, Logic Symbol Pin Descriptions Pin Names OE T/R A0–A7 B0–B7 Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs © 2005 Fairchild Semiconductor Corporation DS500167 www.fairchildsemi.com 74VCX245 Connection Diagrams Pin Assignments for SOIC and TSSOP Truth Table Inputs OE L L H T/R L H X Bus B0–B7 Data to Bus A0–A7 Bus A0–A7 Data to Bus B0–B7 HIGH Z State on A0–A7, B0–B7 (Note 4) Outputs H H IGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Note 4: Unused bus terminals during HIGH Z State must be held HIGH or LOW. Logic Diagram Pin Assignment for DQFN (Top Through View) www.fairchildsemi.com 2 74VCX245 Absolute Maximum Ratings(Note 5) Supply Voltage (VCC) DC Input Voltage (VI) DC Output Voltage (VO) Outputs 3-STATE Outputs Active (Note 6) DC Input Diode Current (IIK) VI  0V DC Output Diode Current (IOK) VO  0V VO ! VCC DC Output Source/Sink Current (IOH/IOL) DC VCC or Ground Current Storage Temperature (TSTG) 0.5V to 4.6V 0.5V to 4.6V 0.5V to 4.6V 0.5V to VCC  0.5V 50 mA 50 mA 50 mA r50 mA r100 mA 65qC to 150qC Recommended Operating Conditions (Note 7) Power Supply Operating Input Voltage Output Voltage (VO) Output in Active States Output in 3-STATE Output Current in IOH/IOL VCC VCC VCC VCC 3.0V to 3.6V 2.3V to 2.7V 1.65V to 2.3V 1.4V to 1.6V 0V to VCC 0V to 3.6V 1.4V to 3.6V 0.3V to 3.6V Free Air Operating Temperature (TA) Minimum Input Edge Rate ('t/'V) VIN 0.8V to 2.0V, VCC 3.0V r24 mA r18 mA r6 mA r2 mA 40qC to 85qC 10 ns/V Note 5: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 6: IO Absolute Maximum Rating must be observed. Note 7: Floating or unused inputs must be held HIGH or LOW. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage Conditions VCC (V) 2.7 to 3.6 2.3 to 2.7 1.65 to 2.3 1.4 to 1.6 VIL LOW Level Input Voltage 2.7 to 3.6 2.3 to 2.7 1.65 to 2.3 1.4 to 1.6 VOH HIGH Level Output Voltage IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH Min 2.0 1.6 0.65 u VCC 0.65 u VCC 0.8 0.7 0.35 u V CC 0.35 u V CC VCC  0.2 2.2 2.4 2.2 VCC  0.2 2.0 1.8 1.7 VCC  0.2 1.25 VCC  0.2 1.05 V V V Max Units 100 PA 12 mA 18 mA 24 mA 100 PA 6 mA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 2.7 to 3.6 2.7 3.0 3.0 2.3 to 2.7 2.3 2.3 2.3 1.65 to 2.3 1.65 1.4 to 1.6 1.4 3 www.fairchildsemi.com 74VCX245 DC Electrical Characteristics Symbol VOL Parameter LOW Level Output Voltage IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL II IOZ IOFFI ICC Input Leakage Current 3-STATE Output Leakage Power-OFF Leakage Current Quiescent Supply Current Increase in ICC per Input (Continued) VCC (V) 100 PA 12 mA 18 mA 24 mA 100 PA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 2.7 to 3.6 2.7 3.0 3.0 2.3 to 2.7 2.3 2.3 1.65 to 2.3 1.65 1.4 to 1.6 1.4 1.4 to 3.6 1.4 to 3.6 0 1.4 to 3.6 1.4 to 3.6 2.7 to 3.6 0.2 0.4 0.4 0.55 0.2 0.4 0.6 0.2 0.3 0.2 0.35 V Conditions Min Max Units 0 d VI d 3.6V 0 d VO d 3.6V VI VI VIH VIH or VIL VCC or GND VCC 0.6V 0 d (VI, VO) d 3.6V VCC d (VI, VO) d 3.6V (Note 8) r5.0 r10 10 20 PA PA PA PA PA r20 750 'ICC Note 8: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol tPHL, tPLH Parameter Propagation Delay An to Bn or Bn to An CL tPZL, tPZH Output Enable Time CL CL (Note 9) Conditions VCC (V) 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 TA 40qC to 85qC Max 3.5 4.2 8.4 16.8 4.5 5.6 9.8 19.6 3.6 4.0 7.2 14.4 0.5 0.5 0.75 1.5 0.6 0.8 1.5 1.0 0.6 0.8 1.5 1.0 0.6 0.8 1.5 1.0 Units Figure Number Figures 1, 2 Figures 5, 6 Figures 1, 3, 4 Figures 5, 7, 8 Figures 1, 3, 4 Figures 5, 7, 8 Min 30 pF, RL 500: ns 15 pF, RL 30 pF, RL 2k: 500: 1.5 r 0.1 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 ns CL tPLZ, tPHZ Output Disable Time CL 15 pF, RL 30 pF, RL 2k: 500: 1.5 r 0.1 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 ns CL tOSHL tOSLH Output to Output Skew (Note 10) CL Note 9: For CL 15 pF, RL 30 pF, RL 2k: 500: 1.5 r 0.1 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 CL ns 15 pF, RL 2k: 1.5 r 0.1 50PF, add approximately 300 ps to the AC maximum specification. Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). www.fairchildsemi.com 4 74VCX245 Dynamic Switching Characteristics Symbol VOLP Parameter Quiet Output Dynamic Peak VOL CL 30 pF, VIH Conditions VCC, VIL 0V VCC (V) 1.8 2.5 3.3 VOLV Quiet Output Dynamic Valley VOL CL 30 pF, VIH VCC, V IL 0V 1.8 2.5 3.3 VOHV Quiet Output Dynamic Valley VOH CL 30 pF, VIH VCC, V IL 0V 1.8 2.5 3.3 TA 25qC 0.3 0.7 1.0 V Typical Units 0.3 0.7 1.0 1.3 1.7 2.0 V V Capacitance Symbol CIN CI/O CPD Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Parameter VI VI VI 0V or VCC, VCC 0V or VCC, VCC 0V or VCC, f Conditions 1.8V, 2.5V or 3.3V 1.8V, 2.5V or 3.3V 1.8V, 2.5V or 3.3V TA 25qC 6.0 7.0 20.0 Typical Units pF pF pF 10 MHz, VCC 5 www.fairchildsemi.com 74VCX245 AC Loading and Waveforms (VCC 3.3V r 0.3V to 1.8V r 0.15V) FIGURE 1. AC Test Circuit TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ VCC x 2 at VCC SWITCH Open 6V at VCC 3.3V r 0.3V; 2.5V r 0.2V; 1.8V r 0.15V GND FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol Vmi Vmo VX VY VCC 3.3V r 0.3V 1.5V 1.5V VOL  0.3V VOH  0.3V 2.5V r 0.2V VCC/2 VCC/2 VOL  0.15V VOH  0.15V 1.8V r 0.15V VCC/2 VCC/2 VOL  0.15V VOH  0.15V www.fairchildsemi.com 6 74VCX245 AC Loading and Waveforms (VCC 1.5 r 0.1V) TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ SWITCH Open VCC x 2 at VCC GND FIGURE 5. AC Test Circuit 1.5V r 0.1V FIGURE 6. Waveform for Inverting and Non-Inverting Functions FIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol Vmi Vmo VX VY VCC 1.5V r 0.1V VCC/2 VCC/2 VOL  0.1V VOH  0.1V 7 www.fairchildsemi.com 74VCX245 Tape and Reel Specification Tape Format for DQFN Package Designator BQX Tape Section Leader (Start End) Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed REEL DIMENSIONS inches (millimeters) Tape Size 12 mm A 13.0 (330.0) B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 2.165 (55.00) W1 0.488 (12.4) W2 0.724 (18.4) www.fairchildsemi.com 8 74VCX245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 9 www.fairchildsemi.com 74VCX245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm Package Number MLP020B www.fairchildsemi.com 10 74VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 11 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com