FAN102MY

FAN102 — Primary-Side-Control PWM Controller April 2009 FAN102 Primary-Side-Control PWM Controller Features Constant-Voltage (CV) and Constant-Current (CC) Control without Secondary-Feedback Circuitry Green Mode: Frequency Reduction at Light Load Fixed PWM Frequency at 42kHz with Frequency Hopping to Reduce EMI Cable Voltage Drop Compensation in CV Mode Low Startup Current: 10μA Low Operating Current: 3.5mA Peak-Current-Mode Control in CV Mode Cycle-by-Cycle Current Limiting VDD Over-Voltage Protection with Auto-Restart VDD Under-Voltage Lockout (UVLO) Gate Output Maximum Voltage Clamped at 18V Fixed Over-Temperature Protection with AutoRestart SOP-8 Package Available Description The primary-side PWM controller significantly simplifies power supply design that requires CV and CC regulation capabilities. The FAN102 controls the output voltage and current precisely with the information in the primary side of the power supply, not only removing the output current sensing loss, but eliminating all secondary feedback circuitry. The green-mode function with a low startup current (10µA) maximizes the light-load efficiency so the power supply can meet stringent standby power regulations. Compared with a conventional secondary-side regulation approach, the FAN102 can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. A typical output CV/CC characteristic envelope is shown in Figure 1. Applications Battery Chargers for Cellular Phones, Cordless Phones, PDA, Digital Cameras, Power Tools Replaces Linear Transformer and RCC SMPS Offline High Brightness (HB) LED Drivers Figure 1. Typical Output V-I Characteristic Ordering Information Part Number FAN102MY Operating Temperature Range -40°C to +105°C Eco Status Green Package 8-Lead, Small Outline Package (SOP-8) Packing Method Tape & Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com FAN102 — Primary-Side-Control PWM Controller Application Diagram CS N2 Bridge Rectifier Diode C DL R S N2 VO VDL + R S TAR T D DD R S N1 C S N1 DR CO IO NP NS DS N AC Line CDD NA FAN102 1 R C O MR C C O MR 2 3 4 CS C OMR C OMI C OMV G ATE V DD S G ND VS 8 7 6 5 R G ATE R S1 RC S R S2 C C O MI R C O MI C C O MV R C O MV CS Figure 2. Typical Application Internal Block Diagram + VDD SQ OTP VDD 7 28V Internal Bias - RQ Protection Reset Soft-Driver + 16V/5V OSC with Frequency Hopping VDD Good 8 Gate SQ + RQ + PWM Comparator PWM Comparator 1.3V Leading-Edge Blanking PWM Comparator Slope Compensation IO Estimator 2.5V Brownout Protection t DIS Detector - EA_I GND EA_V 6 3 COMI 4 COMV Figure 3. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 Functional Block Diagram www.fairchildsemi.com 2 - Green Mode Controller Cable Drop Compensation Temperature Compensation COMR + - 1 CS + + - 5 VS VO Estimator 2 FAN102 — Primary-Side-Control PWM Controller Marking Information F- Fairchild Logo Z- Plant Code X- 1-Digit Year Code Y- 1-Digit Week Code TT- 2-Digit Die Run Code T- Package Type (M=SOP) P- Z: Pb Free, Y: Green Package M- Manufacture Flow Code Figure 4. Top Mark Pin Configuration Figure 5. Pin Configuration Pin Definitions Pin # 1 2 3 4 5 6 7 8 Name CS COMR COMI COMV VS GND VDD GATE Description Current Sense. This pin connects a current-sense resistor to sense the MOSFET current for peak-current-mode control in CV mode and provides for output-current regulation in CC mode. Cable Compensation. This pin is connects a capacitor between COMR and GND for compensation voltage drop due to output cable loss in CV mode. Constant Current Loop Compensation. This pin is connects a capacitor and a resistor between COMI and GND for compensation current loop gain. Constant Voltage Loop Compensation. This pin is connects a capacitor and a resistor between COMV and GND for compensation voltage loop gain. Voltage Sense. This pin detects the output voltage information and discharges time base on voltage of auxiliary winding. This pin connects two divider resistors and one capacitor. Ground. Power Supply. IC operating current and MOSFET driving current are supplied using this pin. This pin is connected to an external VDD capacitor (typically 10μF). The threshold voltages for startup and turn-off are 16V and 5V, respectively. PWM Signal Output. This pin outputs PWM signal and includes the internal totem-pole output driver to drive the external power MOSFET. The clamped gate output voltage is 18V. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 3 FAN102 — Primary-Side-Control PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VDD VVS VCS VCOMV VCOMI PD ΘJA ΘJC TJ TSTG TL ESD DC Supply Voltage VS Pin Input Voltage CS Pin Input Voltage Parameter (1,2) Min. -0.3 -0.3 -0.3 -0.3 Max. 30 7.0 7.0 7.0 7.0 660 150 39 +150 Unit V V V V V mW °C /W °C /W °C °C °C kV V Voltage Error Amplifier Output Voltage Voltage Error Amplifier Output Voltage Power Dissipation (TA＜50°C) Thermal Resistance (Junction-to-Air) Thermal Resistance (Junction-to-Case) Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave Soldering or IR, 10 Seconds) Electrostatic Discharge Capability, Human Body Model, JEDEC- JESD22_A114 Electrostatic Discharge Capability, Charged Device Model, JEDEC- JESD22_C101 -55 +150 +260 4.5 1250 Notes: 1. Stresses beyond those listed under ”absolute maximum ratings” may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to GND pin. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature Conditions Min. -40 Typ. Max. +105 Unit °C © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 4 FAN102 — Primary-Side-Control PWM Controller Electrical Characteristics VDD=15V and TA=25°C unless otherwise specified. Symbol VDD Section VOP VDD-ON VDD-OFF IDD-OP IDD-ST IDD-GREEN VDD-OVP tD-VDDOVP Parameter Continuously Operating Voltage Turn-On Threshold Voltage Turn-Off Threshold Voltage Operating Current Startup Current Green-Mode Operating Supply Current VDD Over-Voltage Protection Level VDD Over-Voltage Protection Debounce Time Center Frequency Conditions Min. Typ. Max. 25 Units V V V mA μA mA V μs 15 4.5 VDD=20V, fs=fOSC, VVS=2V, VCS=3V, CL=1nF 0< VDD < VDD-ON-0.16V VDD=20V, VVS=2.7V fS=fOSC-N-MIN, VCS=0V CL=1nF, VCOMV=0V VCS=3V, VVS=2.3V fs=fOSC, VVS=2.3V 27 100 0 16 5.0 3.5 1.6 1 28 250 17 5.5 5.0 10.0 2 29 400 Oscillator Section TA=25°C TA=25°C TA=25°C VVS=2.7V, VCOMV=0V VVS=2.3V, VCS=0.5V VDD=10V to 25V TA=-40°C to +105°C 39 ±1.8 42 ±2.6 3 550 20 5 15 45 ±3.6 KHz ms Hz KHz % % fOSC tFHR fOSC-N-MIN fOSC-CM-MIN fDV fDT Frequency Frequency Hopping Range Frequency Hopping Period Minimum Frequency at No Load Minimum Frequency at CCM Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation Sink Current for Brownout Protection IC Compensation Bias Current Adaptive Bias Voltage Dominated by VCOMV Propagation Delay to GATE Output Minimum On Time at No Load Minimum On Time in CC Mode Threshold Voltage for Current Limit Voltage-Sense Section IVS-UVP Itc VBIAS-COMV RVS=20KΩ 180 9.5 VCOMV=0V, TA=25°C, RVS=20KΩ 1.4 μA μA V Current-Sense Section tPD tMIN-N tMINCC VTH 100 VVS=-0.8V, RS=2KΩ, VCOMV=1V VVS=0V, VCOMV=2V 1100 400 1.3 200 ns ns ns V Continued on the following page… © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 5 FAN102 — Primary-Side-Control PWM Controller Electrical Characteristics VDD=15V and TA=25°C unless otherwise specified. Symbol VVR VN VG IV-SINK IV-SOURCE VV-HGH VIR II-SINK II-SOURCE VI-HGH Parameter Reference Voltage Conditions Min. 2.475 Typ. 2.500 2.8 0.8 90 90 Max. 2.525 Units V V V μA μA V Voltage-Error-Amplifier Section Green Mode Starting Voltage on fS=fOSC-2KHz, VVS=2.3V COMV Pin Green Mode Ending Voltage on COMV Pin Output Sink Current Output Source Current Output High Voltage Reference Voltage Output Sink Current Output Source Current Output High Voltage VCS=3V, VCOMI=2.5V VCS=0V, VCOMI=2.5V VCS=0V 4.5 fS=1KHz VVS=3V, VCOMV=2.5V VVS=2V, VCOMV=2.5V VVS=2.3V 4.5 2.475 2.500 55 55 2.525 Current-Error-Amplifier Section V μA μA V Cable Compensation Section VCOMR Variation Test Voltage on COMR RCOMR=100KΩ Pin for Cable Compensation Maximum Duty Cycle Output Voltage LOW Output Voltage HIGH Output Voltage HIGH Rising Time Falling Time Output Clamp Voltage Threshold Temperature for (3) OTP VDD=20V, IO=10mA VDD=8V, IO=1mA VDD=5.5V, IO=1mA VDD=20V, CL=1nF VDD=20V, CL=1nF VDD=25V 5 4 200 80 15 300 150 18 0.735 V Gate Section DCYMAX VOL VOH VOH_MIN tr tf VCLAMP 75 1.5 % V V V ns ns V Over-Temperature-Protection Section TOTP +140 °C Note: 3. When over-temperature protection is activated, the power system enters auto restart mode and output is disabled. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 6 FAN102 — Primary-Side-Control PWM Controller Typical Performance Characteristics 17 16.6 5.5 5.3 VDD-OFF (V) -40 -30 -15 0 25 50 75 85 100 125 VDD-ON (V) 16.2 15.8 15.4 15 14.6 5.1 4.9 4.7 4.5 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 6. Turn-On Threshold Voltage (VDD-ON) vs. Temperature Figure 7. Turn-Off Threshold Voltage (VDD-OFF) vs. Temperature 4 47 45 43 41 39 37 35 -40 -30 -15 0 25 50 75 85 100 125 3.6 IDD-OP (mA) 3.2 2.8 2.4 2 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) fOSC (KHz) Temperature (ºC) Figure 8. Operating Current (IDD-OP) vs. Temperature Figure 9. Center Frequency (fOSC) vs. Temperature 2.525 2.525 2.515 2.515 VVR (V) 2.495 VIR (V) -40 -30 -15 0 25 50 75 85 100 125 2.505 2.505 2.495 2.485 2.485 2.475 2.475 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 10. Reference Voltage (VVR) vs. Temperature Figure 11. Reference Voltage (VIR) vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 7 FAN102 — Primary-Side-Control PWM Controller Typical Performance Characteristics 600 23 22 580 fOSC-CM-MIN (KHz) -40 -30 -15 0 25 50 75 85 100 125 fOSC-N-MIN (Hz) 21 20 19 18 17 -40 -30 -15 0 25 50 75 85 100 125 560 540 520 500 Temperature (ºC) Temperature (ºC) Figure 12. Minimum Frequency at No Load (fOSC-N-MIN) vs. Temperature Figure 13. Minimum Frequency at CCM (fOSC-CM-MIN) vs. Temperature 30 25 1250 1170 SG (KHz/V) tMIN-N (ns) -40 -30 -15 0 25 50 75 85 100 125 20 15 10 5 0 1090 1010 930 850 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 14. Green Mode Frequency Decreasing Rate (SG) vs. Temperature Figure 15. Minimum On Time at No Load (tMIN-N) vs. Temperature 3 2.5 2 1.5 1 0.5 0 -40 -30 -15 0 25 50 75 85 100 125 1 0.8 VG (V) VN (V) 0.6 0.4 0.2 0 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 16. Green Mode Starting Voltage on COMV Pin (VN) vs. Temperature Figure 17. Green Mode Ending Voltage on COMV Pin (VG) vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 8 FAN102 — Primary-Side-Control PWM Controller Typical Performance Characteristics 95 95 92 91 IV-SOURCE (µA) -40 -30 -15 0 25 50 75 85 100 125 IV-SINK (µA) 89 87 86 83 83 79 80 75 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 18. Output Sink Current (IV-SINK) vs. Temperature Figure 19. Output Source Current (IV-SOURCE) vs. Temperature 60 60 58 58 II-SOURCE (µA) -40 -30 -15 0 25 50 75 85 100 125 II-SINK (µA) 56 56 54 54 52 52 50 50 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 20. Output Sink Current (II-SINK) vs. Temperature Figure 21. Output Source Current (II-SOURCE) vs. Temperature 2 80 1.6 76 DCYMAX (%) -40 -30 -15 0 25 50 75 85 100 125 VCOMR (V) 1.2 72 0.8 68 0.4 64 0 60 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Temperature (ºC) Figure 22. Variation Test Voltage on COMR Pin for Cable Compensation (VCOMR) vs. Temperature Figure 23. Maximum Duty Cycle (DCYMAX) vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 9 FAN102 — Primary-Side-Control PWM Controller Functional Description Figure 24 shows the basic circuit diagram of primaryside regulated flyback converter with typical waveforms shown in Figure 25. Generally, discontinuous conduction mode (DCM) operation is preferred for primary-side regulation since it allows better output regulation. The operation principles of DCM flyback converter are as follows: During the MOSFET ON time (tON), input voltage (VDL) is applied across the primary-side inductor (Lm). Then MOSFET current (Ids) increases linearly from zero to the peak value (Ipk). During this time, the energy is drawn from the input and stored in the inductor. When the MOSFET is turned off, the energy stored in the inductor forces the rectifier diode (D) to turn on. While the diode is conducting, the output voltage (Vo), together with diode forward voltage drop (VF), are 2 applied across the secondary-side inductor (Lm×Ns / 2 Np ) and the diode current (ID) decreases linearly from the peak value (Ipk×Np/Ns) to zero. At the end of inductor current discharge time (tDIS), all the energy stored in the inductor has been delivered to the output. When the diode current reaches zero, the transformer auxiliary winding voltage (VW) begins to oscillate by the resonance between the primary-side inductor (Lm) and the effective capacitor loaded across MOSFET. During the inductor current discharge time, the sum of output voltage and diode forward voltage drop is reflected to the auxiliary winding side as (VO+VF)× NA/NS. Since the diode forward voltage drop decreases as current decreases, the auxiliary winding voltage reflects the output voltage best at the end of diode conduction time where the diode current diminishes to zero. By sampling the winding voltage at the end of the diode conduction time, the output voltage information can be obtained. The internal error amplifier for output voltage regulation (EA_V) compares the sampled voltage with internal precise reference to generate error voltage (VCOMV), which determines the duty cycle of the MOSFET in CV mode. Meanwhile, the output current can be estimated using the peak drain current and inductor current discharge time since output current is same as average of the diode current in steady state. The output current estimator picks up the peak value of the drain current with a peak detection circuit and calculates the output current using the inductor discharge time (tDIS) and switching period (tS). The output information is compared with internal precise reference to generate error voltage (VCOMI), which determines the duty cycle of the MOSFET in CC mode. Among the two error voltages, VCOMV and VCOMI, the smaller actually determines the duty cycle. During constant voltage regulation mode, VCOMV determines the duty cycle while VCOMI is saturated to high. During constant current regulation mode, VCOMI determines the duty cycle while VCOMV is saturated to HIGH. Np:Ns D + V DL VAC Gate EA_I VCOMI PWM Control V COMV EA_V Io Estimator Ref t DIS Detector Vo Estimator Ref ID Io + VO L O A D Lm + VF - - Ids CS RCS VS VDD RS1 RS2 NA + Vw - Primary-Side Regulation Controller Figure 24. Simplified PSR Flyback Converter Circuit Id s (MOSFET Drain-to-Source Current) I pk ID (Diode Current) I pk • NP NS I D .avg = I o VW (Auxiliary Winding Voltage) VF • NA NS VO • NA NS t ON t S t DI S Figure 25. Key Waveforms of DCM Flyback Converter © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 10 FAN102 — Primary-Side-Control PWM Controller Cable Voltage Drop Compensation When it comes to cellular phone charger applications, the actual battery is located at the end of cable, which causes typically several percent of voltage drop on the actual battery voltage. FAN102 has a programmable cable voltage drop compensation, which provides a constant output voltage at the end of the cable over the entire load range in CV mode. As load increases, the voltage drop across the cable is compensated by increasing the reference voltage of voltage regulation error amplifier. The amount of compensation is programmed by the resistor on the COMR pin. The relationship between the amount of compensation and COMR resistor is shown in Figure 26. 15 14 13 12 11 Switching Frequen cy 42kHz Deep Green Mode 550H z 0.8V Green Mode Normal Mode 2.8V V COMV Figure 27. Switching Frequency in Green Mode Compensation Percentage (%) 10 9 8 7 6 5 4 3 2 1 10 20 30 40 50 60 RCOMR (k ) 70 80 90 100 Frequency Hopping EMI reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. FAN102 has an internal frequency hopping circuit that changes the switching frequency between 39.4kHz and 44.6kHz with a period of 3ms, as shown in Figure 28. Gate Drive Signal t s Figure 26. Cable Voltage Drop Compensation Temperature Compensation Built-in temperature compensation provides constant voltage regulation over a wide range of temperature variation. This internal compensation current compensates the forward-voltage drop variation of the secondary-side rectifier diode. t s t fs 44.6kHz 42.0kHz 39.4kHz s 44.6kHz Green-Mode Operation The FAN102 uses voltage regulation error amplifier output (VCOMV) as an indicator of the output load and modulates the PWM frequency, as shown in Figure 27, such that the switching frequency decreases as load decreases. In heavy load conditions, the switching frequency is fixed at 42KHz. Once VCOMV decreases below 2.8V, the PWM frequency starts to linearly decrease from 42KHz to 550Hz to reduce the switching losses. As VCOMV decreases below 0.8V, the switching frequency is fixed at 550Hz and FAN102 enters deep green mode, where the operating current reduces to 1mA, further reducing the standby power consumption. 3ms t Figure 28. Frequency Hopping © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 11 FAN102 — Primary-Side-Control PWM Controller Leading-Edge Blanking (LEB) At the instant the MOSFET is turned on, a high-current spike occurs through the MOSFET, caused by primaryside capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the RCS resistor can lead to premature turn-off of MOSFET. FAN102 employs an internal leading-edge blanking (LEB) circuit. To inhibit the PWM comparator for a short time after the MOSFET is turned on. Thus, external RC filtering is not required. operation. In this manner, the auto-restart alternately enables and disables the switching of the MOSFET until the fault condition is eliminated (see Figure 30 ). Power On Fault Occurs Fault Removed VDS Startup Figure 29 shows the typical startup circuit and transformer auxiliary winding for a FAN102 application. Before FAN102 begins switching, it consumes only startup current (typically 10µA) and the current supplied through the startup resistor charges the VDD capacitor (CDD). When VDD reaches turn-on voltage of 16V (VDDFAN102 begins switching and the current ON), consumed by FAN102 increases to 3.5mA. Then, the power required for FAN102 is supplied from the transformer auxiliary winding. The large hysteresis of VDD provides more holdup time, which allows using a small capacitor for VDD. VDD 16V 5V Operating Current 3.5mA 10µA Normal Operation Fault Situation Normal Operation VD L + CD L RSTAR T DD D Np Figure 30. Auto-Restart Operation VDD over-voltage protection prevents damage from overvoltage conditions. If the VDD voltage exceeds 28V by open feedback condition, OVP is triggered. The OVP has a de-bounce time (typcal 250µs) to prevent false trigger by switching noise. It also protects other switching devices from over voltage. Over-Temperature Protection (OTP) A built-in temperature-sensing circuit shuts down PWM output if the junction temperature exceeds 140°C. Brownout Protection FAN102 detects the line voltage using auxiliary winding voltage since the auxiliary winding voltage reflects the input voltage when the MOSFET is turned on. The VS pin is clamped at 1.15V while the MOSFET is turned on and brownout protection is triggered if the current out of the VS pin is less than IVS-UVP (typical 180µA) during the MOSFET conduction. Pulse-by-Pulse Current Limit When the sensing voltage across the current sense resistor exceeds the internal threshold of 1.4V, the MOSFET is turned off for the remainder of switching cycle. In normal operation, the pulse-by-pulse current limit is not triggered since the peak current is limited by the control loop. VDD Over-Voltage Protection (OVP) AC Line CD D NA FAN102 1 2 3 4 CS COMR COMI COMV GATE 8 VDD SGND VS 7 6 5 RS1 RS2 Figure 29. Startup Circuit Protections The FAN102 has several self-protective functions, such as Over-Voltage Protection (OVP), Over-Temperature Protection (OTP) and brownout protection. All the protections are implemented as auto-restart mode. Once the fault condition occurs, switching is terminated and the MOSFET remains off. This causes VDD to fall. When VDD reaches the VDD turn-off voltage of 5V, the current consumed by FAN102 reduces to the startup current (typically 10µA) and the current supplied startup resistor charges the VDD capacitor. When VDD reaches the turn-on voltage of 16V, FAN102 resumes normal © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 12 www.fairchildsemi.com FAN102 — Primary-Side-Control PWM Controller Typical Application Circuit (Primary-Side Regulated Flyback Charger) Application Cell Phone Charger Fairchild Devices FAN102 Input Voltage Range 90~265VAC Output 5V/0.78A (3.9W) Features High efficiency (>68% at full load) meeting Energy Star Tight output regulation (CV:±5%, CC:±7%) 74 72 115V60Hz (70.7% avg) 70 6 SM V2.0 and CEC regulation with enough margin Low standby power consumption (Pin=0.087W for 115VAC and Pin=0.123W for 230V) 5 Output Voltage (V) Efficiency (%) 230V50Hz (68.3% avg) 68 66.3% : Energy Star V2.0 (Nov. 2008) 66 64 4 AC90V AC230V AC120V AC264V 3 2 62 1 62.2% : CEC (2008) 0 25 50 Load (%) 75 100 0 100 200 300 400 500 600 700 800 900 Output Current (mA) Figure 31. Measured Efficiency and Output Regulation CSN 2 RSN 2 1mH 1N4007 1N4007 1nF 30Ω LP 15µH VDL + RSTART 2MΩ IO VO 4.7µF 1N4007 1N4007 CDL2 1kΩ 4.7µF RSN1 100kΩ CS N1 1nF CDL1 N1 DS N N3 SB260 DR CO 470µF CP 220µF RPL 1kΩ RDAMP 270Ω DDD 1N4007 1N4007 AC Line CDD 10µF N2 QMOSFE T FAN102 RCOMR CCOMR 82kΩ 1µF 1 2 3 4 CS C OMR C OMI C OMV GATE 8 V DD S G ND VS RGATE 100Ω FQU1N60C 7 6 5 RS1 115kΩ RCS 1.6Ω RS2 24.9kΩ 68nF CCOMI 200kΩRCOMI CCOMV RCOMV 43kΩ 10nF CS 47pF Figure 32. Schematic of Typical Application Circuit © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 13 FAN102 — Primary-Side-Control PWM Controller Typical Application Circuit (Continued) Transformer specification Core: EE16 Bobbin: EE16 Pin Primary-Side Inductance Primary-Side Effective Leakage 1－3 1－8 Specification 2.3mH ± 5% 65μH ± 5%. 100kHz, 1V Remark Short one of the secondary windings © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 14 FAN102 — Primary-Side-Control PWM Controller Physical Dimensions 5.00 4.80 3.81 8 5 A 0.65 B 6.20 5.80 4.00 3.80 1 4 1.75 5.60 PIN ONE INDICATOR (0.33) 1.27 0.25 M CBA 1.27 LAND PATTERN RECOMMENDATION 0.25 0.10 1.75 MAX C 0.10 0.51 0.33 0.50 x 45° 0.25 C SEE DETAIL A 0.25 0.19 OPTION A - BEVEL EDGE R0.10 R0.10 GAGE PLANE 0.36 OPTION B - NO BEVEL EDGE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 8° 0° 0.90 0.406 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Figure 33. 8-Lead, Small Outline Package (SOP-8) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 15 FAN102 — Primary-Side-Control PWM Controller © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 16