FDMF6705V

FDMF6705V - XS™ DrMOS - Extra-Small High-Performance, High-Frequency DrMOS Module March 2011 FDMF6705V – XS™ DrMOS – Extra-Small, HighPerformance, High-Frequency DrMOS Module Benefits Single 12V Input Power Supply Operation Ultra-Compact 6x6mm PQFN, 72% Space-Saving Compared to Conventional Discrete Solutions Fully Optimized System Efficiency Clean Switching Waveforms with Minimal Ringing High-Current Handling Description The XS™ DrMOS family is Fairchild’s next-generation, fully optimized, ultra-compact, integrated MOSFET plus driver power stage solutions for high-current, highfrequency, synchronous buck DC-DC applications. The FDMF6705V integrates a driver IC, two power MOSFETs, and a bootstrap Schottky diode into a thermally enhanced, ultra-compact 6x6mm PQFN package. With an integrated approach, the complete switching power stage is optimized with regards to driver and MOSFET dynamic performance, system inductance, and Power MOSFET RDS(ON). XS™ DrMOS uses Fairchild's high-performance PowerTrench® MOSFET technology, which dramatically reduces switch ringing, eliminating the need for a snubber circuit in most buck converter applications. A new driver IC with reduced dead times and propagation delays further enhances the performance of this part. A thermal warning function has been included to warn of a potential over-temperature situation. The FDMF6705V also incorporates features, such as Skip Mode (SMOD), for improved light-load efficiency along with a 3-state PWM input for compatibility with a wide range of PWM controllers. Features Over 93% Peak-Efficiency High-Current Handling of 43A High-Performance PQFN Copper Clip Package 3-State 5V PWM Input Driver Shorter Propagation Delays than FDMF6704V Shorter Dead Times than FDMF6704V Skip-Mode SMOD# (Low-Side Gate Turn Off) Input Thermal Warning Flag for Over-Temperature Condition Driver Output Disable Function (DISB# Pin) Internal Pull-Up and Pull-Down for SMOD# and DISB# Inputs, Respectively Fairchild PowerTrench® Technology MOSFETs for Clean Voltage Waveforms and Reduced Ringing Fairchild SyncFET™ (Integrated Schottky Diode) Technology in the Low-Side MOSFET Integrated Bootstrap Schottky Diode Adaptive Gate Drive Timing for Shoot-through Protection Under-Voltage Lockout (UVLO) Optimized for Switching Frequencies up to 1MHz Low-Profile SMD Package Fairchild Green Packaging and RoHS Compliant Based on the Intel® 4.0 DrMOS Standard Applications High-Performance Gaming Motherboards Compact Blade Servers, V-Core and Non-V-Core DC-DC Converters Desktop Computers, V-Core and Non-V-Core DC-DC Converters W orkstations High-Current DC-DC Point-of-Load (POL) Converters Networking and Telecom Microprocessor Voltage Regulators Small Form-Factor Voltage Regulator Modules Ordering Information Part Number FDMF6705V Current Rating 40A Input Voltage 12V Switching Frequency 1000kHz Package 40-Lead, Clipbond PQFN DrMOS, 6.0x6.0mm Package Top Mark FDMF6705V www.fairchildsemi.com © 2011 Fairchild Semiconductor Corporation FDMF6705V • Rev. 1.0 1 FDMF6705V - XS™ DrMOS - Extra-Small High-Performance, High-Frequency DrMOS Module Typical Application Circuit VCIN VIN = 3V to 15V VDRV = 8V to 15 V VDRV THWN# Temp Sense 5V Linear Reg . VCIN VIN CVIN C VDRV DBoot BOOT C VCIN CGND HDRV Q1 PHASE LOUT VOUT PWM Control PWM VSWH COUT Control Enabled OFF ON SMOD # VCIN LDRV Q2 Disabled DISBL# CGND PGND Figure 1. Typical Application Circuit DrMOS Block Diagram VDRV VCIN BOOT VIN VIN UVLO VCC UVLO 5V LDO D Boot Q1 HS Power MOSFET DISB# 10 A GH Logic GH Level Shift 30kΩ VCIN PHASE RUP_PWM PWM RDN_PWM Input 3-State Logic Deadtime Control VSWH VCIN GL Logic GL THWN# Temp. Sense VCIN 30kΩ Q2 LS Power MOSFET 10 A CGND SMOD# PGND Figure 2. DrMOS Block Diagram © 2011 Fairchild Semiconductor Corporation FDMF6705V • Rev. 1.0.1 www.fairchildsemi.com 2 FDMF6705V - XS™ DrMOS - Extra-Small High-Performance, High-Frequency DrMOS Module Pin Configuration Figure 3. Bottom View Figure 4. Top View Pin Definitions Pin # 1 2 3 4 5, 37, 41 6 7 8 9 - 14, 42 15, 29 35, 43 16 – 28 36 38 39 40 Name Description W hen SMOD#=HIGH, the low-side driver is the inverse of PWM input. When SMOD#=LOW, SMOD# the low-side driver is disabled. This pin has a 10 A internal pull-up current source. Do not leave this pin floating. Do not add a noise filter capacitor. VCIN VDRV BOOT CGND GH Linear regulator 5V output. IC bias supply for gate drive output stage. Minimum 1 F ceramic capacitor is required and should be connected as close as possible from this pin to CGND Linear regulator input. Minimum 1 F ceramic capacitor is recommended and should be connected as close as possible from this pin to CGND. Bootstrap supply input. Provides voltage supply to high-side MOSFET driver. Connect bootstrap capacitor from this pin to PHASE. IC ground. Ground return for driver IC. For manufacturing test only. This pin must float. Must not be connected to any pin. No connect. The pin is not electrically connected internally, but can be connected to VIN for convenience. Power input. Output stage supply voltage. Switch node input. Provides return for high-side bootstrapped driver and acts as a sense point for the adaptive shoot-through protection. Power ground. Output stage ground. Source pin of low-side MOSFET. For manufacturing test only. This pin must float. Must not be connected to any pin. Thermal warning flag, open collector output. When temperature exceeds the trip limit, the output is pulled LOW. THWN# does not disable the module. Output disable. When LOW, this pin disables Power MOSFET switching (GH and GL are held LOW). This pin has a 10 A internal pull-down current source. Do not leave this pin floating. Do not add a noise filter capacitor. PWM signal input. This pin accepts a 3-state logic-level PWM signal from the controller. PHASE Switch node pin for bootstrap capacitor routing. Electrically shorted to VSWH pin. NC VIN VSWH PGND GL THWN# DISB# PWM © 2011 Fairchild Semiconductor Corporation FDMF6705V • Rev. 1.0.1 www.fairchildsemi.com 3 FDMF6705V - XS™ DrMOS - Extra-Small High-Performance, High-Frequency DrMOS Module Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIN to PGND, CGND Pins VDRV to PGND, CGND Parameter VCIN, DISB#, PWM, SMOD#, GL, THWN# to CGND Pins Min. Max. 6 25 16 6 25 22 43 40 3.5 Unit BOOT, GH to VSWH, PHASE Pins BOOT, VSWH, PHASE, GH to GND Pins BOOT to VCIN Pins IO(AV) (1) V VIN=12V, VO=1.0V Junction-to-PCB Thermal Resistance fSW =300kHz fSW =1MHz -55 2000 2000 A °C/W °C V θJPCB TSTG ESD Operating and Storage Temperature Range Electrostatic Discharge Protection Human Body Model, JESD22-A114 Charged Device Model, JESD22-C101 +150 Note: 1. IO(AV) is measured in Fairchild’s evaluation board. This rating can be changed with different application settings. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VDRV VIN Parameter Gate Drive Control Circuit Input Supply Voltage Output Stage Supply Voltage (2) Min. 8 3 Typ. 12 12 Max. 15 15 Unit V V Note: 2. May be operated at lower input voltage. © 2011 Fairchild Semiconductor Corporation FDMF6705V • Rev. 1.0.1 www.fairchildsemi.com 4 FDMF6705V - XS™ DrMOS - Extra-Small High-Performance, High-Frequency DrMOS Module Electrical Characteristics Typical values are VIN=12V, VDRV=12V, and TA=+25°C unless otherwise noted. Symbol IDRV VDRV IDRV VCIN PVDRV CVCIN VRLINE VRLOAD UVLO PWM Input RUP_PWM VIH_PWM VTRI_HI VTRI_LO VIL_PWM VHiZ_PWM DISB# Input VIH_DISB VIL_DISB IPLD tPD_DISBL tPD_DISBH Parameter Operating Current Input Voltage Input Current Output Voltage Power Dissipation VCIN Bypass Capacitor Line Regulation Load Regulation Short-Circuit Current Limit UVLO Threshold VDRV Rising Condition VDRV=14V, PWM=LOW or HIGH or Float Min. Typ. Max. Unit 2 8 12 36 4.8 1 20 75 200 6.8 7.3 0.435 10 10 3.30 3.20 1.00 0.85 2.3 2 0.8 10 3.55 3.45 1.25 1.15 160 2.5 3.80 3.70 1.50 1.40 200 2.7 7.8 5.0 250 10 5.2 5 14 mA V mA V mW F mV mV mA V V k k V V V V ns V V V A ns ns Internal 5V Linear Regulator 8V