FDS4953

FDS4953 May 2002 FDS4953 Dual 30V P-Channel PowerTrench® MOSFET General Description This P -Channel MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications requiring a wide range of gave drive voltage ratings (4.5V – 25V). Features • –5 A, –30 V RDS(ON) = 55 mΩ @ V GS = –10 V RDS(ON) = 95 mΩ @ V GS = –4.5 V • Low gate charge (6nC typical) • Fast switching speed • High performance trench technology for extremely low RDS(ON) • High power and current handling capability Applications • Power management • Load switch • Battery protection D2 D D2 D DD1 D1 D 5 6 7 G1 S1 G G2 S S2 S Q1 4 3 2 Q2 SO-8 Pin 1 SO-8 8 1 S Absolute Maximum Ratings Symbol V DSS V GSS ID PD PD Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed TA=25oC unless otherwise noted Parameter Ratings –30 ±20 (Note 1a) Units V V A –5 –20 2 Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) 1.6 1 0.9 –55 to +175 W TJ , TSTG Operating and Storage Junction Temperature Range °C Thermal Characteristics Rθ JA Rθ J C Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W Package Marking and Ordering Information Device Marking FDS4953 © 2002 Fairchild Semiconductor Corporation Device FDS4953 Reel Size 13’’ Tape width 12mm Quantity 2500 units FDS4953 Rev D1(W) FDS4953 Electrical Characteristics Symbol BV DSS ∆BV DSS ∆TJ IDSS IGSSF IGSSR V GS(th) ∆V GS(th) ∆TJ RDS(on) TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, Forward Gate–Body Leakage, Reverse (Note 2) Test Conditions V GS = 0 V, ID = –250 µA ID = –250 µA, Referenced to 25°C V DS = –24 V, V GS = –20 V, V GS = 20 V, V GS = 0 V V DS = 0 V V DS = 0 V Min –30 Typ Max Units V Off Characteristics –23 –1 –100 100 –1 –1.7 4.5 46 70 63 –20 10 55 95 85 –3 mV/°C µA nA nA V mV/°C mΩ On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current Forward Transconductance V DS = V GS , ID = –250 µA ID = –250 µA, Referenced to 25°C V GS = –10 V, ID = –5 A V GS = –4.5 V, ID = –3.3 A V GS = –10 V, ID = –5 A, TJ =125°C V GS = –10 V, V DS = –5 V, V DS = –5 V ID = –5 A ID(on) gFS A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) V DS = –15 V, f = 1.0 MHz V GS = 0 V, 528 132 70 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge V DD = –15 V, V GS = –10 V, ID = –1 A, RGEN = 6 Ω 7 13 14 9 14 24 25 17 9 ns ns ns ns nC nC nC V DS = –15 V, V GS = –5 V ID = –5 A, 6 2.2 2 Drain–Source Diode Characteristics and Maximum Ratings IS V SD Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward V GS = 0 V, IS = –1.3 A Voltage –1.3 (Note 2) A V –0.8 –1.2 a) 78°C/W when mounted on a 0.5in2 pad of 2 oz copper b) 125°C/W when mounted on a 0.02 in2 pad of 2 oz copper c) 135°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µ s, Duty Cycle < 2.0% FDS4953 Rev D1(W) FDS4953 Typical Characteristics 30 -5.0V V -ID , DRAIN CURRENT (A) 20 -4.5V V -4.0V 10 RDS(ON) NORMALIZED , DRAIN-SOURCE ON-RESISTANCE V GS = - 10V -6.0V 2 1.8 VGS=-4.0V 1.6 -4.0V 1.4 -5.0V -6.0V 1.2 1 -7.0V -8.0V -10V -3.5V -3.0V 0 0 1 2 3 4 5 6 -V DS , DRAIN TO SOURCE VOLTAGE (V) 0.8 0 6 12 18 24 30 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.25 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON) NORMALIZED , DRAIN-SOURCE ON-RESISTANCE ID = - 5A VGS = - 10V 1.4 ID = -2.5A 0.2 1.2 0.15 TA = 125o C 0.1 T A = 25o C 0.05 1 0.8 0.6 -50 -25 0 25 50 75 100 125 150 175 TJ , JUNCTION TEMPERATURE (oC) 0 2 4 6 8 10 -V GS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 15 -I S, REVERSE DRAIN CURRENT (A) V DS = - 5V 12 -ID, DRAIN CURRENT (A) 125oC 9 T A = -55o C 25oC Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS =0V TA = 125o C 1 25oC 0.1 -55 oC 0.01 10 6 3 0.001 0 1 1.5 2 2.5 3 3.5 4 4.5 -V GS, GATE TO SOURCE VOLTAGE (V) 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS4953 Rev D1(W) FDS4953 Typical Characteristics 10 -V GS, GATE-SOURCE VOLTAGE (V) ID = - 5A 8 -15V CAPACITANCE (pF) 6 V D S = - 5V -10V 800 700 600 CISS 500 400 300 COSS 200 100 CRSS f = 1 MHz V GS = 0 V 4 2 0 0 2 4 6 8 10 0 0 5 10 15 20 25 30 -V DS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 100 1ms 10ms 100ms 1s 1 DC V GS = - 10V SINGLE PULSE Rθ JA = 135 oC/W T A = 25o C 0.01 0.1 1 10 100 -V DS , DRAIN-SOURCE VOLTAGE (V) 10s P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT -I D, DRAIN CURRENT (A) 10 100µ s 50 Figure 8. Capacitance Characteristics. 40 SINGLE PULSE RθJA = 135°C/W TA = 25°C 30 20 0.1 10 0 0.001 0.01 0.1 1 10 100 t 1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 RθJA(t) = r(t) + RθJA RθJA = 135 °C/W P(pk) 0.02 0.01 0.1 0.1 0.05 t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t 1 / t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS4953 Rev D1(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ DISCLAIMER FAST â FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC â OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench â QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER â UHC™ SMART START™ UltraFET â SPM™ VCX™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. H5