FSTU3125

FSTU3125 4-Bit Bus Switch with −2V Undershoot Protection June 2001 Revised August 2001 FSTU3125 4-Bit Bus Switch with −2V Undershoot Protection General Description The Fairchild Switch FSTU3125 provides four high-speed CMOS TTL-compatible bus switches. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The A and B Ports are protected against undershoot to support an extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC) senses undershoot at the I/O and responds by preventing voltage differentials from developing and turning the switch on. The device is organized as four 1-bit switches with separate OE inputs. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Features s Undershoot hardened to −2V (A and B Ports) s 4Ω switch connection between two ports s Minimal propagation delay through the switch s Low lCC s Zero bounce in flow-through mode s Control inputs compatible with TTL level s See application notes AN-5008 and AN-5021 for details on undershoot Ordering Code: Order Number FSTU3125M FSTU3125QSC FSTU3125MTC Package Number M14A MQA16 MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assignment for SOIC and TSSOP Pin Descriptions Pin Name OE1, OE2, OE3, OE4 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B NC Description Bus Switch Enables Bus A Bus B Not Connected Truth Table Inputs OE Pin Assignment for QSOP L H Inputs/Outputs A,B A=B Z © 2001 Fairchild Semiconductor Corporation DS500449 www.fairchildsemi.com FSTU3125 Logic Diagram www.fairchildsemi.com 2 FSTU3125 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Switch Voltage (VS) DC Input Voltage (VIN)(Note 2) DC Input Diode Current (lIK) VIN < 0V DC Output (IOUT) Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) −0.5V to +7.0V −2.0V to +7.0V −0.5V to +7.0V −50 mA 128 mA Recommended Operating Conditions (Note 3) Power Supply Operating (VCC) Input Voltage (VIN) Output Voltage (VOUT) Input Rise and Fall Time (tr, tf) Switch Control Input Switch I/O Free Air Operating Temperature (TA) 0 ns/V to 5 ns/V 0 ns/V to DC 4.0V to 5.5V 0V to 5.5V 0V to 5.5V +/− 100 mA −65°C to +150 °C −40 °C to +85 °C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) 4.5 4.0–5.5 4.0–5.5 5.5 0 IOZ RON OFF-STATE Leakage Current Switch On Resistance (Note 5) 5.5 4.5 4.5 4.5 4.0 ICC ∆ICC VIKU Quiescent Supply Current Increase in ICC per Input Voltage Undershoot 5.5 5.5 5.5 4 4 8 11 2.0 0.8 ±1.0 10 ±1.0 7 7 15 20 3 2.5 −2.0 TA = −40 °C to +85 °C Min Typ (Note 4) Max −1.2 Units Conditions VIK VIH VIL II Clamp Diode Voltage HIGH Level Input Voltage LOW Level Input Voltage Input Leakage Current V V V µA µA Ω Ω Ω Ω µA mA V IIN = −18 mA 0 ≤ VIN ≤ 5.5V VIN = 5.5V 0 ≤ A, B ≤ VCC VIN = 0V, IIN = 64 mA VIN = 0V, IIN = 30 mA VIN = 2.4V, IIN = 15 mA VIN = 2.4V, IIN = 15 mA VIN = VCC or GND, IOUT = 0 One input at 3.4V. Other inputs at VCC or GND 0.0 mA ≥ IIN ≥ −50 mA OE = 5.5V Note 4: Typical values are at VCC = 5.0V and TA = +25°C Note 5: M easured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. 3 www.fairchildsemi.com FSTU3125 AC Electrical Characteristics TA = −40 °C to +85 °C, CL = 50pF, RU = RD = 500Ω Symbol Parameter VCC = 4.5 – 5.5V Min tPHL, tPLH tPZH, tPZL tPHZ, tPLZ Propagation Delay Bus to Bus (Note 6) Output Enable Time Output Disable Time 1.0 1.5 Max 0.25 6.1 6.4 VCC = 4.0V Min Max 0.25 6.0 6.6 ns ns ns VI = OPEN VI = 7V for tPZL VI = OPEN for tPZH VI = 7V for tPLZ VI = OPEN for tPHZ Figures 2, 3 Figures 2, 3 Figures 2, 3 Units Conditions Figure Number Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). Capacitance Symbol CIN CI/O (Note 7) Parameter Typ 3 5 Max Units pF pF Conditions VCC = 5.0V VCC, OE = 5.0V Control Pin Input Capacitance Input/Output Capacitance Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. Undershoot Characteristic (Note 8) Symbol VOUTU Parameter Output Voltage During Undershoot Min 2.5 Typ VOH − 0.3 Max Units V Figure 1 Conditions Note 8: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot event. FIGURE 1. Device Test Conditions Parameter VIN R1 - R2 VTRI VCC Value See Waveform 100K 11.0 5.5 Units V Ω V V Transient Input Voltage (VIN) Waveform www.fairchildsemi.com 4 FSTU3125 AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500ns FIGURE 2. AC Test Circuit FIGURE 3. AC Waveforms 5 www.fairchildsemi.com FSTU3125 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package Number MQA16 www.fairchildsemi.com 6 FSTU3125 4-Bit Bus Switch with −2V Undershoot Protection Physical Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com