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FSTU32X800

FSTU32X800

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FSTU32X800 - 20-Bit Bus Switch with Precharged Outputs and -2V Undershoot Protection - Fairchild Sem...

  • 数据手册
  • 价格&库存
FSTU32X800 数据手册
FSTU32X800 20-Bit Bus Switch with Precharged Outputs November 2002 Revised October 2006 FSTU32X800 20-Bit Bus Switch with Precharged Outputs and −2V Undershoot Protection General Description The Fairchild Switch FSTU32X800 provides 20-bits of high-speed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The A and B Ports are protected against undershoot to support an extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC®) senses undershoot at the I/O and responds by preventing voltage differentials from developing and turning the switch on. The device also precharges the B Port to a selectable bias voltage (BiasV) to minimize live insertion noise. The device is organized as two 10-bit switches with a bus enable (OEn) signal. When OEn is LOW, the switch is ON and Port A is connected to Port B. When OEn is HIGH, the switch is OPEN and the B Port is precharged to BiasV through an equivalent 10-kΩ resistor. Features s 4Ω switch connection between two ports s Undershoot Hardened to -2.0V s Soft enable turn-on to minimize bus-to-bus charge sharing during enable s Low lCC s Zero bounce in flow-through mode s Output precharge to minimize live insertion noise s Control inputs compatible with TTL level s See Applications Note AN-5008 for details Ordering Code: Order Number FSTU32X800QSP Package Number MQA48A Package Description 48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. UHC® is a registered trademark of Fairchild Semiconductor Corporation. © 2002 Fairchild Semiconductor Corporation DS500791 www.fairchildsemi.com FSTU32X800 Logic Diagrams Connection Diagram Pin Descriptions Pin Name OEn A B BiasVn Description Bus Switch Enable Bus A Bus B Bus B Voltage Bias Truth Table OEn L H B0–B19 A0–A19 BiasV Function Connect Precharge www.fairchildsemi.com 2 FSTU32X800 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Switch Voltage (VS) Bias V Voltage Range DC Input Voltage (VIN) (Note 2) DC Input Diode Current (lIK) VIN< 0V DC Output (IOUT) Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) −0.5V to +7.0V −2.0V to +7.0V −0.5V to +7.0V −0.5V to +7.0V −50 mA 128 mA Recommended Operating Conditions (Note 3) Power Supply Operating (VCC) Precharge Supply (BiasV) Input Voltage (VIN) Output Voltage (VOUT) Input Rise and Fall Time (tr, tf) Switch Control Input Switch I/O Free Air Operating Temperature (TA) 0 ns/V to 5 ns/V 0 ns/V to DC 4.0V to 5.5V 1.5V to VCC 0V to 5.5V 0V to 5.5V +/− 100 mA −65°C to +150 °C −40 °C to +85 °C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) 4.5 4.0 - 5.5 4.0 - 5.5 5.5 4.5 5.5 4.5 4.5 4.5 4.0 ICC ∆ ICC Quiescent Supply Current (Note 6) Increase in ICC per Input (Note 7) IBIAS IOZU VIKU Bias Pin Leakage Current Switch Undershoot Current Voltage Undershoot 5.5 5.5 5.5 ±1.0 100.0 −2.0 µA µA V 5.5 5.5 4.0 4.0 8.0 11.0 0.25 ±1.0 7.0 7.0 15.0 20.0 3.0 2.5 2.0 0.8 ±1.0 TA = −40 °C to +85 °C Min Typ (Note 4) Max −1.2 Units Conditions VIK VIH VIL II IO IOZ RON Clamp Diode Voltage HIGH Level Input Voltage LOW Level Input Voltage Input Leakage Current Output Current OFF-STATE Leakage Current Switch On Resistance (Note 5) V V V µA mA µA Ω Ω Ω Ω µA mA IIN = −18 mA 0 ≤ VIN ≤ 5.5V BiasV = 2.4V, B = 0 0 ≤ A ≤ VCC, VIN = VIH VS = 0V, IIN = 64 mA VS = 0V, IIN = 30 mA VS = 2.4V, IIN = 15 mA VS = 2.4V, IIN = 15 mA VS = VCC or GND, IOUT = 0 OE Input at 3.4V Other Inputs at VCC or GND OE = 0V, B = 0V, BiasV = 5.5V IIN = −20 mA, OE = 5.5V, VOUT ≥ VIH 0.0 mA ≥ IIN ≥ −50 mA, OE = 5.5V Note 4: Typical values are at VCC = 5.0V and TA = +25°C Note 5: M easured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. Note 6: Per VCC pin. Note 7: Per TTL driven inputs, control pins only. 3 www.fairchildsemi.com FSTU32X800 AC Electrical Characteristics TA = −40 °C to +85 °C, Symbol Parameter CL = 50 pF, RU = RD = 500Ω VCC = 4.5 – 5.5V Min tPHL, tPLH tPZH tPZL tPHZ tPLZ Output Disable Time OE1, OE2, to An, Bn Propagation Delay Bus to Bus (Note 8) Output Enable Time OE1, OE2, to An, Bn 7.0 7.0 1.0 1.0 Max 0.25 30.0 30.0 6.1 7.3 VCC = 4.0V Min Max 0.25 35.0 35.0 6.5 6.8 ns ns ns ns ns VI = OPEN VI = OPEN BiasV = GND VI = 7V BiasV = 3V VI = OPEN BiasV = GND VI = 7V BiasV = 3V Figures 1, 2 Figures 1, 2 Figures 1, 2 Units Conditions Figure Number Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance Symbol CIN CI/O (Note 9) Parameter Typ 3.0 5.0 Max Units pF pF Conditions VCC = 5.0V VCC, OE = 5.0V Control Pin Input Capacitance Input/Output Capacitance Note 9: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50Ω source terminated in 50Ω, RU = RD = 500Ω Note: CL includes load and stray capacitance, C L= 50 pF Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms www.fairchildsemi.com 4 FSTU32X800 20-Bit Bus Switch with Precharged Outputs Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide Package Number MQA48A Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com
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