GTLP16612

GTLP16612 CMOS 18-Bit TTL/GTLP Universal Bus Transceiver March 1995 Revised October 1998 GTLP16612 CMOS 18-Bit TTL/GTLP Universal Bus Transceiver General Description The GTLP16612 is an 18-bit universal bus transceiver which provides TTL to GTLP signal level translation. The device is designed to provide a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High speed backplane operation is a direct result of GTLP’s reduced output swing ( VCC Storage Temperature (TSTG) ESD Performance −50 mA +50 mA −65°C to +150°C >2000V −50 mA 80 mA −64 mA 64 mA −0.5V to +7.0V −0.5V to VCC + 0.5V −0.5V to +7.0V −0.5V to +7.0V Recommended Operating Conditions (Note 6) Supply Voltage VCC VCC VCCQ Bus Termination Voltage (VTT) Input Voltage (VI) on A-Port and Control Pins HIGH Level Output Current (IOH) A-Port LOW Level Output Current (IOL) A-Port B-Port Operating Temperature (TA) +32 mA +34 mA −40°C to +85°C −32 mA 0.0V to 5.5V 3.15V to 3.45V 4.75V to 5.25V 1.35V to 1.65V Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristic tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 5: IO Absolute Maximum Rating must be observed. Note 6: Unused inputs must be held high or low. www.fairchildsemi.com 4 GTLP16612 DC Electrical Characteristics Over Recommended Operating Free-Air Temperature Range, VREF = 1.0V (Unless Otherwise Noted). Symbol VIH VIL VREF VIK VOH A-Port VCC = 3.15V, VCCQ = 4.75V VCC, VCCQ = Min to Max (Note 8) VCC = 3.15V VCCQ = 4.75V VOL A-Port VCC, VCCQ = Min to Max (Note 8) VCC = 3.15V VCCQ = 4.75V B-Port II Control Pins A-Port VCC = 3.15V VCCQ = 4.75V VCC, VCCQ = 0 or Max VCC = 3.45V VCCQ = 5.25V B-Port IOFF II(hold) IOZH IOZL ICCQ (VCCQ) A-Port A-Port A-Port B-Port A-Port B-Port A or B Ports VCC = 3.45V VCCQ = 5.25V VCC = VCCQ = 0 VCC = 3.15V, VCCQ = 4.75V VCC = 3.45V, VCCQ = 5.25V VCC = 3.45V, VCCQ = 5.25V VCC = 3.45V, VCCQ = 5.25V, IO = 0 , VI = VCCQ or GND ICC (VCC) A or B Ports VCC = 3.45V, VCCQ = 5.25V, IO = 0 , VI = VCCQ or GND ∆ICC (Note 9) A-Port and Control Pins VCC = 3.45V, VCCQ = 5.25V, A or Control Inputs at VCC or GND CIN CI/O CI/O Control Pins A-Port B-Port VI = VCCQ or 0 VI = VCCQ or 0 VI = VCCQ or 0 8 9 6 pF Outputs Disabled One Input at 2.7V 0 0 1 1 mA Outputs Disabled Outputs HIGH Outputs LOW 30 0 0 40 1 1 mA IOL = 34 mA VI = 5.5V or 0V VI = 5.5V VI = VCC VI = 0 VI = VCCQ VI = 0 VI or VO = 0 to 4.5V VI = 0.8V VI = 2.0V VO = 3.45V VO = 1.5V VO = 0 VO = 0.65V Outputs HIGH Outputs LOW 30 30 75 −20 1 5 −20 −10 40 40 mA µA µA 0.65 ±10 20 1 −30 5 −5 100 µA µA µA µA V µA IOH = −100 µA IOH = −8 mA IOH = −32 mA IOL = 100 µA IOL = 32 mA VCC − 0.2 2.4 2.0 0.2 0.5 V V II = −18 mA B-Port Others B-Port Others 1.0 −1.2 0.0 Test Conditions Min VREF +0.1 2.0 VREF −0.1 0.8 V V V Typ (Note 7) VTT V V Max Units Note 7: All typicaI values are at VCC = 3.3V, VCCQ = 5.0V, and TA = 25°C. Note 8: For conditions shown as Min or Max, use the appropriate value specified under recommended operating conditions. Note 9: This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 5 www.fairchildsemi.com GTLP16612 AC Operating Requirements Over recommended ranges of supply voltage and operating free-air temperature, VREF = 1.0V (unless otherwise noted). Symbol fCLOCK tW Max Clock Frequency Pulse Duration LEAB or LEBA HIGH CLKAB or CLKBA HIGH or LOW tS Setup Time A before CLKAB↑ B before CLKBA↑ A before LEAB↓ B before LEBA↓ CEAB before CLKAB↑ CEBA before CLKBA↑ tH Hold Time A after CLKAB↑ B after CLKBA↑ A after LEAB↓ B after LEBA↓ CEAB after CLKAB↑ CEBA after CLKBA↑ Min 175 3.0 3.2 0.5 3.1 1.3 3.7 0.4 1.0 1.5 0.0 0.5 0.0 1.5 1.7 ns ns Max Unit MHz ns AC Electrical Characteristics Over recommended range of supply voltage and operating free-air temperature, VREF = 1.0V (unless otherwise noted). CL = 30 pF for B-Port and CL = 50 pF for A-Port. Symbol From (Input) tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tRISE tFALL tPLH tPHL tPLH tPHL tPLH tPHL tPZH, tPZL tPHZ, tPLZ Note 10: All typical values are at VCC = 3.3V, VCCQ = 5.0V, and TA = 25°C. To (Output) B Min Typ (Note 10) Max Unit A 1.0 1.0 4.3 5.0 4.5 5.3 4.6 5.4 4.4 6.1 2.6 2.6 6.5 8.2 6.7 8.6 6.7 8.7 6.2 9.8 ns LEAB B 1.8 1.5 ns CLKAB B 1.8 1.5 ns OEAB B 1.6 1.3 ns Transition time, B outputs (20% to 80%) Transition time, B outputs (20% to 80%) B A 2.0 1.4 LEBA A 2.1 1.9 CLKBA A 2.3 2.2 OEBA A 1.5 1.9 ns 5.6 5.0 4.2 3.3 4.4 3.5 5.0 3.9 8.2 7.2 6.3 5.0 6.8 5.2 6.2 7.9 ns ns ns ns www.fairchildsemi.com 6 GTLP16612 Test Circuits and Timing Waveforms Test Circuit for A Outputs Test Circuit for B Outputs CL includes probes and jig capacitance. CL includes probes and jig capacitance. For B-Port outputs, CL = 30 pF is used for worst case edge rate. Voltage Waveforms Pulse Duration (Vm = 1.5V for A-Port and 1.0V for B-Port) Voltage Waveforms Propagation Delay Times (A-Port to B-Port) Voltage Waveforms Setup and Hold Times (Vm = 1.5V for A-Port and 1.0V for B-Port) Voltage Waveforms Propagation Delay Times (B-Port to A-Port) All input pulses have the following characteristics: frequency = 10 MHz, tr = tf = 2 ns, ZO = 50Ω. The outputs are measured one at a time with one transition per measurement. Voltage Waveforms Enable and Disable Times (A-Port) Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. All input pulses have the following characteristics: frequency = 10 MHz, tr = tf = 2 ns, ZO = 50Ω. The outputs are measured one at a time with one transition per measurement. 7 www.fairchildsemi.com GTLP16612 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package, JEDEC MO-118 0.300” Wide Package Number MS56A www.fairchildsemi.com 8 GTLP16612 CMOS 18-Bit TTL/GTLP Universal Bus Transceiver Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package, JEDEC MO-153, 6.1mm Wide Package Number MTD56 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.