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KM4101IC8TR3

KM4101IC8TR3

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOIC8_150MIL

  • 描述:

    OPERATIONAL AMPLIFIER

  • 数据手册
  • 价格&库存
KM4101IC8TR3 数据手册
www.fairchildsemi.com KM4100/KM4101 Low Cost, +2.7V and +5V, 260MHz Rail-to-Rail Amplifiers Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ General Description The KM4100 (single) and KM4101 (single with disable) are low cost, voltage feedback amplifiers. These amplifiers are designed to operate on +2.7V, +5V, or ±2.5V supplies. The input voltage range extends 300mV below the negative rail and 1.2V below the positive rail. 260MHz bandwidth Fully specified at +2.7V and +5V supplies Output voltage range: 0.036V to 4.953V; Vs = +5; RL = 2kΩ Input voltage range: -0.3V to +3.8V; Vs = +5 150V/µs slew rate 4.2mA supply current Power down to Is = 127µA (KM4101) ±60mA linear output current ±90mA output short circuit current Directly replaces AD8051 and LM7131 in single supply applications Small package options (SOT-23, SOIC) The KM4100 offers superior dynamic performance with a 260MHz small signal bandwidth and 150V/µs slew rate. The combination of low power, high output current drive, and rail-to-rail performance make the KM4100 well suited for battery-powered communication/computing systems. The combination of low cost and high performance make the KM4100 suitable for high volume applications in both consumer and industrial applications such as wireless phones, scanners, and color copiers. Applications ■ ■ ■ ■ ■ ■ ■ ■ A/D driver Active filters CCD imaging systems CD/DVD ROM Coaxial cable drivers High capacitive load driver Portable/battery-powered applications Twisted pair driver Video driver Output Swing 2.7 Output Voltage (0.5V/div) ■ KM4100/KM4101 Packages SOT23-6 (KM4101) SOT23-5 (KM4100) -Vs 2 +In 3 5 +Vs - 4 -In Out 1 -Vs 2 +In 3 1 -In 2 +In 3 -Vs 4 + - 6 +Vs 5 DIS 4 -In 0 Time (0.5µs/div) SOIC (KM4101) SOIC (KM4100) NC + 1 + Out Vs = +2.7V RL = 2kΩ G = -1 8 NC NC 1 7 +Vs -In 2 6 Out +In 3 5 NC -Vs 4 + 8 DIS 7 +Vs 6 Out 5 NC REV. 1A February 2001 DATA SHEET KM4100/KM4101 KM4100/KM4101 Electrical Characteristics Parameters (Vs = +2.7V, G = 2, RL = 2kΩ to Vs/2; unless noted) Conditions Case Temperature Frequency Domain Response -3dB bandwidth TYP Min & Max +25°C +25°C UNITS NOTES 1 G = +1, Vo = 0.05Vpp G = +2, Vo = 0.2Vpp G = +2, Vo = 2Vpp 215 85 36 86 MHz MHz MHz MHz Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate 0.2V step 1V step 0.2V step, 2.7V step, G = -1 3.7 40 9 140 ns ns % V/µs Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise input current noise 1Vpp, 5MHz 1Vpp, 5MHz 1Vpp, 5MHz >1MHz >1MHz 86 85 76 16 1.3 dBc dBc dB nV/√Hz pA/√Hz 1 1 1 2 ±1 52 65 5 100 mV µV/°C µA nA/°C µA dB dB mA µA 2 2 2 2 2 72 MΩ pF V dB 2 full power bandwidth gain bandwidth product DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current quiescent current (disabled) Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Disable Characteristics (KM4101) turn on time turn off time off isolation Output Characteristics output voltage swing linear output current 1 -1.6 10 3 7 0 57 75 3.9 58 DC 4.3 1.5 -0.3 to 1.5 87 DC, Vcm = 0V to Vs - 1.5 ±8 ±8 150 25 75 5MHz, RL = 100Ω RL = 10kΩ to Vs/2 RL = 2kΩ to Vs/2 RL = 150Ω to Vs/2 ns ns dB 0.023 to 2.66 0.025 to 2.653 0.1 to 2.6 0.065 to 2.55 0.3 to 2.325 ±60 ±55 ±90 2.7 2.5 to 5.5 -40°C to +85°C short circuit output current power supply operating range 2 V V V mA mA mA V 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) Rf = 1kΩ was used used for optimal performance. (For G = +1, Rf = 0) 2) 100% tested at +25°C. Absolute Maximum Ratings supply voltage 0 to +6V maximum junction temperature +175°C storage temperature range -65°C to +150°C lead temperature (10 sec) +300°C operating temperature range (recommended) -40°C to +85°C input voltage range +Vs +0.5V; -Vs -0.5V internal power dissipation see power derating curves 2 Package Thermal Resistance Package θJA 5 lead SOT23 6 lead SOT23 8 lead SOIC 256°C/W 230°C/W 152°C/W REV. 1A February 2001 KM4100/KM4101 DATA SHEET KM4100/KM4101 Electrical Characteristics Parameters (Vs = +5V, G = 2, RL = 2kΩ to Vs/2; unless noted) Conditions Case Temperature Frequency Domain Response -3dB bandwidth TYP Min & Max +25°C +25°C UNITS NOTES 1 G = +1, Vo = 0.05Vpp G = +2, Vo = 0.2Vpp G = +2, Vo = 2Vpp 260 90 40 90 MHz MHz MHz MHz Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate 0.2V step 2V step 0.2V step, 5V step, G = -1 3.6 40 7 150 ns ns % V/µs Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise input current noise 2Vpp, 5MHz 2Vpp, 5MHz 2Vpp, 5MHz >1MHz >1MHz 70 78 68 16 1.3 dBc dBc dB nV/√Hz pA/√Hz 1 1 1 2 ±0.8 52 68 5.2 170 mV µV/°C µA nA/°C µA dB dB mA µA 2 2 2 2 2 72 MΩ pF V dB 2 full power bandwidth gain bandwidth product DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current quiescent current (disabled) Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Disable Characteristics (KM4101) turn on time turn off time off isolation Output Characteristics output voltage swing linear output current 1 DC DC, Vcm = 0V to Vs - 1.5 5MHz, RL = 100Ω RL = 10kΩ to Vs/2 RL = 2kΩ to Vs/2 RL = 150Ω to Vs/2 -40°C to +85°C short circuit output current power supply operating range 1.4 10 3 7 0 57 78 4.2 127 4.3 1.5 -0.3 to 3.8 87 ±8 ±8 150 25 75 0.027 to 4.97 0.036 to 4.953 0.1 to 4.9 0.12 to 4.8 0.3 to 4.625 ±60 ±55 ±90 5 2.5 to 5.5 2 ns ns dB V V V mA mA mA V 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) Rf = 1kΩ was used used for optimal performance. (For G = +1, Rf = 0) 2) 100% tested at +25°C. REV. 1A February 2001 3 DATA SHEET KM4100/KM4101 KM4100/KM4101 Performance Characteristics (Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless noted) G=2 Rf = 1kΩ Inverting Freq. Response Vs = +5V Normalized Magnitude (1dB/div) Normalized Magnitude (1dB/div) Non-Inverting Freq. Response Vs = +5V G=1 Rf = 0 G = 10 Rf = 2kΩ G=5 Rf = 2kΩ 0.1 1 10 G = -10 Rf = 2kΩ G = -5 Rf = 2kΩ 0.1 100 1 Frequency (MHz) Normalized Magnitude (1dB/div) Normalized Magnitude (1dB/div) G=2 Rf = 1kΩ G = 10 Rf = 2kΩ G=5 Rf = 2kΩ 10 G = -10 Rf = 2kΩ G = -5 Rf = 2kΩ 0.1 100 1 Magnitude (1dB/div) Magnitude (1dB/div) CL = 50pF Rs = 33Ω CL = 20pF Rs = 20Ω Rs CL RL 1kΩ 0.1 1 100 Large Signal Frequency Response CL = 100pF Rs = 25Ω 1kΩ 10 Frequency (MHz) Frequency Response vs. CL + G = -1 Rf = 2kΩ G = -2 Rf = 2kΩ Frequency (MHz) - 100 Inverting Freq. Response Vs = +2.7 G=1 Rf = 0 1 10 Frequency (MHz) Non-Inverting Freq. Response Vs = +2.7 0.1 G = -1 Rf = 2kΩ G = -2 Rf = 2kΩ Vo = 1Vpp Vo = 2Vpp CL = 10pF Rs = 0Ω 10 0.1 100 1 10 100 Frequency (MHz) Frequency (MHz) Frequency Response vs. Temperature Input Voltage Noise 100 Magnitude (0.5dB/div) Voltage Noise (nV/√Hz) 90 80 70 60 50 40 30 20 10 0 1 10 Frequency (MHz) 4 100 1k 10k 100k 1M Frequency (Hz) REV. 1A February 2001 KM4100/KM4101 DATA SHEET KM4100/KM4101 Performance Characteristics (Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless noted) 2nd & 3rd Harmonic Distortion; Vs = +2.7V 2nd & 3rd Harmonic Distortion; Vs = +5V -20 -20 Vo = 2Vpp Rf = 1kΩ -40 3rd RL = 150Ω 2nd RL = 150Ω -50 -60 2nd RL = 2kΩ -70 3rd RL = 2kΩ -80 Vo = 1Vpp Rf = 1kΩ -30 Distortion (dB) Distortion (dB) -30 2nd RL = 150Ω 3rd RL = 150Ω -40 -50 -60 2nd RL = 2kΩ -70 3rd RL = 2kΩ -80 -90 -90 0 5 10 15 0 20 5 2nd Harmonic Distortion vs. Vo 15 20 3rd Harmonic Distortion vs. Vo -20 -20 Rf = 1kΩ Rf = 1kΩ -30 -30 -40 Distortion (dB) Distortion (dB) 10 Frequency (MHz) Frequency (MHz) 20MHz -50 -60 10MHz -70 -80 -40 -50 20MHz -60 -70 10MHz -80 5MHz -90 5MHz -90 0.5 1.0 1.5 2.0 0.5 2.5 Output Amplitude (Vpp) 1.0 1.5 2.0 2.5 Output Amplitude (Vpp) PSRR CMRR -40 0 -10 -50 CMRR (dB) PSRR (dB) -20 -30 -40 -60 -70 -50 -80 -60 -70 -90 1k 0.01 0.1 1 0.01 100 10 0.1 Frequency (MHz) 0.6 60 |Gain| 40 30 0 20 Phase -45 -90 0 -10 -20 0.01 0.1 1 10 Frequency (MHz) REV. 1A February 2001 100 Output Voltage (V) 70 10 10 100 Output Current 0.8 Phase (degrees) Open Loop Gain (dB) Open Loop Gain & Phase vs. Frequency 80 50 1.0 Frequency (MHz) 0.4 0.2 Linear output current +60mA 0 -0.2 Short circuit current +90mA -0.4 -135 -0.6 -180 -0.8 -100 -50 0 50 100 Output Current (mA) 5 DATA SHEET KM4100/KM4101 KM4100/KM4101 Performance Characteristics (Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless noted) Small Signal Pulse Response Vs = +2.7V Rf = 1kΩ Rf = 1kΩ Output Voltage (0.05V/div) Output Voltage (0.05V/div) Small Signal Pulse Response Vs = +5V Time (20ns/div) Time (20ns/div) Large Signal Pulse Response Vs = +5V Output Swing Rf = 1kΩ Output Voltage (0.5V/div) Output Voltage (0.5V/div) 2.7 Vs = +2.7V RL = 2kΩ G = -1 0 Time (20ns/div) Time (0.5µs/div) Vin = 0.2Vpp sinusoid with 0.1V offset 5V Disable Pulse 0V Output Time (2µs/div) CMIR Output Voltage (4mV/div) Output Voltage (0.05V/div) Enable/Disable Response 0 -1 0 1 2 3 4 5 CMIR (1V/div) 6 REV. 1A February 2001 KM4100/KM4101 DATA SHEET The common mode input range extends to 300mV below ground and to 1.2V below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. The design uses a Darlington output stage. The output stage is short circuit protected and offers “soft” saturation protection that improves recovery time. The typical circuit schematic is shown in Figure 1. +Vs 6.8µF Frequency Reponse vs. Rf G=2 RL = 2kΩ Vs = +5V Magnitude (1dB/div) General Description The KM4100/KM4101 are single supply, general purpose, voltage-feedback amplifiers fabricated on a complementary bipolar process using a patent pending topology. They feature a rail-to-rail output stage and are unity gain stable. Both gain bandwidth and slew rate are insensitive to temperature. Rf = 2kΩ Rf = 1kΩ 1 10 100 Frequency (MHz) Figure 2: Frequency Response vs. Rf Power Dissipation The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150°C, some reliability degradation will occur. If the maximum junction temperature exceeds 175°C for an extended time, device failure may occur. + + 0.01µF Out KM4100 Rg Figure 1: Typical Configuration At non-inverting gains other than G = +1, keep Rg below 1kΩ to minimize peaking; thus, for optimum response at a gain of +2, a feedback resistor of 1kΩ is recommended. Figure 2 illustrates the KM4100/ KM4101 frequency response with both 1kΩ and 2kΩ feedback resistors. Enable/Disable Function (KM4101) The KM4101 offers an active-low disable pin that can be used to lower its supply current. Leave the pin floating to enable the part. Pull the disable pin to the negative supply (which is ground in a single supply application) to disable the output. During the disable condition, the nominal supply current will drop to below 127µA and the output will be at high impedance with about 2pF capacitance. REV. 1A February 2001 Maximum Power Dissipation Rf Maximum Power Dissipation (W) In The KM4100/KM4101 are short circuit protected. However, this may not guarantee that the maximum junction temperature (+150°C) is not exceeded under all conditions. Follow the maximum power derating curves shown in Figure 3 to ensure proper operation. 2.0 1.5 SOIC-8 lead 1.0 0.5 SOT23-6 lead SOT23-5 lead 0 -50 -30 -10 10 30 50 70 90 Ambient Temperature ( C) Figure 3: Power Derating Curves Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The KM4100/KM4101 will typically recover in less than 20ns from an overdrive condition. Figure 4 shows the KM4100 in an overdriven condition. 7 DATA SHEET KM4100/KM4101 Refer to the evaluation board layouts shown in Figure 7 for more information. Overdrive Recovery RL = 2kΩ Vin =2Vpp G=5 Rf = 1kΩ Input Voltage (0.5V/div) Input Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device: Output Eval Board Time (20ns/div) Figure 4: Overdrive Recovery Driving Capacitive Loads The Frequency Response vs. CL plot on page 4, illustrates the response of the KM4100 and KM4101. A small series resistance (Rs) at the output of the amplifier, illustrated in Figure 5, will improve stability and settling performance. Rs values in the Frequency Response vs. CL plot were chosen to achieve maximum bandwidth with less than 1dB of peaking. For maximum flatness, use a larger Rs. + Description Products KEB002 Single Channel, KM4100IT5, Dual Supply 5 & 6 lead SOT23 KM4101IT6 KEB003 Single Channel, Dual Supply 8 lead SOIC KM4100IC8, KM4101IC8 Evaluation board schematics and layouts are shown in Figure 6 and Figure 7. The KEB002 and KEB003 evaluation boards are built for dual supply operation. Follow these steps to use the board in a single supply application: 1. Short -Vs to ground 2. Use C3 and C4, if the -Vs pin of the KM4100 or KM4101 is not directly connected to the ground plane. Rs Rf CL RL Rg Figure 5: Typical Topology for driving a capacitive load Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Fairchild has evaluation boards to use as a guide for high frequency layout and to aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8µF and 0.01µF ceramic capacitors Place the 6.8µF capacitor within 0.75 inches of the power pin ■ Place the 0.01µF capacitor within 0.1 inches of the power pin ■ Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance ■ Minimize all trace lengths to reduce series inductances ■ ■ 8 Figure 6: Evaluation Board Schematic (SOIC pinout shown) REV. 1A February 2001 KM4100/KM4101 DATA SHEET KM4100/KM4101 Evaluation Board Layout Figure 7a: KEB002 (top side) Figure 7b: KEB002 (bottom side) Figure 7c: KEB003 (top side) Figure 7d: KEB003 (bottom side) REV. 1A February 2001 9 DATA SHEET KM4100/KM4101 SOT23-5 CL b DATUM ’A’ KM4100/KM4101 Package Dimensions e 2 CL CL E E1 α e1 C D CL A MAX 1.45 0.15 1.30 0.50 0.20 3.10 3.00 1.75 0.55 0.95 ref 1.90 ref 0 10 1. All dimensions are in millimeters. 2 Foot length measured reference to flat foot surface parallel to DATUM ’A’ and lead surface. 3. Package outline exclusive of mold flash & metal burr. 4. Package outline inclusive of solder plating. 5. Comply to EIAJ SC74A. 6. Package ST 0003 REV A supercedes SOT-D-2005 REV C. CL DATUM ’A’ A1 b MIN 0.90 0.00 0.90 0.25 0.09 2.80 2.60 1.50 0.35 NOTE: A2 SOT23-6 SYMBOL A A1 A2 b C D E E1 L e e1 α e 2 CL CL E E1 α e1 C D CL A SYMBOL A A1 A2 b C D E E1 L e e1 α MAX 1.45 0.15 1.30 0.50 0.20 3.10 3.00 1.75 0.55 0.95 ref 1.90 ref 0 10 NOTE: A2 1. All dimensions are in millimeters. 2 Foot length measured reference to flat foot surface parallel to DATUM ’A’ and lead surface. 3. Package outline exclusive of mold flash & metal burr. 4. Package outline inclusive of solder plating. 5. Comply to EIAJ SC74A. 6. Package ST 0004 REV A supercedes SOT-D-2006 REV C. A1 SOIC-8 SOIC D e SYMBOL A1 B C D E e H h L A 7¡ ZD CL CL Pin No. 1 E H B A A1 ZD A2 DETAIL-A h x 45¡ A2 MIN MAX 0.10 0.25 0.36 0.46 0.19 0.25 4.80 4.98 3.81 3.99 1.27 BSC 5.80 6.20 0.25 0.50 0.41 1.27 1.52 1.72 8 0 0.53 ref 1.37 1.57 L NOTE: DETAIL-A α C 10 MIN 0.90 0.00 0.90 0.25 0.09 2.80 2.60 1.50 0.35 1. All dimensions are in millimeters. 2. Lead coplanarity should be 0 to 0.10mm (.004") max. 3. Package surface finishing: (2.1) Top: matte (charmilles #18~30). (2.2) All sides: matte (charmilles #18~30). (2.3) Bottom: smooth or matte (charmilles #18~30). 4. All dimensions excluding mold flashes and end flash from the package body shall not exceed o.152mm (.006) per side(d). REV. 1A February 2001 KM4100/KM4101 DATA SHEET Ordering Information Model KM4100 KM4101 Part Number Package Container Pack Qty KM4100IC8 SOIC-8 Rail 95 KM4100IC8TR3 SOIC-8 Reel 2500 KM4100IT5 SOT23-5 Partial Reel
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