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ML6426-4

ML6426-4

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    ML6426-4 - High Bandwidth Triple Video Filters with Buffered Outputs for RGB or YUV - Fairchild Semi...

  • 数据手册
  • 价格&库存
ML6426-4 数据手册
www.fairchildsemi.com ML6426 High Bandwidth Triple Video Filters with Buffered Outputs for RGB or YUV Features • 5V ±10% operation • RGB/YUV filters for ATSC Digital Television VESA Standard • 2:1 Mux Inputs for multiple RGB/YUV inputs • Triple Reconstruction Filter options for 6.7, 12, 24, 30, and 36MHz to handle various line rates • Multiple ML6426 outputs can be paralleled to drive RGB/ YUV outputs at different frequencies for various line rates by means of Disable/Enable pin. • 6dB drivers and sync tip clamps for DC restore • DC restore with minimal tilt • 0.4% differential gain on all channels 0.4º differential phase on all channels 0.8% total harmonic distortion on all channels • 2kV ESD protection General Description The ML6426 are a family of triple video filters with buffered outputs. There are several versions of the ML6426, each with different passband cut-off frequencies of 6.7MHz, 12MHz, 24MHz, 30MHz, and 36MHz. Each channel contains a 4thorder Butterworth lowpass reconstruction video filter. The filter is optimized for minimum overshoot and flat group delay and guaranteed differential gain and phase at the outputs of the integrated cable drivers. All input signals from DACs are AC coupled into the ML6426. All channels have DC restore circuitry to clamp the DC input levels during video H-sync, using an output feedback clamp. An external H-sync signal is required for this purpose. All outputs must be AC coupled into their loads. Each output can drive 2VP-P into a 150Ω load. All channels have a gain of 2 (6dB) at 1VP-P input levels. Block Diagram 12 VCCO RINA/YINA RINB/YINB GINA/UINA GIN/UINB BINA/VINA BINB/VINB MUX TRANSCONDUCTANCE ERROR AMP A/B MUX 1 SYNCIN 16 DISABLE 15 GNDO 14 GND 3 + – 4 VCC 2 5 6 7 8 9 MUX TRANSCONDUCTANCE ERROR AMP MUX TRANSCONDUCTANCE ERROR AMP + – + – 4th-ORDER FILTER A 0.5V 4th-ORDER FILTER B 0.5V 4th-ORDER FILTER C 0.5V ×2 ROUT/YOUT 13 ×2 GOUT/UOUT 11 ×2 BOUT/VOUT 10 ML6426-1 Filter A Filter B Filter C 6.7MHz 6.7MHz 6.7MHz ML6426-2 12MHz 12MHz 12MHz ML6426-3 24MHz 24MHz 24MHz ML6426-4 30MHz 30MHz 30MHz ML6426-5 36MHz 36MHz 36MHz ML6426-15 15MHz 15MHz 15MHz REV. 3A August 2004 ML6426 DATA SHEET Pin Configuration ML6426 16-Pin Narrow SOIC (S16N) A/B MUX RINA/YINA GND VCC RINB/YINB GINA/UINA GINB/UINB BINA/VINA 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SYNC IN DISABLE GNDO ROUT/YOUT VCCO GOUT/UOUT BOUT/VOUT BINB/VINB TOP VIEW Pin Description PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NAME A/B MUX RINA/YINA GND VCC RINB/YINB GINA/UINA GINB/UINB BINA/VINA BINB/VINB BOUT GOUT VCCO ROUT GNDO DISABLE SYNC IN FUNCTION Logic input pin to select between Bank and Bank video inputs. This pin is internally pulled high. Unfiltered analog R- or Y-channel input for Bank . Sync must be provided at SYNC IN pin. Analog ground Analog 5V supply Unfiltered analog R- or Y-channel input for Bank . Sync must be provided at SYNC IN pin. Unfiltered analog G- or U-channel input for Bank . Sync must be provided at SYNC IN pin. Unfiltered analog G- or U-channel input for Bank . Sync must be provided at SYNC IN pin. Unfiltered analog B- or V-channel input for Bank . Sync must be provided at SYNC IN pin. Unfiltered analog B- or V-channel input for Bank . Sync must be provided at SYNC IN pin. Analog B or V-channel output Analog G or U-channel output 5V power supply for output buffers Analog R or Y-channel output Analog ground Disable/Enable pin. Turns the chip off when logic high. Internally pulled low. Input for an external H-sync logic signal for filter channels. CMOS level input. Active High. 2 REV. 3A August 2004 DATA SHEET ML6426 Absolute Maximum Ratings Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Parameter VCC Junction Temperature ESD Analog and Digital I/O Storage Temperature Range Lead Temperature (Soldering, 10 sec) Thermal Resistance (θJA) GND – 0.3 –65 Min. –0.3 Max. 7 150 >2000 VCC + 0.3 150 260 100 Unit V °C V V °C °C °C/W Operating Conditions Parameter Temperature Range VCC Range Min. 0 4.5 Max. 70 5.5 Unit °C V Electrical Characteristics Unless otherwise specified, VCC = 5V±10%, TA = Operating Temperature Range (Note 1) Symbol General ICC AV VOUT tCLAMP VI OS CL Supply Current Low Frequency Gain (R, G, B) Output Level during Sync (R, G, B,) Output Capability Clamp Response Time No Load (VCC = 5.5V) VIN = 100mVP-P at 100KHz DURING SYNC RL = 150Ω, AC-coupled@1MHz Settled to Within 10mV, CIN = 0.1µF 2VP-P Output Pulse All Outputs One Load is 150Ω All Outputs at fC/2 All Outputs at fC/2 VOUT = 2VP-P at 1 MHz 0.5VP-P (100kHz) at VCC Note 2 DISABLE, SYNC IN DISABLE, SYNC IN A/B Mux Pin Valid High or Low 2 2.5 1.0 2 0.4 0.4 0.8 35 120 5.34 0.7 2 10 1.4 4.3 35 52 6.0 0.9 80 6.65 1.2 mA dB V VP-P ms VP-P % pF loads % ° % dB mA V V µs Parameter Conditions Min Typ Max Units Input Signal Dynamic Range (R, G, B,) AC Coupled Peak Overshoot (R, G, B,) Output Load Capacitance (R, G, B,) Output Load Drive Capability, per Pin (YUV or RGB Outputs) dG dφ THD PSRR ISC VIH VIL TMUX Differential Gain (R, G, B,) Differential Phase (R, G, B,) Output Distortion (R, G, B,) PSRR (R, G, B,) Output Short Circuit Current (R, G, B,) Input Voltage Logic High Input Voltage Logic Low Input Mux Data Valid Time REV. 3A August 2004 3 ML6426 DATA SHEET Electrical Characteristics (continued) Unless otherwise specified, VCC = 5V±10%, TA = Operating Temperature Range (Note 1) Symbol f1dB fc f0.8fc fSB NOISE XTALK XTALK TPD ∆TPD Parameter –1dB Bandwidth Flatness (R, G, B,) –3dB Bandwidth Flatness (R, G, B,) 0.8 x fC Attenuation StopBand Rejection (All Channels ≥ 4 fC) Output Noise (R, G, B,) Crosstalk A/B MUX Crosstalk Group Delay (R, G, B,) Group Delay Deviation from Flatness (R, G, B,) fIN ≥ 4 fC, Note 3 Fullband Input of 0.5VP-P at 1 MHz Between any two Channels Input of 0.5VP-P at 3.58/4.43MHz 100kHz to 3.58MHz to 4.43MHz to 10MHz 12MHz Filter: ML6426-2 f1dB fc f0.8fc fSB NOISE XTALK XTALK TPD ∆TPD –1dB Bandwidth Flatness (R, G, B,) –3dB Bandwidth Flatness (R, G, B,) 0.8 x fC Attenuation StopBand Rejection (All Channels ≥ 4 fC) Output Noise (R, G, B,) Crosstalk A/B MUX Crosstalk Group Delay (R, G, B,) Group Delay Deviation from Flatness (R, G, B,) fIN ≥ 4 fC, Note 3 Fullband Input of 0.5VP-P at 1 MHz Between any two Channels Input of 0.5VP-P at 3.58/4.43MHz 100kHz to 3.58MHz to 4.43MHz to 10MHz 24MHz Filter: ML6426-3 f1dB fc f0.8fc fSB NOISE XTALK XTALK TPD ∆TPD –1dB Bandwidth Flatness (R, G, B,) –3dB Bandwidth Flatness (R, G, B,) 0.8 x fC Attenuation StopBand Rejection (All Channels ≥ 4 fC) Output Noise (R, G, B,) Crosstalk A/B MUX Crosstalk Group Delay (R, G, B,) Group Delay Deviation from Flatness (R, G, B,) fIN ≥ 4 fC, Note 3 Fullband Input of 0.5VP-P at 1 MHz Between any two Channels Input of 0.5VP-P at 3.58/4.43MHz 100kHz to 3.58MHz to 4.43MHz to 10MHz 25°C 25°C 13.6 21.6 16 24 1.7 –40 1.0 –55 -54 22 1 1 2 MHz MHz dB dB mVRMS dB dB ns ns ns ns 25°C 25°C 7.8 10.8 9.2 12 1.2 –40 1 –55 –54 40 1 1 7 MHz MHz dB dB mVRMS dB dB ns ns ns ns –38 25°C 25°C Conditions Min Typ Max 4.0 6.0 4.8 6.7 1.5 –42 1.0 –55 –54 70 4.0 8.0 9 Units MHz MHz dB dB mVRMS dB dB ns ns ns ns 6.7MHz Filter: ML6426-1 4 REV. 3A August 2004 DATA SHEET ML6426 Electrical Characteristics (continued) Unless otherwise specified, VCC = 5V±10%, TA = Operating Temperature Range (Note 1) Symbol f1dB fc f0.8fc fSB NOISE XTALK XTALK TPD ∆TPD Parameter –1dB Bandwidth Flatness (R, G, B,) –3dB Bandwidth Flatness (R, G, B,) 0.8 x fC Attenuation StopBand Rejection (All Channels ≥ 4 fC) Output Noise (R, G, B,) Crosstalk A/B MUX Crosstalk Group Delay (R, G, B,) Group Delay Deviation from Flatness (R, G, B,) fIN ≥ 4 fC, Note 3 Fullband Input of 0.5VP-P at 1 MHz Between any two Channels Input of 0.5VP-P at 3.58/4.43MHz 100kHz to 10MHz to 27MHz 25°C 25°C fIN ≥ 4 fC, Note 3 Fullband Input of 0.5VP-P at 1 MHz Between any two Channels Input of 0.5VP-P at 3.58/4.43MHz 100kHz to 10MHz to 30MHz 25°C 25°C 17 32.4 25°C 25°C Conditions Min Typ Max 15.3 27 18 30 1.7 -40 1.0 -55 -54 18 0.5 2 20 36 2 –40 1.0 –55 –54 17 0.5 4 10.8 12.2 13.8 15 1.2 –40 1.0 –55 –54 40 1 1 9 Fullband Input of 0.5VP-P at 1 MHz Between any two Channels Input of 0.5VP-P at 3.58/4.43MHz 100kHz to 3.58MHz to 4.43MHz to 10MHz Notes 1. Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions. 2. Sustained short circuit protection limited to 10 seconds. 3. 38dB is based on tester noise limits. REV. 3A August 2004 5 Units MHz MHz dB dB mVRMS dB dB ns ns ns MHz MHz dB dB mVRMS dB dB ns ns ns MHz MHz dB dB mVRMS dB dB ns ns ns ns 30MHz Filter: ML6426-4 36MHz Filter: ML6426-5 f1dB fc f0.8fc fSB NOISE XTALK XTALK TPD ∆TPD –1dB Bandwidth Flatness (R, G, B,) –3dB Bandwidth Flatness (R, G, B,) 0.8 x fC Attenuation StopBand Rejection (All Channels ≥ 4 fC) Output Noise (R, G, B,) Crosstalk A/B MUX Crosstalk Group Delay (R, G, B,) Group Delay Deviation from Flatness (R, G, B,) 15MHz Filter: ML6426-15 f1dB fc f0.8fc fSB NOISE XTALK XTALK TPD ∆TPD –1dB Bandwidth Flatness (R, G, B,) –3dB Bandwidth Flatness (R, G, B,) 0.8 x fC Attenuation StopBand Rejection (All Channels ≥ 4 fC) fIN ≥ 4 fC, Note 3 Output Noise (R, G, B,) Crosstalk A/B MUX Crosstalk Group Delay (R, G, B,) Group Delay Deviation from Flatness (R, G, B,) ML6426 DATA SHEET Functional Description The ML6426 is a triple monolithic continuous time video filter designed for reconstructing video signals from an YUV/RGB video D/A source. The ML6426 is intended for use in AC coupled input and output applications. The filters approximate a 4th-order Butterworth characteristic with an optimization toward low overshoot and flat group delay. All outputs are capable of driving 2VP-P into AC coupled 150Ω video loads, with up to 35pF of load capacitance. All outputs are capable of driving a 75Ω load at 1VP-P. All channels are clamped during sync to establish the appropriate output voltage swing range (DC restore). Thus the input coupling capacitors do not behave according to the conventional RC time constant. In most applications, the ML6426's input coupling capacitors are only 0.1µF. An external CMOS compatible HSYNC pulse is required which is Active High on the SYNC IN Pin. See Figure 2. During sync, the feedback clamp sources/sinks current to restore the DC level. The net result is that the average input current is zero. Any change in the input coupling capacitors' value will linearly affect the clamp response times. Each channel is essentially tilt-free. Each input is clamped by a feedback amp which responds to the output during sync. The ML6426 is robust and stable under all stated load and input conditions. Bypassing both VCC pins directly to ground ensures this performance. 5V 12 VCCO RINA/YINA RINB/YINB GINA/UINA GINB/UINB BINA/VINA BINB/VINB MUX TRANSCONDUCTANCE ERROR AMP A/B MUX 1 SYNCIN SYNC IN 16 DISABLE 15 ACTIVE HIGH + – 5V 4 VCC 220µF 75Ω 13 0.1µF RIN 2 5 6 7 8 9 MUX TRANSCONDUCTANCE ERROR AMP MUX TRANSCONDUCTANCE ERROR AMP + – + – 4th-ORDER FILTER A 0.5V 4th-ORDER FILTER B 0.5V 4th-ORDER FILTER C 0.5V ×2 ROUT/YOUT R 0.1µF GIN ×2 GOUT/UOUT 220µF 75Ω 11 G 0.1µF BIN ×2 BOUT/VOUT 220µF 75Ω 10 B GNDO 14 GND 3 Figure 1. Typical Application Schematic VIH = 2.5V VIL = 1.0V PWMIN = 2µS 50% x VSYNC IN Figure 2. SYNC IN Pulse Width 6 REV. 3A August 2004 DATA SHEET ML6426 Typical Applications Reconstruction filter selection for HDTV and VGA signal filtering The filtering requirements for HDTV and VGA standards vary depending on the resolution of the image to be displayed, and its refresh rate. The actual refresh rate of the display is not necessarily the same as the transmission rate of the frames of images. Some formats use a frame rate of 30Hz, but the display of those formats cannot be scanned onto the CRT at 30Hz. Excessive large area flicker would result. Such kinds of flicker can be seen on a PAL display with its brightness set high. To avoid this, the video will need to be stored in a frame buffer. This buffer already exists in the MPEG decoder of HDTV systems, so there is no cost penalty. The buffer is read out at twice the rate as the frame rate for 30Hz systems, thus getting us a refresh rate of 60Hz. Similar things are done for the 24Hz frame rate formats to boost them to a 60Hz refresh rate. Table 1. HDTV / Advanced TV Applications: (From Table 10.3 from ATSC document A54) Pixels 1920 1280 704 640 Vertical Lines 1080 720 480 480 Aspect Ratio 16:9 16:9 16:9 and 4:3 4:3 Picture Transmission Rate 60I, 30P, 24P 60P, 30P, 24P 60P, 60I, 30P, 24P 60P, 60I, 30P, 24P P=progressive scan, I=interlaced scan Table 2. Choosing the Correct Reconstruction Filter and Video Amplifier for TV Applications, ML6426 options Approximate Reconstruction Filter Cutoff Approximate Sample Clock Picture Transmission Rate (Note 2) Approximate Horizontal Rate Fairchild Filter to Use N/A Display Refresh Rate (Note 2) Standard Vertical Lines Pixels 1920 SMPTE 1280 704 704 640 640 1080 720 480 (Note 1) 480 480 (Note 1) 480 30P, 24P 60P, 30P, 24P 60I 60P, 30P, 24P 60I 60P, 30P, 24P 60Hz 60Hz 60Hz 60Hz 60Hz 60Hz 70.6KHz 47.1KHz 15.7KHz 31KHz 15.7KHz 31KHz 162MHz 60MHz 13.5MHz 27MHz 24.5MHz 12.27MHz 81MHz 30MHz 6.75MHz 13.5MHz 12MHz 6MHz ML6426-5 ML6426-4 ML6426-1 ML6426-2 ML6426-4 ML6426-2 ML6426-1 P=progressive scan, I=interlaced scan, na = not available Notes 1. NTSC display rates, can be fed directly into NTSC encoder (set top box) 2. 60 Hz also includes 59.94Hz 3. Custom frequencies ranging ± 3 to 6MHz can be special cut to order REV. 3A August 2004 (Note 3) 7 ML6426 DATA SHEET Pixel clock rates for the output D/A converters can be roughly determined from the Table 1. Don’t forget that the deflection system of a CRT display needs retrace time for the vertical and horizontal. This retrace time can vary from one design of an HDTV set to another, as it only involves tradeoffs between the frame buffer in the MPEG decoder and the CRT deflection system. Allowing for 10% retrace time for the vertical and 20% for the horizontal, the appropriate Reconstruction Filter is summarized in Table 2. For VGA or RGB monitors, the following resolutions can use the corresponding Reconstruction Filter and Video Amplifier as shown in Table 3. Figures 4, 5, and 6 show system diagrams when the ML6426 provides a good solution. Figure 7 provides a more detailed description for advanced TV applications using various resolutions for legacy video, SDTV, and HDTV. Using the ML6426 in Multiple Resolutions Several ML6426 devices can be used in parallel to construct a selectable filter selection block ranging from frequencies between 6.7 MHz to 50MHz. Each ML6426 can be individually controlled via the disable pin. In a parallel configuration, as shown in Figure 3 and 7, several ML6426 devices can be used and selected via general purpose I/O or other logic to perform the proper reconstruction filtering for the resolution of choice. This configuration allows for a minimum of bill of materials and reduces cost. Fairchild’s ML6426 EVAL Kit demonstrates multi-resolution designs. Furthermore, since the ML6426 pin-out is identical for all the options, the filters can be interchanged. This allows for ease of product migration to integrate newer resolutions to filter and drive various DAC outputs at different sampling frequencies. Table 3. Choosing the Correct Reconstruction Filter and Video Amplifier for TV Applications, ML6426 options Horizontal Rate Reconstruction Filter Cutoff (Prog except noted) Sample Clock Refresh Rate 640 480 VGA VGA VGA 60Hz 72Hz 75Hz 56Hz 60Hz 72Hz 75Hz 43Hz Interlaced 60Hz 70Hz 75Hz 60Hz 60Hz 31.5kHz 37.9kHz 37.5kHz 35.1kHz 37.9kHz 48.1kHz 46.9kHz 35.5kHz 37.9kHz 56.5kHz 80kHz 25.175MHz 31.5MHz 31.5MHz 36MHz 40MHz 50MHz 49.5MHz 44.9MHz 65MHz 75MHz 135MHz 113MHz 166MHz 12.5MHz 15.5MHz 15.5MHz 18MHz 20MHz 25MHz 25MHz 23MHz 33MHz 37.5MHz 68MHz 57MHz 83MHz ML6426-2 ML6426-3 ML6426-3 ML6426-3 ML6426-3 ML6426-3 ML6426-3 ML6426-3 ML6426-5 ML6426-5 na na na 800 600 SVGA SVGA SVGA SVGA 1024 768 XGA XGA XGA 1280 1600 1024 1200 SXGA SXGA UXGA N/A = not available 8 REV. 3A August 2004 Fairchild Filter to Use Vertical Lines Pixels Name DATA SHEET ML6426 GENERAL PURPOSE I/O SELECT LOGIC DISABLE/ENABLE LINES 5V 12 0.1µF YIN/RIN 15 2 5 6 7 8 9 16 1 4 220µF 13 ML6426-1 6.7MHz 11 220µF 10 75Ω G/U 75Ω R/Y 0.1µF UIN/GIN 220µF 14 0.1µF 3 75Ω B/V VIN/BIN 12 15 2 5 6 7 8 9 16 1 4 SYNC IN 13 ML6426-2 12MHz 11 10 14 3 12 15 2 5 6 7 8 9 16 1 4 13 ML6426-5 36MHz 11 10 14 3 Figure 3. ATSC Digital Television Application REV. 3A August 2004 9 ML6426 DATA SHEET GRAPHIC PROCESSOR FROM SAT OR CABLE MPEG2 TRANSPORT AND DECODER HDTV DECODER AND DISPLAY PROCESSOR Y D/A ML6426 U V DIGITAL TV Figure 4. Digital TV Receiver or HDTV Decoder Box FROM CAMERA VCR CV S-VIDEO ANALOG VIDEO DECODER AND DISPLAY PROCESSOR Y D/A RGB ML6426 U V RGB MONITOR VIDEO ENCODER YCrCb DIGITAL FROM DVD-ROM OR MEMORY Figure 5. PC Graphics/Frame Grabber Editing Card MRI, XRAY, ULTRASOUND, CT SCAN DSP DIGITAL YUV D/A ANALOG Y ML6426 U V MEDICAL IMAGING Figure 6. PC MRI, XRAY, Ultrasound, CT Scan 10 REV. 3A August 2004 DATA SHEET ML6426 5V GND C10 RINA/YINA R5 75Ω 0.1µF C2 1µF 12 FB1 FB2 GND C1 1µF 4 C9 0.1µF VCCO C 17 RINB/YINB R6 75Ω C 19 C 20 C 18 0.1µF 2 RINA 0.1µF 5 RINB U1 ML6426-1 ROUT 13 C 41 VCC 220µF 4TH ORDER FILTER R11 75Ω ROUT/YOUT 0.1µF 6 GINA 0.1µF 7 GINB 4TH ORDER FILTER GOUT 11 C 42 220µF R12 75Ω GOUT/UOUT C 21 C 22 GINA/UINA R7 75Ω 0.1µF 8 BINA 0.1µF 9 BINB A/B 1 MUX 16 SYNC IN 4TH ORDER FILTER BOUT 10 C 43 220µF R13 75Ω BOUT/VOUT 15 DISABLE 14 GNDO C3 1µF GINB/UINB R8 75Ω C12 0.1µF BINA/VINA 12 VCCO VCC R9 75Ω C 23 C 24 C 25 C 26 C 27 C 28 BINB/VINB R10 75Ω 0.1µF 2 RINA 0.1µF 5 RINB 0.1µF 6 GNA 0.1µF 7 GNB 0.1µF 8 BINA 0.1µF 9 BINB 1 A/B MUX 16 SYNC IN 4 C4 1µF R1 47kΩ 3 GND C11 0.1µF U2 ML6426-3 15 DISABLE 14 GNDO 3 GND ROUT GOUT BOUT 13 JP1 11 10 2 4 6 8 1 3 5 7 4 R2 47kΩ 3 2 1 SWI C14 HYSYNC IN SW2 C 29 C 30 C 31 C 32 C 33 C 34 0.1µF 2 RINA 0.1µF 5 RINB 0.1µF 6 GNA 0.1µF 7 GNB 0.1µF 8 BINA 0.1µF 9 BINB 1 A/B MUX 16 SYNC IN 0.1µF C6 1µF 12 4 C5 1µF C13 0.1µF 0 VCCO VCC U3 ML6426-4 15 DISABLE 14 GNDO 3 GND ROUT GOUT BOUT 13 11 10 R3 47kΩ C16 0.1µF C8 1µF 12 4 C7 1µF C15 0.1µF C 35 C 36 C 37 C 38 C 39 C 40 15 DISABLE 14 GNDO R4 47kΩ Figure 7. Typical Applications Schematic REV. 3A August 2004 11 3 GND 0.1µF 2 RINA 0.1µF 5 RINB 0.1µF 6 GNA 0.1µF 7 GNB 0.1µF 8 BINA 0.1µF 9 BINB 1 A/B MUX 16 SYNC IN VCCO VCC UX ML6426-X ROUT GOUT BOUT 13 11 10 ML6426 DATA SHEET Performance Data 10 0 –10 AMPLITUDE (dB) –20 –30 –40 –50 –60 –70 0.01 AMPLITUDE (dB) 0.1 1 FREQUENCY (MHz) 10 100 10 0 –10 –20 –30 –40 –50 –60 –70 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 8. Passband Flatness all Outputs (Normalized) 6.7 MHz, ML6426CS-1 Figure 9. Passband Flatness all Outputs (Normalized) 12 MHz, ML6426CS-2 10 0 –10 AMPLITUDE (dB) AMPLITUDE (dB) –20 –30 –40 –50 –60 –70 1M 10 0 –10 –20 –30 –40 –50 –60 –70 1M 10M 100M 10M 100M FREQUENCY (MHz) FREQUENCY (MHz) Figure 10. Passband Flatness all Outputs (Normalized) 24 MHz, ML6426CS-3 Figure 11. Passband Flatness all Outputs (Normalized) 30 MHz, ML6426CS-4 10 0 –10 AMPLITUDE (dB) –20 –30 –40 –50 –60 –70 100k 1M 10M FREQUENCY (Hz) 100M 1G Figure 12. Passband Flatness all Outputs (Normalized) 36MHz, ML6426CS-5 12 REV. 3A August 2004 DATA SHEET ML6426 0 –10 GROUP DELAY DEVIATION (ns) –20 –30 AMPLITUDE (dB) –40 –50 –60 –70 –80 –90 –100 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) 12 10 8 6 4 2 0 –2 –4 –6 –8 0 0.7 1.4 2.1 2.8 3.5 4.2 4.9 5.6 6.3 7.0 FREQUENCY (MHz) Figure 13. Frequency Response All Outputs ML6426-CS-1 Figure 14. Group Delay Deviation of Passband, All Outputs ML6426CS-1 14 12 GROUP DELAY DEVIATION (ns) 10 8 AMPLITUDE (dB) 6 4 2 0 –2 –4 –6 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) Figure 15. Group Delay Deviation All band, All Outputs ML6426CS-1 Figure 16. Frequency Response All Outputs ML6426CS-2 10 8 GROUP DELAY DEVIATION (ns) GROUP DELAY DEVIATION (ns) 6 4 2 0 –2 –4 –6 –8 –10 0 1 2 3 4 5 6 7 8 9 10 FREQUENCY (MHz) 12 10 8 6 4 2 0 –2 –4 –6 –8 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) Figure 17. Group Delay Deviation of Passband, All Outputs ML6426CS-2 REV. 3A August 2004 Figure 18. Group Delay Deviation All Band, All Outputs ML6426CS-2 13 ML6426 DATA SHEET 0 –10 –20 –30 AMPLITUDE (dB) –40 –50 –60 –70 –80 –90 –100 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) GROUP DELAY DEVIATION (ns) 10 8 6 4 2 0 –2 –4 –6 –8 –10 0 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 FREQUENCY (MHz) Figure 19. Frequency Response All Outputs ML6426CS-3 Figure 20. Group Delay Deviation of Passband, All Outputs ML6426CS-3 12 10 GROUP DELAY DEVIATION (ns) 8 6 4 2 0 –2 –4 –6 –8 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) AMPLITUDE (dB) 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) Figure 21. Group Delay Deviation All Band, All Outputs ML6426CS-3 Figure 22. Frequency Response All Outputs ML6426CS-4 10 8 GROUP DELAY DEVIATION (ns) GROUP DELAY DEVIATION (ns) 6 4 2 0 –2 –4 –6 –8 –10 0 4 8 12 16 20 24 28 32 36 40 FREQUENCY (MHz) 6 4 2 0 –2 –4 –6 –8 –10 –12 –14 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) Figure 23. Group Delay Deviation of Passband, All Outputs ML6426CS-4 14 Figure 24. Group Delay Deviation All Band, All Outputs ML6426CS-4 REV. 3A August 2004 DATA SHEET ML6426 0 –10 –20 –30 AMPLITUDE (dB) –40 –50 –60 –70 –80 –90 –100 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) GROUP DELAY DEVIATION (ns) 12 10 8 6 4 2 0 –2 –4 –6 –8 0 5 10 15 20 25 30 35 40 45 50 FREQUENCY (MHz) Figure 25. Frequency Response All Outputs ML6426-CS-5 Figure 26. Group Delay Deviation of Passband, All Outputs ML6426CS-5 12 10 GROUP DELAY DEVIATION (ns) 8 6 4 2 0 –2 –4 –6 –8 0 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) Figure 27. Group Delay Deviation All band, All Outputs ML6426CS-5 REV. 3A August 2004 15 ML6426 DATA SHEET Mechanical Dimensions Package: S16N 16-Pin Narrow SOIC 0.386 - 0.396 (9.80 - 10.06) 16 PIN 1 ID 0.148 - 0.158 0.228 - 0.244 (3.76 - 4.01) (5.79 - 6.20) 1 0.017 - 0.027 (0.43 - 0.69) (4 PLACE ) S 0.050 BS C (1.27 BS C) 0.059 - 0.069 (1.49 - 1.75) 0° - 8° 0.055 - 0.061 (1.40 - 1.55) 0.012 - 0.020 (0.30 - 0.51) S ATING PLANE 0.004 - 0.010 E (0.10 - 0.26) 0.015 - 0.035 (0.38 - 0.89) 0.006 - 0.010 (0.15 - 0.26) 16 REV. 3A August 2004 ML6426 DATA SHEET Ordering Information Model ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 ML6426 Part Number ML6426CS1 ML6426CS1X ML6426CS1X_NL ML6426CS2 ML6426CS2X ML6426CS3 ML6426CS3X ML6426CS4 ML6426CS4X ML6426CS4X_NL ML6426CS5 ML6426CS5X ML6426CS15 ML6426CS15X Cuttoff Freq 6.7MHz 6.7MHz 6.7MHz 12MHz 12MHz 24MHz 24MHz 30MHz 30MHz 30MHz 36MHz 36MHz 15MHz 15MHz Lead Free Package SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) SOIC-16 (Narrow) Container Rail Reel Reel Rail Reel Rail Reel Raill Reel Reel Rail Reel Rail Reel Pack Quantity 48 2500 2500 48 2500 48 2500 48 2500 2500 48 2500 48 2500 Temperature range for all parts: 0°C to +70°C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. © 2004 Fairchild Semiconductor Corporation
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