SG6741_08

SG6741 — Highly Integrated Green-Mode PWM Controller October 2008 SG6741 Highly Integrated Green-Mode PWM Controller Features High-Voltage Startup Low Operating Current: 4mA Linearly Decreasing PWM Frequency to 22kHz Frequency Hopping to Reduce EMI Emission Peak-Current-Mode Control Cycle-by-Cycle Current Limiting Leading-Edge Blanking Synchronized Slope Compensation Gate Output Maximum Voltage Clamp: 18V VDD Over-Voltage Protection (Auto Restart) VDD Under-Voltage Lockout (UVLO) Internal Open-Loop Protection Constant Power Limit (Full AC Input Range) Description The highly integrated SG6741 PWM controller provides several features to enhance the performance of flyback converters. The highly integrated SG6741 series of PWM controllers provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency at light-load conditions. To avoid acoustic-noise problems, the minimum PWM frequency is set above 22KHz. This green-mode function enables the power supply to meet international power conservation requirements. With the internal high-voltage startup circuitry, the power loss due to bleeding resistors is also eliminated. To further reduce power consumption, SG6741 is manufactured using the BiCMOS process, which allows an operating current of only 4mA. SG6741 integrates a frequency-hopping function that helps reduce EMI emission of a power supply with minimum line filters. Its built-in synchronized slope compensation achieves stable peak-current-mode control. The proprietary internal line compensation ensures constant output power limit over a wide range of AC input voltages, from 90VAC to 264VAC. SG6741 provides many protection functions. In addition to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety when an open-loop or output short-circuit failure occurs. PWM output is disabled until VDD drops below the UVLO lower limit; then the controller starts again. As long as VDD exceeds about 26V, the internal OVP circuit is triggered. SG6741 is available in an 8-pin SOP package. Applications General-purpose switch-mode power supplies and flyback power converters, including: Power Adapters Open-Frame SMPS Ordering Information Part Number SG6741SZ SG6741SY Operating Temperature Range -40 to +105°C -40 to +105°C Package 8-Lead Small Outline Package (SOP) 8-Lead Small Outline Package (SOP) Eco Status Packing Method Green Green Tape & Reel Tape & Reel For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation SG6741 • Rev. 1.3.3 www.fairchildsemi.com 1 SG6741 — Highly Integrated Green-Mode PWM Controller Application Diagram Figure 1. Typical Application Internal Block Diagram Figure 2. Functional Block Diagram © 2008 Fairchild Semiconductor Corporation SG6741 • Rev. 1.3.3 www.fairchildsemi.com 2 SG6741 — Highly Integrated Green-Mode PWM Controller Marking Information T: S = SOP P: Z =Lead Free Null=regular package XXXXXXXX: Wafer Lot Y: Year; WW: Week V: Assembly Location F: Fairchild logo Z: Plant code X: 1 digit year code Y: 1 digit week code TT: 2 digits die run code T: Package type (S = SOP) P: Y=Green package M: Manufacture flow code SG6741TP XXXXXXXXYWWV Marking for SG6741SZ ZXYTT 6741 TPM Marking for SG6741SY Figure 3. Top Mark Pin Configuration GND FB NC HV GATE VDD SENSE RI Figure 4. Pin Configuration (Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 Name GND FB NC HV RI SENSE VDD GATE Description Ground. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal on this pin and the current-sense signal on the SENSE pin. No connection. For startup, this pin is pulled high to the line input or bulk capacitor via resistors. A resistor connected from the RI pin to GND pin provides the SG6741 with a constant current source. This determines the center PWM frequency. Increasing the resistance reduces PWM frequency. Using a 26KΩ resistor (RI) results in a 65kHz center PWM frequency. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the OVP trigger point. The totem-pole output driver. Soft driving waveform is implemented for improved EMI. © 2008 Fairchild Semiconductor Corporation SG6741 • Rev. 1.3.3 www.fairchildsemi.com 3 SG6741 — Highly Integrated Green-Mode PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with respect to the ground pin. Symbol VVDD VFB VSENSE VRI VHV PD θ JA TJ TSTG TL ESD DC Supply Voltage (1, 2) Parameter FB Pin Input Voltage SENSE Pin Input Voltage RI Pin Input Voltage HV Pin Input Voltage Power Dissipation (TA＜50°C) Thermal Resistance (Junction-to-Air) Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave Soldering or IR, 10 Seconds) Electrostatic Discharge Capability, Human Body Model, JESD22-A114 Electrostatic Discharge Capability, Machine Model, JESD22-A115 All Pins Except HV Pin All Pins Except HV Pin Min. -0.3 -0.3 -0.3 Max. 30 7.0 7.0 7.0 500 400 141 Unit V V V V V mW °C/W °C °C °C kV V -40 -55 +125 +150 +260 4 200 Notes: 1. All voltage values, except differential voltages, are given with respect to the network ground terminal. 2. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. © 2008 Fairchild Semiconductor Corporation SG6741 • Rev. 1.3.3 www.fairchildsemi.com 4 SG6741 — Highly Integrated Green-Mode PWM Controller Electrical Characteristics VDD=15V, TA=25°C, unless otherwise noted. Symbol VDD Section VOP VDD-ON VDD-OFF IDD-ST IDD-OP IDD-OLP VTH-OLP VDD-OVP tD-VDDOVP Parameter Continuously Operating Voltage Start Threshold Voltage Minimum Operating Voltage Startup Current Operating Supply Current Internal Sink Current IDD-OLP off Voltage VDD Over-Voltage Protection VDD Over-Voltage Protection Debounce Time Conditions Min. Typ. Max. 22 Units V V V µA mA µA V V µs 15.5 9.5 VDD-ON – 0.16V VDD=15V, GATE Open VDD-OLP +0.1V 50 6.5 25 100 16.5 10.5 4 70 7.5 26 180 17.5 11.5 30 5 90 8.0 27 260 HV Section IHV IHV-LC Supply Current from HV Pin Leakage Current After Startup VAC=90V (VDC=120V), VDD=10µF HV=500V, VDD=VDDOFF+1V 2.0 1 20 mA µA Oscillator Section fOSC tHOP fOSC-G fDV fDT Frequency in Nominal Mode Hopping Period Green-Mode Frequency Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation VDD=11V to 22V TA=-40 to 105°C 16 Center Frequency Hopping Range 62 ±3.7 65 ±4.2 4.4 18 21 5 5 68 ±4.7 KHz ms KHz % % Continued on the following page… PWM Frequency fOSC fOSC-G VFB-ZDC VFB-G VFB-N VFB Figure 5. VFB vs. PWM Frequency © 2008 Fairchild Semiconductor Corporation SG6741 • Rev. 1.3.3 www.fairchildsemi.com 5 SG6741 — Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) VDD=15V, TA=25°C, unless otherwise noted. Symbol Feedback Input Section AV ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G VFB-ZDC Parameter Input Voltage to Current-Sense Attenuation Input Impedance Output High Voltage FB Open-Loop Trigger Level Delay Time of FB Pin Open-Loop Protection Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage Zero Duty-Cycle Input Voltage Conditions Min. 1/3.75 4 Typ. 1/3.20 Max. Units 1/2.75 7 V/V kΩ V V ms V V V FB Pin Open RI=26kΩ 5.5 3.7 50 1.9 4.0 56 2.1 VFB-N0.5 VFB-G 0.25 VFB-G - VFB-G 0.20 0.10 12 0.87 0.90 0.34 100 275 350 0.15 180 0.93 0.38 200 425 4.3 62 2.3 Current-Sense Section ZSENSE VSTHFL VSTHVA tPD tLEB VS-SCP tD-SSCP Input Impedance Current Limit Flatten Threshold Voltage Current Limit Valley Threshold Voltage Delay to Output Leading-Edge Blanking Time Threshold Voltage for SENSE Short-Circuit Protection Delay Time for SENSE Short-Circuit Protection Maximum Duty Cycle Gate Low Voltage Gate High Voltage Gate Rising Time Gate Falling Time Gate Source Current Gate Output Clamping Voltage VDD=15V, IO=50mA VDD=12.5V, IO=50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=22V 8 150 30 250 18 250 50 350 90 VSENSE