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FT4222HQ-B-R

FT4222HQ-B-R

  • 厂商:

    FTDI(飞特帝亚)

  • 封装:

    32-VFQFN裸露焊盘

  • 描述:

    USB Bridge, USB to I²C USB 2.0 I²C Interface 32-VQFN (5x5)

  • 数据手册
  • 价格&库存
FT4222HQ-B-R 数据手册
FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 Clearance No.: FTDI#405 Future Technology Devices International Ltd. FT4222H (USB2.0 to QuadSPI/I2C Bridge IC) FT4222H is a USB2.0 to Quad-SPI/I2C interface Device Controller with the following advanced features: SPI/I2C  Single chip USB2.0 Hi-speed to with a variety of configurations bridge  Entire USB protocol handled on the chip.  On-chip OTP memory for USB Vendor ID (VID), Product ID (PID), device serial number, product description string and various other vender specific data. SPI  Configurable GPIOs can be easily controlled by software applications via USB bus  USB Battery Charger Detection.  Device supplied pre-programmed with unique USB serial number.  USB Power Configurations; supports buspowered, self-powered and bus-powered with power switching.  +5V USB VBUS detection engine  Integrated 5V-3.3V-1.8V regulators.  True 3.3V CMOS drive output and TTL input. (operates down to 1V8 with external pull-ups)  Configurable industry standard Master/Slave interface controller  Support configurable data width with single, dual, quad data width transfer mode in SPI master  Configurable I/O pin output drive strength; 4 mA(min) and 16 mA(max)  SCK can support up to 30MHz in SPI master  Integrated power-on-reset circuit.  Up to 53.8Mbps data transfer rate in SPI master with quad mode transfer  USB2.0 Low operating and suspend current; 68mA (active-typ) and 375µA (suspend-typ).  Support single bit data transfer with full-duplex transfer in SPI Slave  UHCI / OHCI / EHCI / XHCI host controller compatible.  Support up to 4 channels slave selection control pins in SPI master application   Configurable I2C Master/Slave interface controller conforming to I2C v2.1 and v3.0 specification. FTDI’s royalty-free Direct (D2XX) drivers for Windows eliminate the requirement for USB driver development in most cases.  Extended operating temperature range; -40⁰C to 85⁰C.  Support 4 speed modes as defined in the I2Cbus Specification, standard mode (SM) up to 100Kbit/s, fast mode (FM) up to 400Kbit/s, Fast mode plus (FM+) up to 1Mbit/s, and High Speed mode (HS) up to 3.4 Mbit/s  Available in compact Pb-free 32 Pin VQFN packages (RoHS compliant). Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this produ ct. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminar y information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow G41 1HH United Kingdom. Scotland Registered Company Number: SC136640 Copyright © Future Technology Devices International Limited 1 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 1 Clearance No.: FTDI#405 Typical Applications  USB to single mode SPI master controller  USB Industrial Control  USB to dual mode SPI master controller  USB Data Acquisition  USB to quad mode SPI master controller   USB to single SPI slave controller Accessory connectivity solutions for mobiles and tablets  USB to I2C master interface controller  USB dongle implementations for Software/ Hardware Encryption and Wireless Modules  USB to I2C slave interface controller   Utilising USB to add system modularity  Incorporate USB interface to enable PC transfers for development system communication Detect USB dedicated charging ports, to allow for high current battery charging in portable devices. 1.1 Driver Support Royalty free D2XX Direct Drivers (USB Drivers + DLL S/W Interface)  Windows 10 32, 64-bit  Server 2012 R2  Windows 8.1 32, 64-bit  MAC OSX  Windows 8 32, 64-bit  Linux  Windows 7 32, 64-bit  Android  Server 2008 R2 For driver installation, please refer to http://www.ftdichip.com/Documents/InstallGuides.htm 1.2 Ordering Information Part Number Package Remark FT4222HQ-D-x 32 Pin VQFN Rev D Note: Packing codes for x is: - R: Taped and Reel, 5,000pcs per reel - T: Tray packing, 490pcs per tray For example: FT4222HQ-D-T is 490pcs tray packing (rev D) 1.3 Ordering Information The FT4222H is fully compliant with the USB 2.0 specification and has been given the USB-IF Test-ID (TID) 40001830. Copyright © Future Technology Devices International Limited 2 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 2 Clearance No.: FTDI#405 FT4222H Block Diagram Figure 2.1 FT4222H Block Diagram For a description of each function please refer to Section 4. Copyright © Future Technology Devices International Limited 3 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 Clearance No.: FTDI#405 Table of Contents 1 Typical Applications....................................................... 2 1.1 Driver Support ........................................................................... 2 1.2 Ordering Information ................................................................. 2 1.3 Ordering Information ................................................................. 2 2 FT4222H Block Diagram ................................................ 3 3 Device Pin Out and Signal Description ........................... 6 3.1 VQFN-32 Package Pin Out .......................................................... 6 3.2 Pin Description .......................................................................... 7 4 Function Description ..................................................... 9 4.1 Key Features .............................................................................. 9 4.2 Functional Block Descriptions .................................................. 10 5 FT4222H Chip Mode Configuration & SPI/I2C Interface 13 5.1 Chip Mode Configuration .......................................................... 13 5.2 SPI Bus Interface..................................................................... 14 5.2.1 SPI Pin Definition ...................................................................................... 14 5.2.2 SPI Bus Protocol ....................................................................................... 14 5.2.3 SCK Format .............................................................................................. 16 5.2.4 SPI Timing ............................................................................................... 17 5.3 I2C Bus Interface ..................................................................... 19 5.3.1 I2C Pin Definition ....................................................................................... 19 5.3.2 I2C Bus Protocol ........................................................................................ 19 5.3.3 I2C Slave Address...................................................................................... 20 5.3.4 I2C Timing ................................................................................................ 20 5.4 6 GPIOs ...................................................................................... 22 Devices Characteristics and Ratings ............................ 23 6.1 Absolute Maximum Ratings ...................................................... 23 6.2 ESD and Latch-up Specifications .............................................. 23 6.3 DC Characteristics .................................................................... 24 6.4 OTP Memory Reliability Characteristics .................................... 29 7 FT4222H Configurations .............................................. 30 7.1 USB Bus Powered Configuration ............................................. 30 7.2 Self Powered Configuration with 5V Source Input ................... 31 Copyright © Future Technology Devices International Limited 4 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 Clearance No.: FTDI#405 7.3 Self Powered Configuration with 3.3V Source In ..................... 32 7.4 Crystal Oscillator Configuration ............................................... 33 7.5 USB Battery Charging Detection .............................................. 34 8 Application Examples .................................................. 35 9 Internal OTP Memory Configuration ............................ 37 9.1 Default Values ......................................................................... 37 9.2 Method of Programming the OTP Memory ................................ 39 9.2.1 Programming the OTP memory over USB ..................................................... 39 10 Package Parameters .................................................... 40 10.1 VQFN-32 Package Mechanical Dimensions ............................ 40 10.2 VQFN-32 Package Markings................................................... 41 10.3 Solder Reflow Profile ............................................................. 41 11 Contact Information .................................................... 43 Appendix A – References ................................................... 44 Document References ...................................................................... 44 Acronyms and Abbreviations............................................................ 44 Appendix B - List of Figures and Tables ............................. 45 List of Figures .................................................................................. 45 List of Tables.................................................................................... 45 Appendix C - Revision History ............................................ 47 Copyright © Future Technology Devices International Limited 5 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 3 Clearance No.: FTDI#405 Device Pin Out and Signal Description 3.1 VQFN-32 Package Pin Out Figure 3.1 Pin Configuration VQFN-32 (Top-Down View) Copyright © Future Technology Devices International Limited 6 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 Clearance No.: FTDI#405 3.2 Pin Description FT4222H Pin No. Pin Name Type 1 DEBUGGER I/O 2 STEST_RSTN I 3 RESETN I Chip reset input for non-test mode operation. Active low. 4 DCNF0 I Chip mode configuration selection bit 0. Refer to Section 5.1 5 DCNF1 I Chip mode configuration selection bit 1. Refer to Section 5.1 6 DGND P Digital Ground ** Description Debugging pin. Should be reserved and tied to high Chip reset input for test mode. Active low. Should be reserved and tied to high. +3.3V/2.5V/1.8V supply voltage. This is the supply voltage for all the I/O ports. This pin shall be connected to pin 25 when I/O ports are working at 3.3V 7 VCCIO 8 SCK I/O SPI interface clock. Serial clock output for SPI master; serial clock input for SPI slave mode 9 MISO I/O In SPI master single mode, it is master serial data input. In SPI master dual/quad mode, it is SPI data bus bit 1. In SPI slave mode, it is slave serial data output. 10 MOSI I/O In SPI master single mode, it is master serial data output. In SPI master dual/quad mode, it is SPI data bus bit 0. In SPI slave mode, it is slave serial data input. 11 IO2 I/O Quad SPI data bus bit 2 12 IO3 I/O Quad SPI data bus bit 3 13 GPIO0/SS1O/SCL I/O GPIO 0 (default) can be configured as slave selection 1, output pin for SPI master mode or serial clock for I2C mode 14 GPIO1/SS2O/SDA I/O GPIO 1 (default) can be configured as slave selection 2, output pin for SPI master mode or serial data for I2C mode 15 GPIO2/SS3O/SUSP_OUT I/O GPIO 2 (default) can be configured as slave selection 3, output pin for SPI master mode or USB suspend output indicator 16 GPIO3/WAKEUP/INTR I/O GPIO 3 (default) and can be configured as USB remote wakeup input pin or interrupt input 17 SS0O O Slave selection 0, output pin for SPI master mode. 18 XSCI AI Crystal oscillator input, 12MHz only. Related application circuit can be referred to in Section7.4 19 XSCO AO Crystal oscillator output, 12MHz only. Related application P Copyright © Future Technology Devices International Limited 7 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 FT4222H Pin No. Pin Name Type Clearance No.: FTDI#405 Description circuit can be referred to in Section7.4 20 UGND P 21 RREF AI 22 DM AI/O USB peripheral bidirectional DM line. 23 DP AI/O USB peripheral bidirectional DP line. 24 UGND P 25 VOUT3V3 26 VCCIN 27 ** P ** USB Analog Ground USB peripheral reference voltage input. Connect 12Kohm +/- 1% resistor to GND. USB Analog Ground +3.3V voltage Out May be used to power VCCIO. When VCCIN is supplied with 3.3V, this pin is a power input pin. Connect to pin 26. +5.0V(or 3.3V) supply voltage In P Power source-in to embedded regulator. AGND P Analog Ground 28 DGND P Digital Ground 29 VPP P Power source for Programming embedded OTP. It should be kept floating or 0V when not in programming mode 30 VBUS_DET I VBUS detection input. It is a +5.0V tolerant pin 31 BCD_DET O Battery charger detection indicator output when the device is connected to a dedicated battery charger port. Polarity can be defined 32 SS I SPI slave selection indicator from SPI master. This pin is active in SPI slave mode. It must be tied to high when SPI master mode enabled. +6.5V supply voltage In Table 3.1 FT4222H Pin Description **If VCCIN is supplied with 3.3V power input, then VOUT3V3 and VCCIO must also be driven with this 3.3V power source Copyright © Future Technology Devices International Limited 8 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC Datasheet Version 1.5 Document No.: FT_001011 4 Clearance No.: FTDI#405 Function Description The FT4222H is a Hi-Speed USB2.0-to-Quad SPI/ I2C device controller in a compact 32-pin VQFN package. The FT4222H requires an external Crystal (12 MHz) for the internal PLL to operate. It supports multi-voltage IO, 3.3V, 2.5V or 1.8V. It also provides 128 bytes one-time-programmable (OTP) memory space for storing vendor specific information. The FT4222H contains SPI/ I2C configurable interfaces. The SPI interface can be configured in master mode with single, dual, or quad bits data width transfer or in slave mode with single bit data width transfer. The I2C interface can be configured in master or slave mode. 4.1 Key Features Functional Integration. The FT4222H is a USB 2.0 Hi-Speed (480Mbits/s) to flexible and configurable SPI or I2C interfaces IC. The FT4222H includes an integrated +1.8V and +3.3V Low Drop-Out (LDO) regulator and 12MHz to 480MHz PLL. It also includes Power-On-Reset (POR), VBUS detection with 5Vtolerance and 128 bytes one-time-programmable (OTP) memory which simplify external circuit design and reduce external component count. USB2.0 Hi-Speed Device Controller. The FT4222H integrates a USB protocol engine which controls the physical Universal Transceiver Macrocell Interface (UTMI) and handles all aspects of the USB 2.0 HiSpeed interface. It contains one control endpoint, and 4-pairs of IN and OUT endpoints. These endpoints can implement up to 4 independent interfaces/applications mapped to combined I2C, GPIO, SPI interfaces. Highly Integrated USB2.0 to Configurable SPI Bridge. The FT4222H provides the bridge function between a USB2.0 device, upstream port and an SPI Master/Slave. A support library, LibFT4222, based on FTDI’s D2XX driver, enables easy configuration of the SPI as a master or slave. Operating clock frequency on the SPI bus, clock phase and polarity, transfer data bit width mode, and the number of slave selection controls are also configurable. The maximum SPI interface operating clock can be set up to 40MHz in master mode and 20MHz in slave mode. With quad mode (4-bits) data bus width, the max data transfer throughput can be up to 53.8Mbps. USB to Configurable I2C Controller. The FT4222H also provides the bridge function between a USB2.0 device upstream port and an I2C Master/Slave interface. A support library, LibFT4222, based on FTDI’s D2XX driver, enables easy configuration of the I2C as either a master or slave, including target operating speed and bus protocol on the I2C bus. The device can run at common I2C bus speeds, standard mode (SM), fast mode (FM), Fast mode plus (FM+), and High Speed mode (HS). A higher bit rate on the I2C bus is also configurable up to 6.66Mbit/s. Clock stretching is supported to conform to v2.1 and v3.0 of the I2C specification. Configurable GPIOs. There are 4 GPIO pins in the FT4222H that can be configured for different purposes, such as a suspend indicator output, remote wake up input, an interrupt input or general purpose Input/Output. These GPIOs can be easily initialized and fully controlled at the USB host side by the application programming interface (API) defined in LibFT4222. Signal drive strength and slew rate of these GPIOs can be configured via the FT_Prog utility for different design needs. Embedded OTP memory. The internal OTP memory in the FT4222H is used to store USB Vendor ID (VID), Product ID (PID), device serial number, product description string and various other USB configuration descriptors. With this embedded OTP memory, the device can store vendor specific information and save the cost on BOM. The descriptors can be programmed using the FTDI utility software called FT_PROG, which can be downloaded from the FTDI Utilities page on the FTDI website (http://www.ftdichip.com/Support/Utilities.htm#FT_Prog). Power management. USB 2.0 suspend/resume and remote wakeup are fully supported. The PHY will be put to a power saving mode and the clock to most of the digital circuits will be stopped when the device is suspended. Source Power and Power Consumption. The FT4222H is capable of operating at a voltage supply of +3.3V or +5.0V with a nominal operational mode current of 68mA and a nominal USB suspend mode current of 375µA. This allows greater margin for peripheral designs to meet the USB suspend mode current limit of 2.5mA. An integrated level converter within the FT4222H allows the device to interface with logic running at +1.8V, +2.5V or +3.3V. (Note: External pull-ups are recommended for IO
FT4222HQ-B-R 价格&库存

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