MB88101A

FUJITSU SEMICONDUCTOR DATA SHEET DS04-13105-3E Linear IC Converter CMOS A/D Converter (With 4-channel Input at 12-bit Resolution) MB88101A s DESCRIPTION The MB88101A is an analog-to-digital converter that converts its analog input to a 12-bit digital value and outputs it as serial data. The MB88101A employs a successive approximation method for A/D conversion. The MB88101A has four input channels selectable for analog input under control of the dedicated external pins. The MB88101A can be switched to a mode for continuous A/D conversion, in which it outputs serial data from the MSB or LSB selectable depending on the mode setting. s FEATURES • • • • • • • • • 4-channel analog input One analog input channel selectable for conversion by external control CR-type successive approximation system with a sample-and-hole circuit 12-bit resolution Serial output of 12-bit digital data Capable of continuous conversion (continuous conversion mode) MSB or LSB selectable for serial output CMOS process Package options of 16-pin DIP 16-pin SSOP and 16-pin SOP available , , s PACKAGES 16-pin Plastic DIP 16-pin Plastic SSOP 16-pin Plastic SOP (DIP-16P-M04) (FPT-16P-M05) (FPT-16P-M06) MB88101A s PIN ASSIGNMENT (TOP VIEW) AN0 AN1 VREF AGND AN2 AN3 MOD0 MOD1 1 2 3 4 5 6 7 8 INDEX 16 15 14 13 12 11 10 9 VCC SAMP DO CLK CS C0 C1 DGND (DIP-16P-M04) (FPT-16P-M06) (FPT-16P-M05) 2 MB88101A s PIN DESCRIPTION Pin no. 1 2 5 6 14 13 12 Symbol AN0 AN1 AN2 AN3 DO CLK CS I/O I Descriptions Analog input pins. One of these channels can be selected depending on the C0 and C1 settings. O I I This pin outputs the result of A/D conversion. The result is 12-bit serial data output in synchronization with the rise of CLK. Clock input pin for A/D conversion Chip select signal input pin. Setting the signal level to “L” after turning the power on starts A/D conversion; setting it to “H” stops A/D conversion. When this pin is “H”, the DO and SAMP pins are “Hi-Z”. Input pins for selecting the analog input channels from among pins AN0 to AN3. See Table 1 for the correspondence between the pin settings and the channels selected. To switch the channel in mode 2 or 3, set these pins before the SAMP pin goes “H”. Conversion mode setting pins. For the correspondence between the pin settings and the modes selected, see Table 2 and “s FUNCTIONAL DESCRIPTION.” This pin becomes active in prior to data output. Serial data is output from the DO pin five clock cycles after the signal level at this pin goes “L” after “H” for one clock cycle. Reference voltage input pin Analog circuit ground pin Digital circuit ground pin Power supply pin 11 10 C0 C1 I 7 8 15 MOD0 MOD1 SAMP I O 3 4 9 16 Hi-Z : High-Z • Channel selection Table 1 C1 L L H H VREF AGND DGND VCC — — — — • Mode selection Table 2 MOD 0 L L H H Pin Settings and Mode Selection MOD1 L H L H Mode Mode 1 Mode 2 (Disabled) Mode 3 Pin Settings and Channel Selection C0 L H L H Channel AN0 AN1 AN2 AN3 3 MB88101A s BLOCK DIAGRAM VREF 12-bit D/A converter AN0 AN1 AN2 AN3 Input circuit SAMP Selecter Successive approximation register DO Comparator 12-bit latch C0 C1 Sample-and-hold circuit MOD0 MOD1 Decoder VCC AGND DGND CS CLK 4 MB88101A s FUNCTIONAL DESCRIPTION 1. Mode 1 This mode sets the DO pin to “L” and stops conversion upon completion of conversion of 12 bits. To restart conversion, set CS to “H” once then to “L”. In this mode, converted data is output from the MSB. • Timing diagram CS MOD0, MOD1 C0, C1 CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 Sampling Bit Trial DO SAMP Hi-Z B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Sampling B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Hi-Z Hi-Z Hi-Z 2. Mode 2 This mode continues conversion until CS becomes “H” after it becomes “L”. Converted data is output from the LSB, with the first piece of converted data output 20 clock cycles after CS becomes “L”. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted. • Timing diagram CS MOD0, MOD1 C0, C1 CLK Mode 2 AN0 AN2 AN1 16CLK Bit Trial DO Hi-Z SAMP MSB (AN0) ⇒ LSB Hi-Z MSB (AN2) ⇒ LSB LSB (AN0) ⇒ MSB MSB (AN1) ⇒ LSB LSB (AN2) ⇒ MSB Hi-Z Hi-Z 5 MB88101A 3. Mode 3 This mode continues conversion until CS becomes “H” after it becomes “L”. Converted data is output from the MSB. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted. • Timing diagram CS MOD0, MOD1 C0, C1 CLK Bit Trial Hi-Z DO Hi-Z SAMP Mode 3 AN0 AN2 AN1 MSB (AN0) ⇒ LSB MSB (AN0) ⇒ LSB MSB (AN2) ⇒ LSB MSB (AN2) ⇒ LSB MSB (AN1) ⇒ LSB MSB (AN1) ⇒ LSB Hi-Z Hi-Z 6 MB88101A s ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Input voltage Output voltage Power consumption Operating temperature Storage temperature * : VCC ≥ VREF WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Symbol VCC VREF VIN VOUT PD Ta Tstg — — — Based on GND (Ta = +25°C) Conditions Rating Min –0.3 –0.3* –0.3 –0.3 — –40 –55 Max +7.0 +7.0* VCC + 0.3 VCC + 0.3 150 +85 +150 Unit V V V V mW °C °C s RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage Operation temperature Symbol VCC GND Ta Value Min 3.3 — –40 Typ — 0 — Max 5.5 — +85 Unit V V °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 7 MB88101A s ELECTRICAL CHARACTERISTIC 1. DC Characteristics (1) Digital section (VCC = 3.3 V to 5.5 V, DGND = 0 V, Ta = –40°C to +85°C) Parameter Power supply voltage Power supply current Input leakage current Low-level input voltage High-level input voltage High-impedance output leakage current Low-level output voltage High-level output voltage Symbol VCC ICC IILK VIL VIH IOLZ VOL VOH DO SAMP VCC Pin name Conditions — Operation at CLK =166kHz (with no load) VIN = 0 to VCC — — VIN = 0 to VCC IOL = 2.5 mA IOH = –400 µA Value Min 3.3 — –10 VSS − 0.3 0.8 VCC –10 — VCC − 0.4 Typ 5.0 0.8 — — — — — — Max 5.5 2.0 10 0.2 VCC VCC + 0.3 10 0.4 — Unit V mA µA V V µA V V MOD0, MOD1 CLK CS C0 C1 (2) Analog section (VREF, VCC = 3.3 V to 5.5 V (VCC ≥ VREF), AGND = 0 V, Ta = –40°C to +85°C) Parameter Resolution Linearity error Differential linearity error Conversion time Consumption current Analog reference voltage Analog input voltage Symbol — — — — IREF — — VREF AN0 to AN3 — AN0 to AN3 Pin name Value Min — –4.0 –1.0 — — 3.3 0 Typ 12 — — 16 100 5.0 — Max — 2.0 3.0 — 300 VCC VREF Unit bit LSB LSB CLK µA V V 8 MB88101A (3) Definitions of A/D converter terms • Resolution Analog transition identifiable by the A/D converter • Linearity error Deviation of the straight line drawn between the zero transition point (0000 0000 0000 ↔ 0000 0000 0001) and the full-scale transition point (1111 1111 1110 ↔ 1111 1111 1111) of the device from actual conversion characteristics • Differential linearity error Deviation from the ideal input voltage required to shift output code by one LSB Digital output 1111 1111 1111 1111 1111 1110 • • • • • • • • • Actual converted value (1 LSB × N + VOT) Ideal converted value Linearity error 0000 0000 0010 0000 0000 0001 0000 0000 0000 VOT • Analog output VNT V(N+1)T VFST - VOT 4094 VNT - (1 LSB × N + VOT) 1 LSB V(N+1)T - VNT 1 LSB (LSB) (LSB) VFST 1 LSB Linearity error = = • • Differential linearity error = -1 • Analog input equivalent circuit Analog input Comparator RON1 RON2 C0 ⋅ RON1 = About 1.5 kΩ ⋅ RON2 = About 1.5 kΩ ⋅ C0 = About 60 pF Note: The above values are reference values. Notes: • The tolerance of output impedance of an external circuit connected to this A/D converter has an effect on conversion time (CLK frequency). See “s TYPICAL CHARACTERISTICS”. • If the output impedance of the external input is too high, the analog voltage sampling time may be short. • When turning the device on, turn the power supply for the digital system first before turning VREF on. 9 MB88101A 2. AC Characteristics (VREF, VCC = 3.3 V to +5.5 V (VCC ≥ VREF), AGND = 0 V, Ta = –40°C to +85°C) Parameter Clock cycle time Low-level clock pulse width High-level clock pulse width Clock rise time Clock fall time CS setup time CS hold time CS release time Channel setup time Channel hold time Data output delay time MOD setup time MOD hold time Data active delay time Data float delay time SAMP active delay time SAMP float delay time SAMP high-level output delay time SAMP low-level output delay time Symbol tCLK tCKL tCKH tCr tCf tCSS tCSH tCSR tCHS tCHH tDO tMOS tMOH tDVE tDZE tSVE tSZE tSHD tSLD Conditions VCC = 5 V ± 10% *1 — — — — — — — — — *2 — — — — — — *2 *2 Value Min 1.0 6.0 2.8 2.8 — tCKL + 0.4 1.0 1.0 0 1.0 — 0.2 0.1 — — — — — — Max 30.0 30.0 14.8 14.8 0.2 — — — — — 0.5 — — 0.5 0.5 0.5 0.5 0.5 0.5 Unit µs µs µs µs µs µs µs CLK µs CLK µs µs µs µs µs µs µs µs µs *1: Depending on the output impedance of the external circuit connected to the analog input pin *2: See “• AC test circuit.” • AC test circuit Measurement point CL = 50 pF 10 MB88101A s TIMING DIAGRAM (1) Input clock timing t CLK t CKH CLK t Cf t CKL t Cr Evaluation levels are 80% and 20% of the VCC. (2) A/D startup timing CLK tCSS CS tCSH tMOS tMOH MOD0, MOD1 tCHS C0, C1 tSVE Hi-Z tSHD tSLD tCHH SAMP tDVE Hi-Z DO 11 MB88101A (3) Data output delay time and A/D stop timing CLK tCSR CS tSZE Hi-Z SAMP tDO tDZE Hi-Z DO 12 MB88101A s TYPICAL CHARACTERISTICS Power supply voltage vs. Power supply current Power supply current ICC (µA) 1,000 900 800 700 600 500 400 300 200 100 0 Ta = +25°C VREF = VCC 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Power supply voltage VCC (V) Analog reference voltage vs. Analog consumption current Analog consumption current IREF (µA) 300 250 200 150 100 50 Ta = +25°C VCC = VREF 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Analog reference voltage VREF (V) (Continued) 13 MB88101A (Continued) Analog input external impedance vs. Clock cycle time (tCLK) 10 Ta = +25°C 9 8 Clock cycle time tCLK (µs) 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VCC = VREF = 3.3 V VCC = VREF = 5.0 V 0 32 64 96 128 Conversion time (µs) 160 Analog input impedance (kΩ) Note ; Conversion time = Clock cycle time (tCLK) × 16 14 MB88101A s ORDERING INFORMATION Part number MB88101AP MB88101APFV MB88101APF Package 16-pin Plastic DIP (DIP-16P-M04) 16-pin Plastic SSOP (FPT-16P-M05) 16-pin Plastic SOP (FPT-16P-M06) Remarks 15 MB88101A s PACKAGE DIMENSIONS 16-pin Plastic DIP (DIP-16P-M04) 19.55 –0.30 .770 +.008 –.012 +0.20 INDEX-1 INDEX-2 6.20±0.25 (.244±.010) 4.36(.172)MAX 0.51(.020)MIN 0.25±0.05 (.010±.002) 3.00(.118)MIN 0.46±0.08 (.018±.003) 15°MAX 0.99 –0 1.27(.050) MAX +0.30 +.012 1.52 –0 +0.30 +.012 .039 –0 .060 –0 2.54(.100) TYP 7.62(.300) TYP C 1994 FUJITSU LIMITED D16033S-2C-3 Dimensions in mm (inches) . Note : The values in parentheses are reference values. (Continued) 16 MB88101A 16-pin Plastic SSOP (FPT-16P-M05) Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 0.17±0.03 (.007±.001) 9 *1 5.00±0.10(.197±.004) 16 INDEX *2 4.40±0.10 6.40±0.20 (.173±.004) (.252±.008) Details of "A" part 1.25 –0.10 .049 –.004 LEAD No. 1 8 +0.20 +.008 (Mounting height) 0.65(.026) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0~8˚ 0.10±0.10 (Stand off) (.004±.004) 0.25(.010) 0.10(.004) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) C 2003 FUJITSU LIMITED F16013S-c-4-6 Dimensions in mm (inches) . Note : The values in parentheses are reference values. (Continued) 17 MB88101A (Continued) 16-pin Plastic SOP (FPT-16P-M06) +0.25 +.010 Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 0.17 –0.04 9 +0.03 +.001 *110.15 –0.20 .400 –.008 16 .007 –.002 INDEX *2 5.30±0.30 7.80±0.40 (.209±.012) (.307±.016) Details of "A" part 2.00 –0.15 .079 –.006 +0.25 +.010 (Mounting height) 1 8 "A" 0.13(.005) 0.25(.010) 0~8˚ 1.27(.050) 0.47±0.08 (.019±.003) M 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10 –0.05 +0.10 +.004 .004 –.002 (Stand off) 0.10(.004) C 2002 FUJITSU LIMITED F16015S-c-4-7 Dimensions in mm (inches) . Note : The values in parentheses are reference values. 18 MB88101A FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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