MB91F613

FUJITSU MICROELECTRONICS DATA SHEET DS07-16907-2E 32-bit Microcontrollers CMOS FR80 MB91610 Series MB91F610A/613 ■ DESCRIPTION The MB91610 series is a line of Fujitsu Microelectronics microcontrollers based on a 32-bit RISC CPU core that feature a variety of peripheral functions for embedded applications that demand high-performance and high-speed CPU processing. This series is based on the FR80* family CPU and is implemented as a single chip. * : FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Microelectronics Limited. ■ FEATURES • FR80 CPU • 32-bit RISC, load/store architecture, five-stage pipeline • General-purpose registers : 32-bit × 16 • 16-bit fixed-length instructions (basic instructions) : 1 instruction per cycle • Instructions suitable for embedded applications - Memory-to-memory transfer, bit processing, barrel shift instructions, etc. - Instruction support for high level languages Function entry and exit instructions, instructions for register multi-load and multi-store - Bit search instruction “1” detection, “0” detection, transition point detection - Branch instructions with delay slots Reduced overhead when processing branches - Register interlock functions Facilitate coding in assembly language (Continued) For the information for microcontroller supports, see the following web site. This web site includes the "Customer Design Review Supplement" which provides the latest cautions on system development and the minimal requirements to be checked to prevent problems before the system development. http://edevice.fujitsu.com/micom/en-support/ Copyright©2008-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2009.8 MB91610 Series - Built-in multiplier/instruction-level support - Signed 32-bit multiplication : 5 cycles - Signed 16-bit multiplication : 3 cycles - Interrupts (save PC and PS) : 6 cycles, 16 priority levels - Harvard architecture allowing program access and data access to be executed simultaneously - Instruction prefetch function has been added with 4 word instruction queue of CPU • Instruction compatible with FR family CPU - Additional bit search instructions - No resource instructions and coprocessor instructions • Maximum operating frequency • CPU : 33 MHz • Resources : 33 MHz • DMA controller (DMAC) • 8 channels • Address space : 32 bits (4 Gbytes) • Transfer modes : Block transfer/burst transfer/demand transfer • Address update : Increment/decrement/fixed (increment/decrement step size of 1, 2, or 4) • Transfer data length : Selectable from 8-bit, 16-bit, 32-bit • Block size : 1 to 16 • Number of transfers : 1 to 65535 • Transfer requests - Requests from software - Interrupt requests from peripheral resources (interrupt requests are shared, including external interrupts) • Reload functions : Reload can be specified on all channels • Priority order : Fixed (ch.0 > ch.1 > ch.2 > ch.3 > ...) or round-robin • Interrupt requests : Interrupts can be generated for transfer complete, transfer error, and transfer interrupted. • Multifunction serial interface • 4 channels with 16-byte FIFO, 4 channels without FIFO • Operation mode is selectable from UART/CSIO/I2C for each channel (For ch.0, I2C is not available.) • UART - Full-duplex double buffer - Selectable parity on/off - Built-in dedicated baud rate generator - External clock can be used as a serial clock - Error detection function for parity, frame and overrun errors • CSIO - Full-duplex double buffer - Built-in dedicated baud rate generator - Overrun error detection function • I2C - Supports both standard mode (Max 100 kbps) and Fast mode (Max 400 kbps) - Some channels are 5 V tolerant (Continued) 2 DS07-16907-2E MB91610 Series • Interrupts • Total of 16 external interrupts (some pins are 5 V tolerant) • Interrupts from peripheral resources • Programmable interrupt levels (16 levels) • Can be used to return from stop mode, sleep mode • A/D converter • 8 channels, 1 unit • 10-bit resolution • Conversion time : approx. 1.2 μs (PCLK = 33 MHz) • Priority conversion (2 levels) • Conversion modes : Single-shot conversion mode, scan conversion mode • Activation sources : Software, external trigger, base timer • Built-in FIFO for storing conversion data (for scan conversion:16, for priority conversion:4) • Base timer • 8 channels • Operation mode is selectable from the followings for each channel - 16/32-bit reload timer - 16-bit PWM timer - 16/32-bit PWC timer - 16-bit PPG timer • Cascading connection between 2 channels allows them to be used as one 32-bit timer • Multiple channels can be started simultaneously • Input/output select function • 16-bit reload timer • 3 channels (including 1 channel for REALOS) • Interval timer function • Count clock select function (peripheral clock (PCLK) divided by 2 to 64) • Compare timer • 32-bit input capture : 4 channels • 32-bit output compare : 4 channels • 32-bit free-run timer : 1 channel • Other interval timers • Watch counter : 1 channel • Watchdog timer : 2 channels - Watchdog timer 0 - After resetting this device, the watchdog timer becomes active when an arbitrary value is written to the WDTCPR0 register. - The cycle of the watchdog timer 0 can be selected from the peripheral clock (PCLK) × (29 to 224). - Watchdog timer 1 - After releasing the reset of this device, it counts with the CPU clock (CCLK). - Disable/ enable of the counter operation can be controlled by HWDE pin. - The cycle of the watchdog timer 1 is CCLK × 223 cycle fixed. (Continued) DS07-16907-2E 3 MB91610 Series • USB function / HOST • 1 channel • Supports Full-Speed only • The USB function and USB HOST are the switch types (USB I/O multiplexed) • Support of DMA transfer • USB Function - Support of up to six endpoints - Endpoint 0 is provided for the fixed use of control transfers - Bulk or interrupt transfer can be selected for endpoint 1 to 5 - Double buffer structure for endpoint 1 to 5 • USB HOST - Support control transfer, bulk transfer, interrupt transfer, and isochronous transfer - Automatic detection of connection/disconnection of USB devices - Automatic processing of a handshake packet for IN/OUT token processing - Support of a maximum packet length of up to 256 bytes - Support for a wakeup function • HDMI-CEC/Remote Control Reception • 1 channel • HDMI-CEC reception function (with automatic ACK response function) • Remote control reception function (built-in 4-byte receive buffer) • OSDC function • 16 bits RGB (256 colors available among 65536 colors) • Analog RGB output : Max 50 MHz Digital RGB output : Max 75 MHz • A font in 32 × 32 dots can be displayed up to 60 × 32 • Two-layered display of MAIN/SUB • 16384 characters at the maximum • Equipped with one PLL for dot clock generation • Main timer • 1 channel • Counts the oscillation stabilization wait time of the main clock (MCLK) • Counts the oscillation stabilization wait time of the PLL clock (PLLCLK) • Can be used as an interval timer while the main clock (MCLK) oscillations is stable • Sub timer • 1 channel • Counts the oscillation stabilization wait time of the sub clock (SBCLK) • Can be used as an interval timer while the sub clock (SBCLK) oscillations is stable • Clock generation • Main clock (MCLK) oscillator • Sub clock (SBCLK) oscillator • PLL clock (PLLCLK) oscillator (Continued) 4 DS07-16907-2E MB91610 Series (Continued) • Low-power dissipation mode • Stop mode • Watch mode • Sleep mode • Doze mode • Clock division function • Other features • I/O port • INIT pin is provided as a reset pin • Watchdog timer reset, software reset • Delay interrupt • Power supply - Single power supply (3.0 V to 3.6 V) DS07-16907-2E 5 MB91610 Series ■ PRODUCT LINEUP Product Name Items Product type Built-in program memory capacity Built-in RAM capacity DMA controller (DMAC) Base timer Multifunction serial interface External interrupt 10-bit A/D converter 16-bit reload timer Compare timer Watch counter I/O port USB function / HOST HDMI-CEC/Remote control reception OSDC Main timer Sub timer Wild register Debug function DSU4 MB91F610A Flash memory product 512 Kbytes (Flash) 32 Kbytes 8 channels 8 channels Without FIFO : 4 channels (ch.0 to ch.3) With FIFO : 4 channels (ch.8 to ch.11) 16 channels 8 channels (1 unit) 3 channels 32-bit input capture : 4 channels 32-bit output compare : 4 channels 32-bit free-run timer : 1 channel 1 channel 50 (Max) 1 channel 1 channel Font FLASH : 16384 characters Font ROM : 7168 characters 1 channel 1 channel 16 channels ⎯ MB91613 MASK ROM product 512 Kbytes (ROM) ■ PACKAGES Product name Package FPT-120P-M21 : Supported Note: Refer to “■ PACKAGE DIMENSIONS” for detailed information on each package. MB91F610A MB91613 6 DS07-16907-2E MB91610 Series ■ PIN ASSIGNMENT (TOP VIEW) P00/TIOA0/SOUT0_1/IN0 P14/TIOA6/SOUT3/INT4 P10/TIOA4/SOUT2/INT0 P02/TIOA1/SCK0_1/IN2 P01/TIOB0/SIN0_1/IN1 P16/TIOA7/SCK3/INT6 P12/TIOA5/SCK2/INT2 P11/TIOB4/SIN2/INT1 P15/TIOB6/SIN3/INT5 P04/TIOA2/SOUT1 P24/SOUT9/OUT0 P06/TIOA3/SCK1 P26/SCK9/OUT2 P05/TIOB2/SIN1 P17/TIOB7/INT7 P13/TIOB5/INT3 P25/SIN9/OUT1 P03/TIOB1/IN3 P23/RCIN_1 P20/SOUT8 P07/TIOB3 P27/OUT3 P22/SCK8 P21/SIN8 ICD3* ICD2* ICD1* 93 ICD0* 92 VSS 120 119 117 116 115 114 112 111 110 109 107 106 105 104 102 101 100 118 113 108 103 99 98 97 96 95 94 VCC P30/SOUT10/INT8 P31/SIN10/INT9 P32/SCK10/INT10 P33/INT11 P34/SOUT11/INT12 P35/SIN11/INT13 P36/SCK11/INT14 P37/INT15 P50 P51 P52 P53 P54/RCIN P55/ADTRG P56/FRCK P57 VSS R0 R1 R2 R3 R4 G0 G1 G2 G3 G4 G5 VCC 91 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 LQFP-120 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 VSS VCC ICS2* ICS1* ICS0* IBREAK* ICLK* TRST* AVRH AVSS AVCC P77/AN7/SCK0/TMI2 P76/AN6/SIN0/TMI1 P75/AN5/SOUT0/TMI0 P74/AN4/TMO2 P73/AN3/TMO1/OUT3_1 P72/AN2/TMO0/OUT2_1 P71/AN1/OUT1_1 P70/AN0/OUT0_1 INIT MD0 MD1 X0 X1 VSS PK0/X1A PK1/X0A HWDE VCC VSS 31 32 34 35 36 37 39 43 48 53 58 UDM 33 38 40 41 42 44 45 46 47 49 50 51 52 54 55 56 57 59 VSS VOA0 VOA1 VOA2 VSS VOB VSSP VSSD VSYNC VDDD HSYNC BOUT VDDP VCI VREF CPO VRO VCC B0 B1 B2 B3 B4 DCKO ROUT DCKI (FPT-120P-M21) * : N.C. pin for MB91613. Note : The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS07-16907-2E GOUT UDP C 60 7 MB91610 Series ■ PIN DESCRIPTION The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. I/O circuit Pin no. Pin name Function type* 1 VCC P30 2 SOUT10 (SDA10) INT8 P31 3 SIN10 INT9 P32 4 SCK10 (SCL10) INT10 5 P33 INT11 P34 6 SOUT11 (SDA11) INT12 P35 7 SIN11 INT13 P36 8 SCK11 (SCL11) INT14 9 10 11 P37 INT15 P50 P51 C B B C C C C C C C ⎯ 3.3 V power supply General-purpose I/O port Multifunction serial ch.10 output [operation modes 0 to 2] I2C ch.10 serial data line [operation mode 4] External interrupt 8 input General-purpose I/O port Multifunction serial ch.10 input External interrupt 9 input General-purpose I/O port Multifunction serial ch.10 clock [operation modes 0 to 2] I2C ch.10 serial clock line [operation mode 4] External interrupt 10 input General-purpose I/O port External interrupt 11 input General-purpose I/O port Multifunction serial ch.11 output [operation modes 0 to 2] I2C ch.11 serial data line [operation mode 4] External interrupt 12 input General-purpose I/O port Multifunction serial ch.11 input External interrupt 13 input General-purpose I/O port Multifunction serial ch.11 clock [operation modes 0 to 2] I2C ch.11 serial clock line [operation mode 4] External interrupt 14 input General-purpose I/O port External interrupt 15 input General-purpose I/O port General-purpose I/O port (Continued) 8 DS07-16907-2E MB91610 Series Pin no. 12 13 14 Pin name P52 P53 P54 RCIN P55 ADTRG P56 FRCK P57 VSS R0 R1 R2 R3 R4 G0 G1 G2 G3 G4 G5 VCC VSS B0 B1 B2 B3 B4 VOA0 VOA1 VOA2 I/O circuit type* B B B General-purpose I/O port General-purpose I/O port General-purpose I/O port Remote control I/O General-purpose I/O port Function 15 B A/D converter external trigger input General-purpose I/O port Free-run timer clock input General-purpose I/O port GND RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output 3.3V power supply GND RGB digital output RGB digital output RGB digital output RGB digital output RGB digital output Alpha blend output Alpha blend output Alpha blend output (Continued) 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 B B ⎯ H H H H H H H H H H H ⎯ ⎯ H H H H H H H H DS07-16907-2E 9 MB91610 Series Pin no. 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin name VOB DCKO DCKI VSYNC HSYNC VSSP VDDP VCI CPO VSSD VDDD VREF VRO ROUT GOUT BOUT VCC UDP UDM VSS C VSS VCC HWDE PK1 X0A PK0 I/O circuit type* H H F F F ⎯ ⎯ ⎯ M ⎯ ⎯ M M M M M ⎯ USB USB ⎯ ⎯ ⎯ ⎯ F G OSD display period output Dot clock output Dot clock input Vertical synchronous input Function Horizontal synchronous input Dot clock PLL ground Dot clock PLL power supply VCO control voltage input Charge pump output RGB analog output GND RGB analog output power supply RGB analog output reference power supply RGB analog output resistance connected pin R output (analog) G output (analog) B output (analog) 3.3 V power supply USB pin USB pin GND C pin for a regulator GND 3.3 V power supply Hardware watchdog enable input General-purpose I/O port 32kHz oscillation pin General-purpose I/O port 65 66 67 68 X1A VSS X1 X0 G ⎯ A A 32 kHz oscillation pin GND Main oscillation pin Main oscillation pin (Continued) 10 DS07-16907-2E MB91610 Series Pin no. 69 70 71 Pin name MD1 MD0 INIT P70 I/O circuit type* F, L F, L F, L Mode pin Mode pin Initial (reset) pin General-purpose I/O port D Function 72 AN0 OUT0_1 P71 A/D converter ch.0 analog input Output compare ch.0 output (Port 1) General-purpose I/O port 73 AN1 OUT1_1 P72 D A/D converter ch.1 analog input Output compare ch.1 output (Port 1) General-purpose I/O port 74 AN2 TMO0 OUT2_1 P73 D A/D converter ch.2 analog input Reload timer ch.0 output Output compare ch.2 output (Port 1) General-purpose I/O port 75 AN3 TMO1 OUT3_1 P74 D A/D converter ch.3 analog input Reload timer ch.1 output Output compare ch.3 output (Port 1) General-purpose I/O port 76 AN4 TMO2 P75 D A/D converter ch.4 analog input Reload timer ch.2 output General-purpose I/O port 77 AN5 SOUT0 TMI0 P76 D A/D converter ch.5 analog input Multifunction serial ch.0 output [operation modes 0 to 2] Reload timer ch.0 input General-purpose I/O port 78 AN6 SIN0 TMI1 D A/D converter ch.6 analog input Multifunction serial ch.0 input Reload timer ch.1 input (Continued) DS07-16907-2E 11 MB91610 Series Pin no. Pin name P77 I/O circuit type* General-purpose I/O port D Function 79 AN7 SCK0 TMI2 A/D converter ch.7 analog input Multifunction serial ch.0 clock [operation modes 0 to 2] Reload timer ch.2 input 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 AVCC AVSS AVRH TRST ICLK IBREAK ICS0 ICS1 ICS2 VCC VSS C ICD0 ICD1 ICD2 ICD3 P00 ⎯ ⎯ ⎯ E K I H H H ⎯ ⎯ ⎯ J J J J A/D converter analog power supply A/D converter GND A/D converter analog reference power supply Tool reset input for DSU4 N.C. pin for MASK products. Clock pin for DSU4 N.C. pin for MASK products. Break pin for DSU4 N.C. pin for MASK products. DSU4 status N.C. pin for MASK products. DSU4 status N.C. pin for MASK products. DSU4 status N.C. pin for MASK products. 3.3 V power supply GND C pin for a regulator DSU4 data N.C. pin for MASK products. DSU4 data N.C. pin for MASK products. DSU4 data N.C. pin for MASK products. DSU4 data N.C. pin for MASK products. General-purpose I/O port 96 TIOA0 SOUT0_1 IN0 B Base timer ch.0 TIOA Multifunction serial ch.0 output (Port 1) [operation modes 0 to 2] Input capture ch.0 input (Continued) 12 DS07-16907-2E MB91610 Series Pin no. Pin name P01 I/O circuit type* General-purpose I/O port B Base timer ch.0 TIOB Function 97 TIOB0 SIN0_1 IN1 P02 Multifunction serial ch.0 input (Port 1) Input capture ch.1 input General-purpose I/O port 98 TIOA1 SCK0_1 IN2 P03 B Base timer ch.1 TIOA Multifunction serial ch.0 clock (Port 1) [operation modes 0 to 2] Input capture ch.2 input General-purpose I/O port 99 TIOB1 IN3 P04 B Base timer ch.1 TIOB Input capture ch.3 input General-purpose I/O port 100 TIOA2 SOUT1 (SDA1) P05 B Base timer ch.2 TIOA Multifunction serial ch.1 output [operation modes 0 to 2] I2C ch.1 serial data line [operation mode 4] General-purpose I/O port 101 TIOB2 SIN1 P06 B Base timer ch.2 TIOB Multifunction serial ch.1 input General-purpose I/O port 102 TIOA3 SCK1 (SCL1) B Base timer ch.3 TIOA Multifunction serial ch.1 clock [operation modes 0 to 2] I2C ch.1 serial clock line [operation mode 4] 103 P07 TIOB3 P10 TIOA4 B General-purpose I/O port Base timer ch.3 TIOB General-purpose I/O port Base timer ch.4 TIOA 104 SOUT2 (SDA2) INT0 B Multifunction serial ch.2 output [operation modes 0 to 2] I2C ch.2 serial data line [operation mode 4] External interrupt 0 input (Continued) DS07-16907-2E 13 MB91610 Series Pin no. Pin name P11 I/O circuit type* General-purpose I/O port B Base timer ch.4 TIOB Function 105 TIOB4 SIN2 INT1 P12 TIOA5 Multifunction serial ch.2 input External interrupt 1 input General-purpose I/O port Base timer ch.5 TIOA 106 SCK2 (SCL2) INT2 P13 B Multifunction serial ch.2 clock [operation modes 0 to 2] I2C ch.2 serial clock line [operation mode 4] External interrupt 2 input General-purpose I/O port 107 TIOB5 INT3 P14 TIOA6 B Base timer ch.5 TIOB External interrupt 3 input General-purpose I/O port Base timer ch.6 TIOA 108 SOUT3 (SDA3) INT4 P15 B Multifunction serial ch.3 output [operation modes 0 to 2] I2C ch.3 serial data line [operation mode 4] External interrupt 4 input General-purpose I/O port 109 TIOB6 SIN3 INT5 P16 TIOA7 110 SCK3 (SCL3) INT6 P17 111 TIOB7 INT7 P20 112 SOUT8 (SDA8) C B B B Base timer ch.6 TIOB Multifunction serial ch.3 input External interrupt 5 input General-purpose I/O port Base timer ch.7 TIOA Multifunction serial ch.3 clock [operation modes 0 to 2] I2C ch.3 serial clock line [operation mode 4] External interrupt 6 input General-purpose I/O port Base timer ch.7 TIOB External interrupt 7 input General-purpose I/O port Multifunction serial ch.8 output [operation modes 0 to 2] I2C ch.8 serial data line [operation mode 4] (Continued) 14 DS07-16907-2E MB91610 Series (Continued) Pin no. 113 Pin name P21 SIN8 P22 114 SCK8 (SCL8) 115 P23 RCIN_1 P24 116 SOUT9 (SDA9) OUT0 P25 117 SIN9 OUT1 P26 118 SCK9 (SCL9) OUT2 119 120 P27 OUT3 VSS C ⎯ C C C C C I/O circuit type* C General-purpose I/O port Multifunction serial ch.8 input General-purpose I/O port Multifunction serial ch.8 clock [operation modes 0 to 2] I2C ch.8 serial clock line [operation mode 4] General-purpose I/O port Remote control I/O (1) General-purpose I/O port Multifunction serial ch.9 output [operation modes 0 to 2] I2C ch.9 serial data line [operation mode 4] Output compare ch.0 output General-purpose I/O port Multifunction serial ch.9 input Output compare ch.1 output General-purpose I/O port Multifunction serial ch.9 clock [operation modes 0 to 2] I2C ch.9 serial clock line [operation mode 4] Output compare ch.2 output General-purpose I/O port Output compare ch.3 output GND Function * : Refer to “■ I/O CIRCUIT TYPE” for details on the I/O circuit types. DS07-16907-2E 15 MB91610 Series ■ I/O CIRCUIT TYPE Type A X1 Clock input Circuit Remarks • Oscillation feedback resistance approx.1 MΩ • With standby control X0 Standby control B R • • • • P-ch Digital output CMOS level output CMOS level hysteresis input With pull-up control With standby control P-ch Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off. R N-ch Digital output Pull-up control Digital input Standby control (Continued) 16 DS07-16907-2E MB91610 Series Type C Circuit • • • • Remarks CMOS level output CMOS level hysteresis input 5 V tolerant input With standby control P-ch Digital output N-ch R Digital output Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off. Digital input Standby control D R P-ch P-ch Digital output • • • • • • CMOS level output CMOS level hysteresis input With input control Analog input With pull-up control With standby control N-ch Digital output Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off. R Pull-up control Digital input Standby control Analog input Input control (Continued) DS07-16907-2E 17 MB91610 Series Type E R Circuit Remarks • CMOS level hysteresis input • With pull-up P-ch P-ch N-ch R Digital input F CMOS level hysteresis input P-ch N-ch R Digital input (Continued) 18 DS07-16907-2E MB91610 Series Type G X1A Circuit Remarks • Oscillation feedback resistance approx.10MΩ • CMOS level output • CMOS level hysteresis input • With standby control P-ch N-ch R Digital output Digital output Digital input Standby control Clock input Standby control Digital input R X0A P-ch N-ch Standby control Digital output Digital output H CMOS level output P-ch Digital output N-ch Digital output (Continued) DS07-16907-2E 19 MB91610 Series Type I Circuit Remarks • CMOS level hysteresis input • With Pull-down control P-ch N-ch R R Pull-down control Digital input J • CMOS level output • CMOS level input • With Pull-down control P-ch Digital output N-ch R R Digital output Pull-down control Digital input K CMOS level output (8 mA) P-ch Digital output N-ch Digital output (Continued) 20 DS07-16907-2E MB91610 Series (Continued) Type L N-ch N-ch Circuit Remarks • Flash memory product only • CMOS level hysteresis input • High voltage control for testing Flash memory Control pin N-ch N-ch N-ch Mode input R M Analog pin P-ch N-ch USB UDP ( + ) output UDP(+) USB I/O pin UDP ( + ) input Differential Differential input UDM ( − ) input UDM ( − ) output Direction UDM(-) DS07-16907-2E 21 MB91610 Series ■ PRECAUTIONS FOR HANDLING THE DEVICES Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU MICROELECTRONICS semiconductor devices. 1. Precautions for Product Design This section describes precautions when designing electronic equipment using semiconductor devices. • Absolute Maximum Ratings Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. • Recommended Operating Conditions The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. • Processing and Protection of Pins These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions. (1) Preventing Over-Voltage and Over-Current Conditions Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage. (2) Protection of Output Pins Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device. Therefore, avoid this type of connection. (3) Handling of Unused Input Pins Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such pins should be connected through an appropriate resistance to a power supply pin or ground pin. - PLL pin for OSD (recommended pin handling when PLL for OSD is not in use) Pin no. Pin name Recommended handling of unused pin 45 VSSP VSS (PLL macro GND) 46 VDDP VSS (PLL macro power supply) 47 VCI VSS 48 CPO VSS - Analog OSD (recommended pin handling when analog OSD is not in use) Pin no. Pin name Recommended handling of unused pin 49 VSSD VSS (DAC macro GND) 22 DS07-16907-2E MB91610 Series 50 51 52 53 54 55 VDDD VREF VRO ROUT GOUT BOUT VSS (DAC macro power supply) VSS VSS VSS VSS VSS - Digital OSD (recommended pin handling when digital OSD is not in use) Pin no. Pin name Recommended handling of unused pin 19 R0 OPEN 20 R1 OPEN 21 R2 OPEN 22 R3 OPEN 23 R4 OPEN 24 G0 OPEN 25 G1 OPEN 26 G2 OPEN 27 G3 OPEN 28 G4 OPEN 29 G5 OPEN 32 B0 OPEN 33 B1 OPEN 34 B2 OPEN 35 B3 OPEN 36 B4 OPEN - Other OSD pins Pin no. Pin name 37 VOA0 38 VOA1 39 VOA2 40 VOB 41 DCKO 42 DCKI 43 VSYNC 44 HSYNC Recommended handling of unused pin OPEN OPEN OPEN OPEN OPEN pull-down pull-down pull-down - USB (example of pin handling when USB is not in use) Pin no. Pin name Recommended handling of unused pin 57 UDP pull-down 58 UDM pull-down - DSU pin Pin no. 83 84 85 86 87 88 92 93 94 95 Pin name TRST ICLK IBREAK ICS0 ICS1 ICS2 ICD0 ICD1 ICD2 ICD3 Recommended handling of unused pin Reset signal input from user board OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN DS07-16907-2E 23 MB91610 Series • Latch-up Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be formed, causing large current levels in excess of several hundred mA to flow continuously at the power supply pin. This condition is called latch-up. Note: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the following: (a) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include attention to abnormal noise, surge levels, etc. (b) Be sure that abnormal current flows do not occur during the power-on sequence. • Observance of Safety Regulations and Standards Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the design of products. • Fail-Safe Design Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. • Precautions Related to Usage of Devices FUJITSU MICROELECTRONICS semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU MICROELECTRONICS sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. 24 DS07-16907-2E MB91610 Series 2. Precautions for Package Mounting Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance during soldering, you should only mount under FUJITSU MICROELECTRONICS's recommended conditions. For detailed information about mount conditions, contact your sales representative. • Lead Insertion Type Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct soldering on the board, or mounting by using a socket. Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage temperature. Mounting processes should conform to recommended mounting conditions. If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket contacts and IC leads be verified before mounting. • Surface Mount Type Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges. You must use appropriate mounting techniques. FUJITSU MICROELECTRONICS recommends the solder reflow method, and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with FUJITSU MICROELECTRONICS ranking of recommended conditions. • Lead-Free Packaging Note: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, junction strength may be reduced under some conditions of use. • Storage of Semiconductor Devices Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the following: (a) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product. Store products in locations where temperature changes are slight. (b) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5 °C and 30 °C. When you open Dry Package that recommends humidity 40% to 70% relative humidity. (c) When necessary, FUJITSU MICROELECTRONICS packages semiconductor devices in highly moistureresistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for storage. (d) Avoid storing packages where they are exposed to corrosive gases or high levels of dust. DS07-16907-2E 25 MB91610 Series • Baking Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU MICROELECTRONICS recommended conditions for baking. Condition: + 125 °C/24 h • Static Electricity Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: (a) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity. (b) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment. (c) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 MΩ). Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended. (d) Ground all fixtures and instruments, or protect with anti-static measures. (e) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies. • Precautions for Use Environment Reliability of semiconductor devices depends on ambient temperature and other conditions as described above. For reliable performance, do the following: (1) Humidity Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing. (2) Discharge of Static Electricity When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges. (3) Corrosive Gases, Dust, or Oil Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices. (4) Radiation, Including Cosmic Radiation Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users should provide shielding as appropriate. (5) Smoke, Flame Note : Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of FUJITSU MICROELECTRONICS products in other special environmental conditions should consult with sales representatives. 26 DS07-16907-2E MB91610 Series ■ HANDLING DEVICES • Power supply pins In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect the current supply source with the VCC and VSS pins of this device at low impedance. It is also advisable that a ceramic capacitor of approximately 0.1 μF be connected as a bypass capacitor between VCC and VSS near this device. • Crystal oscillator circuit Noise near the X0 and X1 pins may cause the device to malfunction. Design the printed circuit board so that X0, X1, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. It is strongly recommended that the PC board artwork be designed such that the X0 and X1 pins are surrounded by ground plane as this is expected to produce stable operation. • OSDC output pin The OSDC output pins (R0 to R4, G0 to G5, B0 to B4, VOA0 to VOA2, VOB, DCKO) are high-speed corresponded output pin. Adjust the signal waveform such as by inserting damping resistor on the board as needed. • Using an external clock When using an external clock, the clock signal should be input to the X0 pin only and the X1 pin should be kept open. • Example of Using an External Clock X0 X1 Open MB91610 series • C Pin As MB91610 series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 μF to the C pin for use by the regulator. C MB91610 series VSS 4.7 µF GND DS07-16907-2E 27 MB91610 Series • Mode pins (MD0, MD1) Connect the MD pin (MD0, MD1) directly to VCC or VSS pins. Design the printed circuit board such that the pullup/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching to test mode due to noise. • Notes on power-on • To ensure that the internal regulator and the oscillator have stabilized immediately after the power is turned on, keep an “L” level input connected to the INIT pin for the duration of the regulator voltage stabilization wait time + the oscillator start time of the oscillator + the main oscillator stabilization wait time. • Turn power on/off in the following order Turning on : VCC → AVCC → AVRH Turning off : AVRH → AVCC → VCC • Release the reset (INIT pin “L” level to “H” level) after the power supply has stabilized. • Caution on operations during PLL clock mode On this microcontroller, if in case the crystal oscillator breaks off or an external reference clock input stops while the PLL clock mode is selected, a self-oscillator circuit contained in the PLL may continue its operation at its self-running frequency. However, Fujitsu Microelectronics will not guarantee results of operations if such failure occurs. 28 DS07-16907-2E MB91610 Series ■ BLOCK DIAGRAM DSU4 FR80 CPU Step-down regulator Internal program memory Flash memory Crossbar switch RAM On-chip bus DMAC 8 channels Peripheral bus bridge OSDC Clock control 32-bit peripheral bus Watchdog timer Interrupt controller Delay interrupt External interrupt, 16 channels USB function / HOST 16-bit peripheral bus Clock generation USB clock generation Watch counter Ports 16-bit reload timer, 3 channels Base timer, 8 channels 32-bit free-run timer, 1 channel 32-bit input capture, 4 channels A/D converter, 8 channels (1 unit) 32-bit output compare, 4 channels Multifunction serial interface, 4 channels Multifunction serial interface with FIFO, 4 channels HDMI-CEC/ Remote control reception, 1 channel Ports DS07-16907-2E Ports 29 MB91610 Series ■ MEMORY SPACE 1. Memory Space The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access. • Direct Addressing Areas The following areas in the address space are used as I/O areas. These areas are called direct addressing areas, and the address of an operand in these areas can be specified directly within an instruction. The size of the directly addressable area depends on the length of the data being accessed as follows. • Byte data access : 0000 0000H to 0000 00FFH • Half word data access : 0000 0000H to 0000 01FFH • Word data access : 0000 0000H to 0000 03FFH 30 DS07-16907-2E MB91610 Series 2. Memory Map MB91F610A FLASH 512 Kbytes RAM 32 Kbytes 0000 0000H 0000 0000H MB91613 ROM 512 Kbytes RAM 32 Kbytes I/O area (Direct addressing) I/O area (Direct addressing) 0000 0400H 0000 0400H I/O area I/O area 0001 0000H 0001 0000H Reserved Reserved 0003 8000H 0003 8000H Built-in RAM area 32 Kbytes Built-in RAM area 32 Kbytes 0004 0000H 0004 0000H Reserved 0008 0000H 0008 0000 H Reserved FLASH area 512 Kbytes 000F 8000H 0010 0000H ROM area 512 Kbytes 0010 0000H Small-sector area Reserved Reserved FFFF FFFFH FFFF FFFFH Notes: • Small sector area is related to flash products only. Please refer to the Flash Memory section of the Hardware Manual for more details. • Do not access the reserved areas. DS07-16907-2E 31 MB91610 Series ■ I/O MAP [How to read the table] Address 0000 0000H Register +0 PDR0 [R/W] B, H XXXXXXXX WDTCR0 [R/W] B, H -0--0000 EIRR0 [R/W] B, H, W 000 0000 +1 PDR1 [R/W] B, H XXXXXXXX WDTCPR0 [R/W] B, H 00000000 ENIR0 [R/W] B, H, W 00000000 +2 PDR2 [R/W] B, H XXXXXXXXXXX ⎯ ELVR0 [R/W] B, H, W 00000000 00000000 +3 PDR3 [R/W] B, H XXXXXXXX Block Port data register Watchdog timer External interrupt 0 to 7 0000 003CH 0000 0040H ⎯ : Reserved area Initial value after reset “1” : Initial value“1” “0” : Initial value“0” “X” : Initial value undefined “ - ” : Reserved bit or undefined bit Access unit (B : byte, H : half word, W : word) Read/write attribute “R” : Indicates that there is a read only bit. “R/W” : Indicates that there is a read/write bit. “W” : Indicates that there is a write only bit. Register name (column 1 of the register is at address 4n, column 2 is at address 4 n + 2...) Leftmost register address (For word-length access, column 1 of the register is the MSB of the data.) Notes : • When performing a data access, the addresses should be as below. - Word access : Address should be multiples of 4 (least significant 2 bits should be “00B”) - Half word access : Address should be multiples of 2 (least significant bit should be “0B”) - Byte access : ⎯ • Do not access the reserved areas. 32 DS07-16907-2E MB91610 Series Address 0000 0000H 0000 0004H 0000 0008H to 0000 0010H 0000 0014H 0000 0018H to 0000 001CH 0000 0020H 0000 0024H Register +0 PDR0 [R/W] B,H XXXXXXXX ⎯ +1 PDR1 [R/W] B,H XXXXXXXX PDR5 [R/W] B,H XXXXXXXX ⎯ PDRK [R/W] B ------XX ⎯ RCCR [R/W] B 0---0000 RCDBHW [R/W] B 00000000 RCDTHH [R] B,H,W 00000000 RCST [R/W] B 00000000 ⎯ RCDTHL [R] B,H,W 00000000 RCSHW [R/W] B 00000000 RCADR1 [R/W] B ---00000 RCDTLH [R] B,H,W 00000000 ⎯ ⎯ WDTCR0[R/W] B,H 00000000 EIRR0[R/W] B,H,W 00000000 DICR [R/W] B -------0 TMRLRA0 [R/W] H XXXXXXXX XXXXXXXX ⎯ TMRLRA1 [R/W] H XXXXXXXX XXXXXXXX ⎯ WDTCPR0[R/W] B,H 00000000 ENIR0[R/W] B,H,W 00000000 WDTCR1[R] B,H XXXX0000 WDTCPR1[R/W] B,H 00000000 RCDAHW [R/W] B 00000000 RCADR2 [R/W] B ---00000 RCDTLL [R] B,H,W 00000000 ⎯ +2 PDR2 [R/W] B,H XXXXXXXX ⎯ +3 PDR3 [R/W] B,H XXXXXXXX PDR7[R/W] B,H XXXXXXXX Block Port data register 0000 0028H HDMI-CEC/ Remote controller 0000 002CH 0000 0030H to 0000 0038H 0000 003CH RCCKD [R/W] H ---00000 00000000 Reserved Watchdog timer External interrupt 0 to 7 Delay interrupt 16-bit reload timer ch.0 16-bit reload timer ch.1 (Continued) 0000 0040H ELVR0[R/W] B,H,W 00000000 00000000 ⎯ TMR0 [R] H XXXXXXXX XXXXXXXX TMCSR0 [R/W] H --000000 --000000 TMR1 [R] H XXXXXXXX XXXXXXXX TMCSR1 [R/W] H --000000 --000000 0000 0044H 0000 0048H 0000 004CH 0000 0050H 0000 0054H DS07-16907-2E 33 MB91610 Series Address 0000 0058H 0000 005CH Register +0 +1 +2 +3 TMRLRA2 [R/W] H XXXXXXXX XXXXXXXX ⎯ SCR0 [R/W] B,H,W 0--00000 SMR0 [R/W] B,H,W 000-0000 TMR2 [R] H XXXXXXXX XXXXXXXX TMCSR2 [R/W] H --000000 --000000 SSR0 [R,R/W] B,H,W 0-000011 BGR10[R/W]H,W 00000000 SSR1 [R,R/W] B,H,W 0-000011 ESCR0 [R/W] B,H,W -0000000 Block 16-bit reload timer ch.2 0000 0060H 0000 0064H RDR0[R]/TDR0[W] B,H,W*1 -------0 00000000 SCR1[R/W] IBCR1[R,R/W] B,H,W*2 0--00000 SMR1 [R/W] B,H,W 000-0000 Multi-function serial interface ch.0 BGR00[R/W] H,W 00000000 ESCR1[R/W] IBSR1[R,R/W] B,H,W*2 -0000000 0000 0068H 0000 006CH RDR1[R]/TDR1[W] B,H,W*1 -------0 00000000 ISMK1 [R/W] B,H*2 -------SCR2[R/W] IBCR2[R,R/W] B,H,W*2 0--00000 ISBA1 [R/W] B,H*2 -------SMR2 [R/W] B,H,W 000-0000 Multi-function BGR11[R/W] H,W BGR01[R/W] H,W serial interface ch.1 00000000 00000000 ⎯ SSR2 [R,R/W] B,H,W 0-000011 ESCR2[R/W] IBSR2 [R,R/W] B,H,W*2 -0000000 0000 0070H 0000 0074H 0000 0078H RDR2[R]/TDR2[W] B,H,W*1 -------0 00000000 ISMK2 [R/W] B,H*2 -------SCR3[R/W] IBCR3[R,R/W] B,H,W*2 0--00000 ISBA2 [R/W] B,H*2 -------SMR3 [R/W] B,H,W 000-0000 Multi-function BGR12[R/W] H,W BGR02[R/W] H,W serial interface ch.2 00000000 00000000 ⎯ SSR3 [R,R/W] B,H,W 0-000011 ESCR3[R/W] IBSR3[R,R/W] B,H,W*2 -0000000 0000 007CH 0000 0080H 0000 0084H RDR3[R]/TDR3[W] B,H,W*1 -------0 00000000 ISMK3 [R/W] B,H*2 -------ISBA3 [R/W] B,H*2 -------- Multi-function BGR13[R/W] H,W BGR03[R/W] H,W serial interface ch.3 00000000 00000000 ⎯ 0000 0088H 0000 008CH to 0000 00BCH ⎯ Reserved (Continued) 34 DS07-16907-2E MB91610 Series Address Register +0 +1 +2 +3 Block 0000 00C0H 0000 00C4H RDRM0 [R]/ RDRM1 [R]/ RDRM2 [R]/ RDRM3 [R]/ Multi-function TDRM0[W] B,H,W TDRM1[W] B,H,W TDRM2[W] B,H,W TDRM3[W] B,H,W serial interface 00000000 00000000 00000000 00000000 data register (mirror) ⎯ SSEL0123 [R/W] B ------00 ⎯ SCR8 [R/W] IBCR8 [R,R/W] B,H,W*2 0--00000 SMR8 [R/W] B,H,W 000-0000 SSR8 [R,R/W] B,H,W 0-000011 BGR18 [R/W] H,W 00000000 ⎯ FBYTE28 [R/W] B,H,W 00000000 SSR9 [R,R/W] B,H,W 0-000011 FBYTE18 [R/W] B,H,W 00000000 ESCR9 [R/W] IBSR9[R,R/W] B,H,W*2 -0000000 Multi-function serial interface ch. 9 (FIFO) ESCR8 [R/W] IBSR8 [R,R/W] B,H,W*2 -0000000 BGR08 [R,R/W] H,W 00000000 Multi-function serial interface ch. 8 (FIFO) ⎯ Multi-function serial interface serial clock selection Reserved 0000 00C8H 0000 00CCH 0000 00D0H 0000 00D4H RDR8[R]/TDR8[W] B,H,W*1 -------0 00000000 ISMK8 [R/W] B,H*2 -------FCR18 [R/W] B,H,W ---00100 SCR9 [R/W] IBCR9 [R,R/W] B,H,W*2 0--00000 ISBA8 [R/W] B,H*2 -------FCR08 [R,R/W] B,H,W -0000000 SMR9 [R/W] B,H,W 000-0000 0000 00D8H 0000 00DCH 0000 00E0H 0000 00E4H RDR9[R]/TDR9[W] B,H,W*1 -------0 00000000 ISMK9 [R/W] B,H*2 -------FCR19 [R/W] B,H,W ---00100 ISBA9 [R/W] B,H*2 -------FCR09 [R,R/W] B,H,W -0000000 BGR19 [R/W] H,W BGR09 [R/W] H,W 00000000 00000000 ⎯ FBYTE29 [R/W] B,H,W 00000000 FBYTE19 [R/W] B,H,W 00000000 0000 00E8H 0000 00ECH (Continued) DS07-16907-2E 35 MB91610 Series Address Register +0 SCR10 [R/W] IBCR10 [R,R/W] B,H,W*2 0--00000 +1 SMR10 [R/W] B,H,W 000-0000 +2 SSR10 [R,R/W] B,H,W 0-000011 BGR110 [R/W] H,W 00000000 ⎯ FBYTE210 [R/W] B,H,W 00000000 SSR11 [R,R/W] B,H,W 0-000011 BGR111 [R/W] H,W 00000000 ⎯ FBYTE211 [R/W] B,H,W 00000000 FBYTE111 [R/W] B,H,W 00000000 FBYTE110 [R/W] B,H,W 00000000 ESCR11 [R/W] IBSR11 [R,R/W] B,H,W*2 -0000000 BGR011 [R/W] H,W 00000000 +3 ESCR10 [R/W] IBSR10 [R,R/W] B,H,W*2 -0000000 BGR010 [R/W] H,W 00000000 Block 0000 00F0H 0000 00F4H RDR10[R]/TDR10[W] B,H,W*1 -------0 00000000 ISMK10 [R/W] B,H*2 -------FCR110 [R/W] B,H,W ---00100 SCR11 [R/W] IBCR11 [R,R/W] B,H,W*2 0--00000 ISBA10 [R/W] B,H*2 -------FCR010 [R,R/W] B,H,W -0000000 SMR11 [R/W] B,H,W 000-0000 0000 00F8H Multi-function serial interface ch.10 (FIFO) 0000 00FCH 0000 0100H 0000 0104H RDR11[R]/TDR11[W] B,H,W*1 -------0 00000000 ISMK11 [R/W] B,H*2 -------FCR111 [R/W] B,H,W ---00100 EIRR1[R/W] B,H,W 00000000 ISBA11 [R/W] B,H*2 -------FCR011 [R,R/W] B,H,W -0000000 ENIR1[R/W] B,H,W 00000000 ⎯ 0000 0108H Multi-function serial interface ch.11 (FIFO) 0000 010CH 0000 0110H 0000 0114H to 0000 011CH ELVR1[R/W] B,H,W 00000000 00000000 External interrupt 8 to 15 Reserved (Continued) 36 DS07-16907-2E MB91610 Series Address Register +0 ADCR0[R/W] B,H 000-0000 SCCR0[R,R/W] B,H 1000-000 +1 ADSR0[R,R/W] B,H 00---000 SFNS0[R/W] B,H ----0000 ⎯ PCCR0[R,R/W] B,H 1000-000 PCIS0[R/W] B 00000000 PFNS0[R/W] B,H ------00 ⎯ ⎯ ADST00[R/W] B,H ADST10[R/W] B,H 00100000 00100000 ⎯ BT0TMR[R]H 00000000 00000000 ⎯ BT0STC[R/W]B 0000-000 BT0TMCR[R/W] B,H -0000000 00000000 ⎯ BT0PDUT/BT0PRLH/BT0DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ BT1TMR[R]H 00000000 00000000 ⎯ BT1STC[R/W]B 0000-000 BT1TMCR[R/W] B,H -0000000 00000000 ⎯ BT1PDUT/BT1PRLH/BT1DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ ADCT0[R/W] B -----111 +2 ⎯ SCFD0[R] B,H XXXXXXXX XX-XXXXX SCIS00[R/W] B 00000000 PCFD0[R] B,H XXXXXXXX XXXXXXXX CMPD0[R/W] B,H 00000000 CMPCR0[R/W] B,H 00000000 ADSS00[R/W] B 00000000 ⎯ +3 Block 0000 0120H 0000 0124H 0000 0128H 0000 012CH A/D converter 0000 0130H 0000 0134H 0000 0138H 0000 013CH 0000 0140H 0000 0144H Reserved Base timer ch.0 0000 0148H 0000 014CH 0000 0150H 0000 0154H BT0PCSR/BT0PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.1 0000 0158H 0000 015CH BT1PCSR/BT1PRLL[R/W]H XXXXXXXX XXXXXXXX (Continued) DS07-16907-2E 37 MB91610 Series Address 0000 0160H 0000 0164H Register +0 +1 +2 +3 BT2TMR[R]H 00000000 00000000 ⎯ BT2STC[R/W]B 0000-000 BT2TMCR [R/W] B,H -0000000 00000000 ⎯ BT2PDUT/BT2PRLH/BT2DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ BT3TMR[R]H 00000000 00000000 ⎯ BT3STC[R/W]B 0000-000 BT3TMCR[R/W] B,H -0000000 00000000 ⎯ BT3PDUT/BT3PRLH/BT3DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ Block Base timer ch.2 0000 0168H 0000 016CH 0000 0170H 0000 0174H BT2PCSR/BT2PRLL[R/W]H XXXXXXXX XXXXXXXX 0000 0178H BT3PCSR/BT3PRLL[R/W]H XXXXXXXX XXXXXXXX BTSEL0123 [R/W] B 00000000 ⎯ Base timer ch.3 0000 017CH 0000 0180H to 0000 01A8H 0000 01ACH 0000 01B0H 0000 01B4H 0000 01B8H 0000 01BCH 0000 01C0H to 0000 01FCH 0000 0200H 0000 0204H Reserved A/D channel enable IRPR1L [R] B,H 000-000⎯ Interrupt request batch read function ADCHE [R/W] B,H,W -------- -------- -------- 11111111 IRPR0H [R] B 000----⎯ IRPR4H [R] B,H,W 0000---⎯ IRPR1H [R] B,H 000-000- IRPR2L [R] B,H,W IRPR3H [R] B,H,W 000----0000---⎯ ⎯ ⎯ CPCLR0 [R/W] W 11111111 11111111 11111111 11111111 TCDT0 [R/W] W 00000000 00000000 00000000 00000000 IRPR5H [R] B,H,W IRPR5L [R] B,H,W 0000---0000---IRPR7L [R] B,H,W 0000---- Reserved 32-bit Free-run timer ch.0 0000 0208H TCCSH0 [R/W] B,H 0-----00 TCCSL0 [R/W] B,H -1-00000 ⎯ (Continued) 38 DS07-16907-2E MB91610 Series Address 0000 020CH 0000 0210H 0000 0214H 0000 0218H 0000 021CH 0000 0220H to 0000 0230H 0000 0234H 0000 0238H 0000 023CH 0000 0240H Register +0 +1 +2 +3 IPCP0 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP1 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP2 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP3 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ⎯ ICS01 [R/W] B 00000000 ⎯ OCCP0 [R/W] W 00000000 00000000 00000000 00000000 OCCP1 [R/W] W 00000000 00000000 00000000 00000000 OCCP2 [R/W] W 00000000 00000000 00000000 00000000 OCCP3 [R/W] W 00000000 00000000 00000000 00000000 OCSH1 [R/W] B,H,W ---0--00 OCSL0 [R/W] B,H,W 0000--00 ⎯ FCTLR[R/W] H -0--1011 -------⎯ ⎯ ⎯ ⎯ WREN[R/W] B,H 00000000 00000000 ⎯ FSTR[R] B -------1 OCSH3 [R/W] B,H,W ---0--00 OCSL2 [R/W] B,H,W 0000--00 ⎯ ICS23 [R/W] B 00000000 Block 32-bit Input capture ch.0 to ch.3 Reserved 32-bit Output compare ch.0 to ch.3 0000 0244H 0000 0248H to 0000 031CH 0000 0320H 0000 0324H to 0000 0334H 0000 0338H 0000 033CH 0000 0340H to 0000 037CH Reserved Flash memory control Reserved Wild register Reserved (Continued) DS07-16907-2E 39 MB91610 Series Address 0000 0380H 0000 0384H 0000 0388H 0000 038CH 0000 0390H 0000 0394H 0000 0398H 0000 039CH 0000 03A0H 0000 03A4H 0000 03A8H 0000 03ACH 0000 03B0H 0000 03B4H 0000 03B8H 0000 03BCH 0000 03C0H 0000 03C4H 0000 03C8H 0000 03CCH Register +0 +1 +2 +3 WRAR00[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR00[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR01[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR01[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR02[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR02[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR03[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR03[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR04[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR04[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR05[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR05[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR06[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR06[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR07[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR07[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR08[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR08[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR09[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR09[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Block Wild register (Continued) 40 DS07-16907-2E MB91610 Series Address 0000 03D0H 0000 03D4H 0000 03D8H 0000 03DCH 0000 03E0H 0000 03E4H 0000 03E8H 0000 03ECH 0000 03F0H 0000 03F4H 0000 03F8H 0000 03FCH 0000 0400H 0000 0404H 0000 0408H to 0000 0410H 0000 0414H 0000 0418H to 0000 041CH 0000 0420H 0000 0424H 0000 0428H to 0000 043CH Register +0 +1 +2 +3 WRAR10[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR10[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR11[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR11[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR12[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR12[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR13[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR13[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR14[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR14[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR15[R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR15[R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDR0 [R/W] B,H 00000000 ⎯ DDR1 [R/W] B,H 00000000 DDR5 [R/W] B,H 00000000 ⎯ DDRK [R/W] B ------00 ⎯ PCR0 [R/W] B,H 00000000 ⎯ PCR1 [R/W] B,H 00000000 PCR5 [R/W] B 00000000 ⎯ ⎯ ⎯ PCR7[R/W] B,H 00000000 ⎯ DDR2 [R/W] B,H 00000000 ⎯ DDR3 [R/W] B,H 00000000 DDR7[R/W] B,H 00000000 Block Wild register Data direction register Pull-up control register (Continued) DS07-16907-2E 41 MB91610 Series Address Register +0 ICR00 [R,R/W] B,H,W ---11111 ICR04 [R,R/W] B,H,W ---11111 ICR08 [R,R/W] B,H,W ---11111 ICR12 [R,R/W] B,H,W ---11111 ICR16 [R,R/W] B,H,W ---11111 ICR20 [R,R/W] B,H,W ---11111 ICR24 [R,R/W] B,H,W ---11111 ICR28 [R,R/W] B,H,W ---11111 ICR32 [R,R/W] B,H,W ---11111 ICR36 [R,R/W] B,H,W ---11111 ICR40 [R,R/W] B,H,W ---11111 ICR44 [R,R/W] B,H,W ---11111 +1 ICR01 [R,R/W] B,H,W ---11111 ICR05 [R,R/W] B,H,W ---11111 ICR09 [R,R/W] B,H,W ---11111 ICR13 [R,R/W] B,H,W ---11111 ICR17 [R,R/W] B,H,W ---11111 ICR21 [R,R/W] B,H,W ---11111 ICR25 [R,R/W] B,H,W ---11111 ICR29 [R,R/W] B,H,W ---11111 ICR33 [R,R/W] B,H,W ---11111 ICR37 [R,R/W] B,H,W ---11111 ICR41 [R,R/W] B,H,W ---11111 ICR45 [R,R/W] B,H,W ---11111 ⎯ RSTRR [R] B,H,W 11XX---X*3 RSTCR [R/W] B,H,W 000----0 ⎯ STBCR [R/W] B,H,W 0000--11 SLPRR [R/W] B,H,W 00000000 +2 ICR02 [R,R/W] B,H,W ---11111 ICR06 [R,R/W] B,H,W ---11111 ICR10 [R,R/W] B,H,W ---11111 ICR14 [R,R/W] B,H,W ---11111 ICR18 [R,R/W] B,H,W ---11111 ICR22 [R,R/W] B,H,W ---11111 ICR26 [R,R/W] B,H,W ---11111 ICR30 [R,R/W] B,H,W ---11111 ICR34 [R,R/W] B,H,W ---11111 ICR38 [R,R/W] B,H,W ---11111 ICR42 [R,R/W] B,H,W ---11111 ICR46 [R,R/W] B,H,W ---11111 +3 ICR03 [R,R/W] B,H,W ---11111 ICR07 [R,R/W] B,H,W ---11111 ICR11 [R,R/W] B,H,W ---11111 ICR15 [R,R/W] B,H,W ---11111 ICR19 [R,R/W] B,H,W ---11111 ICR23 [R,R/W] B,H,W ---11111 ICR27 [R,R/W] B,H,W ---11111 ICR31 [R,R/W] B,H,W ---11111 ICR35 [R,R/W] B,H,W ---11111 ICR39 [R,R/W] B,H,W ---11111 ICR43 [R,R/W] B,H,W ---11111 ICR47 [R,R/W] B,H,W ---11111 Block 0000 0440H 0000 0444H 0000 0448H 0000 044CH 0000 0450H 0000 0454H Interrupt control 0000 0458H 0000 045CH 0000 0460H 0000 0464H 0000 0468H 0000 046CH 0000 0470H to 0000 047CH 0000 0480H 0000 0484H Reserved Reset control/ Power consumption control (Continued) 42 DS07-16907-2E MB91610 Series Address 0000 0488H 0000 048CH 0000 0490H Register +0 DIVR0 [R/W] B,H 000--011 IORR0 [R/W] B,H,W -0000000 IORR4 [R/W] B,H,W -0000000 +1 ⎯ ⎯ IORR1 [R/W] B,H,W -0000000 IORR5 [R/W] B,H,W -0000000 ⎯ PFR0 [R/W] B,H 00000000 ⎯ PFR1 [R/W] B,H 00000000 PFR5 [R/W] B,H 00000000 ⎯ PFRK [R/W] B,H ----0000 EPFR0 [R/W] B,H EPFR1 [R/W] B,H ---00-00 ---00-00 ⎯ EPFR8 [R/W] B,H EPFR9 [R/W] B,H ----0-0----00-0 ⎯ EPFR16 [R/W] B,H ----0-0EPFR20 [R/W] B,H ---0--0EPFR17 [R/W] B,H ----0-0EPFR21 [R/W] B,H ---0--0⎯ ⎯ EPFR33 [R/W] B,H ---0--0⎯ EPFR34 [R/W] B,H --0----⎯ ⎯ ⎯ EPFR6 [R/W] B,H EPFR7 [R/W] B,H -00-00-0 ----0-0EPFR10 [R/W] B,H ----0--EPFR14 [R/W] B,H ----0-0⎯ EPFR22 [R/W] B,H ---0--0⎯ EPFR15 [R/W] B,H ----0-0EPFR19 [R/W] B,H -------1 EPFR23 [R/W] B,H ---0--0PFR2 [R/W] B,H 00000000 ⎯ PFR3 [R/W] B,H 00000000 PFR7[R/W] B,H 00000000 IORR2 [R/W] B,H,W -0000000 IORR6 [R/W] B,H,W -0000000 IORR3 [R/W] B,H,W -0000000 IORR7 [R/W] B,H,W -0000000 +2 DIVR2 [R/W] B 0011---+3 ⎯ Block Clock division control 0000 0494H 0000 0498H to 0000 049CH 0000 04A0H 0000 04A4H 0000 04A8H to 0000 04B0H 0000 04B4H 0000 04B8H 0000 04BCH 0000 04C0H Peripheral DMA transmission request control Reserved Port function register 0000 04C4H 0000 04C8H Extended port function register 0000 04CCH 0000 04D0H, 0000 04D4H 0000 04D8H 0000 04DCH (Continued) DS07-16907-2E 43 MB91610 Series Address 0000 04E0H to 0000 04ECH 0000 04F0H Register +0 +1 ⎯ ICSEL0[R/W] B,H,W -----000 ICSEL4[R/W] B,H,W ------00 ICSEL8[R/W] B,H,W ------00 ICSEL1[R/W] B,H,W -----000 ⎯ ICSEL6[R/W] B,H,W ------00 ICSEL10[R/W] B,H,W ----0000 ⎯ ⎯ CSELR [R/W] B,H,W 001---00 CMONR [R] B,H,W 001---00 MTMCR [R/W] B,H,W 00001111 CSTBR [R/W] B -0000000 WCCR [R,R/W] B 00--0000 ⎯ ⎯ DCCR0 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR0 [R,R/W] H 0------- -----000 DTCR0 [R/W] H 00000000 00000000 STMCR [R/W] B,H,W 0000-111 ⎯ ⎯ +2 +3 Block Reserved ⎯ ICSEL7[R/W] B,H,W -------0 ICSEL11[R/W] B,H,W ----0000 DMA start request clear select function 0000 04F4H 0000 04F8H 0000 04FCH 0000 0500H to 0000 050CH 0000 0510H 0000 0514H 0000 0518H 0000 051CH 0000 0520H to 0000 0BFCH 0000 0C00H 0000 0C04H 0000 0C08H 0000 0C0CH 0000 0C10H 0000 0C14H 0000 0C18H 0000 0C1CH ⎯ Reserved PLLCR [R/W] B,H --000000 11110000 WCRD [R] B,H --000000 UCCR [R/W] B -----001 WCRL [R/W] B,H --000000 Clock generation/ Main timer/ Sub timer Clock counter USB clock generation Reserved DSAR0 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR0 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR1 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR1 [R,R/W] H 0------- -----000 DTCR1 [R/W] H 00000000 00000000 DMAC DSAR1 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR1 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX (Continued) 44 DS07-16907-2E MB91610 Series Address 0000 0C20H 0000 0C24H 0000 0C28H 0000 0C2CH 0000 0C30H 0000 0C34H 0000 0C38H 0000 0C3CH 0000 0C40H 0000 0C44H 0000 0C48H 0000 0C4CH 0000 0C50H 0000 0C54H 0000 0C58H 0000 0C5CH 0000 0C60H 0000 0C64H 0000 0C68H 0000 0C6CH 0000 0C70H 0000 0C74H +0 Register +1 +2 +3 DCCR2 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR2 [R,R/W] H DTCR2 [R/W] H 0------- -----000 00000000 00000000 DSAR2 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR2 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR3 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR3 [R,R/W] H DTCR3 [R/W] H 0------- -----000 00000000 00000000 DSAR3 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR3 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR4 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR4 [R,R/W] H DTCR4 [R/W] H 0------- -----000 00000000 00000000 DSAR4 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR4 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR5 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR5 [R,R/W] H DTCR5 [R/W] H 0------- -----000 00000000 00000000 DSAR5 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR5 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR6 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR6 [R,R/W] H DTCR6 [R/W] H 0------- -----000 00000000 00000000 DSAR6 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR6 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR7 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR7 [R,R/W] H DTCR7 [R/W] H 0------- -----000 00000000 00000000 Block DMAC (Continued) DS07-16907-2E 45 MB91610 Series Address 0000 0C78H 0000 0C7CH 0000 0C80H to 0000 0DF0H 0000 0DF4H 0000 0DF8H 0000 0DFCH to 0000 0F3CH 0000 0F40H 0000 0F44H Register +0 +1 +2 +3 DSAR7 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR7 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ⎯ ⎯ DMACR [R/W] W 0------- -------- 0------- -------⎯ BT4TMR[R]H 00000000 00000000 ⎯ BT4STC[R/W]B 0000-000 BT4TMCR[R/W] B,H -0000000 00000000 ⎯ BT4PDUT/BT4PRLH/BT4DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ BT5TMR[R]H 00000000 00000000 ⎯ BT5STC[R/W]B 0000-000 BT5TMCR[R/W] B,H -0000000 00000000 ⎯ BT5PDUT/BT5PRLH/BT5DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ BT6TMR[R]H 00000000 00000000 ⎯ BT6STC[R/W]B 0000-000 BT6TMCR[R/W] B,H -0000000 00000000 ⎯ BT6PDUT/BT6PRLH/BT6DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ DILVR [R,R/W] B ---11111 Block DMAC Reserved Base timer ch.4 0000 0F48H 0000 0F4CH 0000 0F50H 0000 0F54H BT4PCSR/BT4PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.5 0000 0F58H 0000 0F5CH 0000 0F60H 0000 0F64H BT5PCSR/BT5PRLL[R/W]H XXXXXXXX XXXXXXXX Base timer ch.6 0000 0F68H 0000 0F6CH BT6PCSR/BT6PRLL[R/W]H XXXXXXXX XXXXXXXX (Continued) 46 DS07-16907-2E MB91610 Series Address 0000 0F70H 0000 0F74H Register +0 +1 +2 +3 BT7TMR[R]H 00000000 00000000 ⎯ BT7STC[R/W]B 0000-000 BT7TMCR[R/W] B,H -0000000 00000000 ⎯ BT7PDUT/BT7PRLH/BT7DTBF [R/W]H XXXXXXXX XXXXXXXX ⎯ Block 0000 0F78H BT7PCSR/BT7PRLL[R/W]H XXXXXXXX XXXXXXXX BTSEL4567 [R/W] B 00000000 ⎯ Base timer ch.7 0000 0F7CH 0000 0F80H to 0000 0FF8H 0000 0FFCH 0000 1000H to 0000 20FCH 0000 2100H 0000 2104H Reserved Base Timer I/O Select Function Reserved ⎯ ⎯ ⎯ ⎯ BTSSSR[W] H XXXXXXXX XXXXXXXX ⎯ HCNT1[R/W] B,H -----001 HERR[R/W] B,H 00000011 HFCOMP[R/W] B,H 00000000 HRTIMER1[R/W] B,H 00000000 HADR[R/W] B,H -0000000 HEOF1[R/W] B,H --000000 HFRAME1[R/W] B,H -----000 ⎯ ⎯ HCNT0[R/W] B,H 00000000 HIRQ[R/W] B,H 0-000000 HSTATE[R,R/W] B,H ---10010 HRTIMER0[R/W] B,H 00000000 HRTIMER2[R/W] B,H ------00 HEOF0[R/W] B,H 00000000 HFRAME0[R/W] B,H 00000000 HTOKEN[R/W] B 00000000 UDCC[R/W] B 1010--00 0000 2108H 0000 210CH ⎯ USB function / HOST 0000 2110H ⎯ ⎯ ⎯ ⎯ ⎯ 0000 2114H 0000 2118H 0000 211CH 0000 2120H (Continued) DS07-16907-2E 47 MB91610 Series Address 0000 2124H 0000 2128H 0000 212CH 0000 2130H 0000 2134H 0000 2138H 0000 213CH Register +0 EP0C[R/W] H ------0- -1000000 EP1C[R/W] H 01100001 00000000 EP2C[R/W] H 0110000- -1000000 EP3C[R/W] H 0110000- -1000000 EP4C[R/W] H 0110000- -1000000 EP5C[R/W] H 0110000- -1000000 TMSP[R] H -----000 00000000 UDCIE[R,R/W] B,H --000000 UDCS[R/W] B,H --000000 +1 +2 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ +3 Block 0000 2140H 0000 2144H 0000 2148H 0000 214CH 0000 2150H 0000 2154H 0000 2158H 0000 215CH 0000 2160H 0000 2164H 0000 2168H 0000 216CH EP0IS[R/W] H 10---1-- -------EP00S[R,R/W] H 100--00- -XXXXXXX EP1S[R,R/W] H 100-000X XXXXXXXX EP2S[R,R/W] H 100-000- -XXXXXXX EP3S[R,R/W] H 100-000- -XXXXXXX EP4S[R,R/W] H 100-000- -XXXXXXX EP5S[R,R/W] H 100-000- -XXXXXXX EP0DTH [R/W] B,H XXXXXXXX EP1DTH [R/W] B,H XXXXXXXX EP2DTH [R/W] B,H XXXXXXXX EP3DTH [R/W] B,H XXXXXXXX EP0DTL [R/W] B,H XXXXXXXX EP1DTL [R/W] B,H XXXXXXXX EP2DTL [R/W] B,H XXXXXXXX EP3DTL [R/W] B,H XXXXXXXX USB function / HOST (Continued) 48 DS07-16907-2E MB91610 Series Address 0000 2170H 0000 2174H 0000 2178H to 0000 217CH 0000 2180H to 0000 21A0H Register +0 EP4DTH [R/W] B,H XXXXXXXX EP5DTH [R/W] B,H XXXXXXXX +1 EP4DTL [R/W] B,H XXXXXXXX EP5DTL [R/W] B,H XXXXXXXX ⎯ +2 ⎯ ⎯ +3 Block USB function / HOST ⎯ DREQSEL [R/W] B,H 00111011 USBSEL [R/W] B,H -------0 ⎯ MOSD_VADR [W] W -------- -------0 ---00000 --000000 MOSD_CDS1 [W] W 00000000 ---00000 00000000 00000000 MOSD_CDS2 [W] W -------- 0000-000 --000000 00000000 MOSD_LDS1 [W] W 0000-000 00000000 ----0000 00000000 MOSD_LDS2 [W] W -------- ---00000 --000000 00000000 MOSD_SCOC [W] W ------00 0000---- ---0---0 XXXX---MOSD_HVDP [W] W -----000 00000000 -----000 00000000 MOSD_TSBC [W] W -------- -------- -------0 00000000 MOSD_GRCC [W] W -------0 00000000 -------0 00000000 MOSD_SBCC [W] W -----000 ------00 --000000 00000000 MOSD_SCBC [W] W -------- --00--00 ---0-000 00000000 MOSD_WPC1 [W] W -----000 00000000 -----000 00000000 Reserved DMA transfer request selector/ USB enable Reserved 0000 21A4H USBEN [R/W] B -------0 ⎯ 0000 21A8H to 0000 3FFCH 0000 4000H 0000 4004H 0000 4008H 0000 400CH 0000 4010H 0000 4014H 0000 4018H 0000 401CH 0000 4020H 0000 4024H 0000 4028H 0000 402CH OSDC (MAIN) (Continued) DS07-16907-2E 49 MB91610 Series Address 0000 4030H 0000 4034H 0000 4038H 0000 403CH 0000 4040H 0000 4044H 0000 4048H 0000 404CH 0000 4050H 0000 4054H 0000 4058H 0000 405CH 0000 4060H 0000 4064H 0000 4068H 0000 406CH 0000 4070H 0000 4074H 0000 4078H 0000 407CH Register +0 +1 +2 +3 MOSD_WPC2 [W] W ----0000 00000000 ----0000 00000000 MOSD_SPC1 [W] W ---0-000 ------00 --000000 00000000 MOSD_SPC2 [W] W ----0000 00000000 -----000 00000000 MOSD_SYNC [W] W -------- --000000 -------- -0-0---MOSD_CBC0 [W] W --000000 00000000 --000000 00000000 MOSD_CBC1 [W] W --000000 00000000 --000000 00000000 MOSD_CBC2 [W] W --000000 00000000 --000000 00000000 MOSD_CBC3 [W] W --000000 00000000 --000000 00000000 MOSD_CBC4 [W] W --000000 00000000 --000000 00000000 MOSD_CBC5 [W] W --000000 00000000 --000000 00000000 MOSD_CBC6 [W] W --000000 00000000 --000000 00000000 MOSD_CBC7 [W] W --000000 00000000 --000000 00000000 MOSD_IOTC [W] W -------0 0----00- -------- -----XXX MOSD_CDP1 [W] W -----000 00000000 -----000 00000000 MOSD_CDP2 [W] W ----0000 00000000 ----0000 00000000 MOSD_INTC [R/W] W -------- -------- -----XXX -----XXX MOSD_SBC0 [W] W 00000000 00000000 00000000 00000000 MOSD_SBC1 [W] W 00000000 00000000 00000000 00000000 MOSD_SBC2 [W] W 00000000 00000000 00000000 00000000 MOSD_SBC3 [W] W 00000000 00000000 00000000 00000000 Block OSDC (MAIN) (Continued) 50 DS07-16907-2E MB91610 Series Address 0000 4080H to 0000 40FCH 0000 4100H 0000 4104H 0000 4108H 0000 410CH 0000 4110H 0000 4114H 0000 4118H 0000 411CH 0000 4120H 0000 4124H 0000 4128H 0000 412CH 0000 4130H 0000 4134H 0000 4138H 0000 413CH to 0000 4168H 0000 416CH 0000 4170H 0000 4174H 0000 4178H 0000 417CH Register +0 +1 ⎯ SOSD_VADR [W] W -------- -------0 ---00000 --000000 SOSD_CDS1 [W] W 00000000 ---00000 00000000 00000000 SOSD_CDS2 [W] W -------- 0000-000 --000000 00000000 SOSD_LDS1 [W] W 0000-000 00000000 ----0000 00000000 SOSD_LDS2 [W] W -------- ---00000 --000000 00000000 SOSD_SCOC [W] W ------00 0000---- ---0---0 XX-X---X SOSD_HVDP [W] W -----000 00000000 -----000 00000000 SOSD_TSBC [W] W -------- -------- -------0 00000000 SOSD_GRCC [W] W -------0 00000000 -------0 00000000 ⎯ SOSD_SCBC [W] W -------- --00--00 ---0-000 00000000 SOSD_WPC1 [W] W -----000 00000000 -----000 00000000 SOSD_WPC2 [W] W ----0000 00000000 ----0000 00000000 SOSD_SPC1 [W] W ---0-000 ------00 --000000 00000000 SOSD_SPC2 [W] W ----0000 00000000 -----000 00000000 ⎯ SOSD_INTC [R/W] W -------- -------- -----XXX -----XXX SOSD_SBC0 [W] W 00000000 00000000 00000000 00000000 SOSD_SBC1 [W] W 00000000 00000000 00000000 00000000 SOSD_SBC2 [W] W 00000000 00000000 00000000 00000000 SOSD_SBC3 [W] W 00000000 00000000 00000000 00000000 +2 +3 Block Reserved OSDC (SUB) (Continued) DS07-16907-2E 51 MB91610 Series (Continued) Address 0000 4180H to 0000 41FCH 0000 4200H to 0000 43FCH 0000 4400H 0000 4404H 0000 4408H to 0000 FFFCH Register +0 +1 ⎯ MOSD_PLn [W] W *n: 0 to 127 00000000 00000000 00000000 00000000 MOSD_OSDC [W] W -------- --XX--XX ------XX ---X---X MOSD_PLLC [W] W --000000 00000000 00000000 ---00000 ⎯ Reserved OSDC (MAIN) +2 +3 Block Reserved *1 : Byte access is available only when accessing the lower 8 bits within 9 bits. *2 : The register of I2C can not be read immediate after reset. *3 : Value just after reset by INIT pin. Do not access the reserved areas. 52 DS07-16907-2E MB91610 Series ■ VECTOR TABLE Interrupt number Interrupt source (Peripheral resource) Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Hexadecimal 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 Interrupt level setting register ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 15 (FH) fixed ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 Address of TBR default Offset Reset System reserved System reserved System reserved System reserved System reserved System reserved System reserved System reserved INTE instruction Instruction break exception Operand break Step trace trap System reserved Undefined instruction exception ⎯ External interrupt request ch.0 to ch.7 External interrupt request ch.8 to ch.15 Reserved Reserved 16-bit reload timer ch.0 to ch.2 Reception interrupt request of UART/CSIO ch.0 Transmission interrupt request of UART/CSIO ch.0 Transmission bus idle interrupt request of UART/CSIO ch.0 Reception interrupt request of UART/CSIO/ I2C ch.1 Transmission interrupt request of UART/ CSIO/ I2C ch.1 Transmission bus idle interrupt request of UART/CSIO ch.1 Status interrupt request of I2C ch.1 3FCH 3F8H 3F4H 3F0H 3ECH 3E8H 3E4H 3E0H 3DCH 3D8H 3D4H 3D0H 3CCH 3C8H 3C4H 3C0H 3BCH 3B8H 3B4H 3B0H 3ACH 3A8H 000F FFFCH 000F FFF8H 000F FFF4H 000F FFF0H 000F FFECH 000F FFE8H 000F FFE4H 000F FFE0H 000F FFDCH 000F FFD8H 000F FFD4H 000F FFD0H 000F FFCCH 000F FFC8H 000F FFC4H 000F FFC0H 000F FFBCH 000F FFB8H 000F FFB4H 000F FFB0H 000F FFACH 000F FFA8H 22 16 ICR06 3A4H 000F FFA4H 23 17 ICR07 3A0H 000F FFA0H 24 18 ICR08 39CH 000F FF9CH 25 19 ICR09 398H 000F FF98H (Continued) DS07-16907-2E 53 MB91610 Series Interrupt number Interrupt source (Peripheral resource) Decimal 26 Hexadecimal 1A Interrupt level setting register Offset Address of TBR default Reception interrupt request of UART/CSIO/I2C ch.2 Transmission interrupt request of UART/CSIO/I2C ch.2 Transmission bus idle interrupt request of UART/ CSIO ch.2 Status interrupt request of I2C ch.2 Reception interrupt request of UART/CSIO/I2C ch.3 Transmission interrupt request of UART/CSIO/I2C ch.3 Transmission bus idle interrupt request of UART/ CSIO ch.3 Status interrupt request of I2C ch.3 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reception interrupt request of UART/CSIO/I C ch.8 to ch.11 Transmission interrupt request of UART/CSIO/I2C ch.8 to ch.11 Transmission bus idle interrupt request of UART/ CSIO ch.8 to ch.11 Transmission FIFO interrupt request UART/CSIO/ I2C ch.8 to ch.11 Status interrupt request of I2C ch.8 to ch.11 HDMI-CEC/Remote control reception Main timer/Sub timer/Watch counter 10-bit A/D converter • Scan conversion interrupt request • Priority conversion interrupt request • FIFO overrun interrupt request • Conversion result compare interrupt request 2 ICR10 394H 000F FF94H 27 1B ICR11 390H 000F FF90H 28 29 1C 1D ICR12 ICR13 38CH 388H 000F FF8CH 000F FF88H 30 1E ICR14 384H 000F FF84H 31 32 33 34 35 36 37 38 1F 20 21 22 23 24 25 26 ICR15 ICR16 ICR17 ICR18 ICR19 ICR20 ICR21 ICR22 380H 37CH 378H 374H 370H 36CH 368H 364H 000F FF80H 000F FF7CH 000F FF78H 000F FF74H 000F FF70H 000F FF6CH 000F FF68H 000F FF64H 39 27 ICR23 360H 000F FF60H 40 41 28 29 ICR24 ICR25 35CH 358H 000F FF5CH 000F FF58H 42 2A ICR26 354H 000F FF54H (Continued) 54 DS07-16907-2E MB91610 Series (Continued) Interrupt number Interrupt source (Peripheral resource) Decimal 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 to 255 Hexadecimal 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 to FF Interrupt level setting register ICR27 ICR28 ICR29 ICR30 ICR31 ICR32 ICR33 ICR34 ICR35 ICR36 ICR37 ICR38 ICR39 ICR40 ICR41 ICR42 ICR43 ICR44 ICR45 ICR46 ICR47 ⎯ ⎯ ⎯ Address of TBR default Offset 32-bit free run timer ch.0 32-bit input capture ch.0 to ch.3 32-bit output compare ch.0 to ch.3 Base timer ch.0 Base timer ch.1 Base timer ch.2 Base timer ch.3 Base timer ch.4, ch.5 Base timer ch.6, ch.7 Reserved OSDC (MAIN) USB function (DRQ of End Point 1 to 5) USB function (DRQI of End Point 0, DRQO and each status/ USB HOST (each status) OSDC (SUB) DMA controller (DMAC) ch.0 DMA controller (DMAC) ch.1 DMA controller (DMAC) ch.2 DMA controller (DMAC) ch.3 DMA controller (DMAC) ch.4 to ch.7 System reserved Delay interrupt System reserved (Used by REALOS) System reserved (Used by REALOS) Used by INT instruction 350H 34CH 348H 344H 340H 33CH 338H 334H 330H 32CH 328H 324H 320H 31CH 318H 314H 310H 30CH 308H 304H 300H 2FCH 2F8H 2F4H to 000H 000F FF50H 000F FF4CH 000F FF48H 000F FF44H 000F FF40H 000F FF3CH 000F FF38H 000F FF34H 000F FF30H 000F FF2CH 000F FF28H 000F FF24H 000F FF20H 000F FF1CH 000F FF18H 000F FF14H 000F FF10H 000F FF0CH 000F FF08H 000F FF04H 000F FF00H 000F FEFCH 000F FEF8H 000F FEF4H to 000F FC00H DS07-16907-2E 55 MB91610 Series * : USB interrupt source Number Decimal 54 Hexadecimal 36 USB interrupt source USB function (DRQ of End Point 1 to 5) USB function (DRQI, DRQO of End Point 0 and each status) USB HOST ( Each status) Details DRQ (End Point1 to 5) DRQI, DRQO, SPK, SUSP, SOF, BRST, CONF, WKUP DIRQ, URIRQ, RWKIRQ, CNNIRQ, SOFIRQ, CMPIRQ 55 37 56 DS07-16907-2E MB91610 Series ■ PIN STATUS IN EACH CPU STATE • When INIT = “L” This is the period when the INIT pin is the “L” level. • When INIT = “H” The status immediately after the INIT pin changes from the “L” level to the “H” level. • SLVL1 This bit is a standby level setting bit in the standby mode control register (STBCR) . • Input enabled Indicates that the input function can be used. • Input disabled Indicates that the input function cannot be used. • Output Hi-Z Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state. • Maintain previous state Maintains the state that was being output immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. • Internal input fixed at “0” The input gate connected to the pin is disconnected from the external input and internally connected to “0”. • Input enabled when interrupt function selected and enabled Inputs are allowed only when the pin is configured as an external interrupt request input pin and the external interrupt request is enabled. DS07-16907-2E 57 MB91610 Series • List of pin status Pin name INIT Function INIT During initialization INIT = “L” ⎯ Input enabled Input enabled INIT = “H” ⎯ Input enabled Input enabled Sleep Mode Standby Mode SLVL1 = 0 Input enabled Hi-Z/ Input enabled "H" output/ Input enabled Input enabled Hi-Z/ Input enabled "H" output/ Input enabled SLVL1 = 1 Input enabled Hi-Z/ Input enabled "H" output/ Input enabled Hi-Z/ Input enabled "H" output/ Input enabled X0 X0 X1 X1 X0A (When INIT input, see PK1. When port selected, input disabled) X1A (When INIT input, see PK0. When port selected, input disabled) MD0 MD1 P00/TIOA0/SOUT0_1/IN0 P01/TIOB0/SIN0_1/IN1 P02/TIOA1/SCK0_1/IN2 P03/TIOB1/IN3 P04/TIOA2/SOUT1 P05/TIOB2/SIN1 P06/TIOA3/SCK1 P07/TIOB3 P10/TIOA4/SOUT2/INT0 P11/TIOB4/SIN2/INT1 P12/TIOA5/SCK2/INT2 P13/TIOB5/INT3 P14/TIOA6/SOUT3/INT4 P15/TIOB6/SIN3/INT5 P16/TIOA7/SCK3/INT6 P17/TIOB7/INT7 X0A Input disabled Input disabled X1A Input disabled Input enabled Input enabled Input disabled Input enabled Input enabled MD0 MD1 P00 P01 P02 P03 P04 P05 P06 P07 P10 P11 P12 P13 P14 P15 P16 P17 Input enabled Input enabled Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Input enabled when interrupt function selected and enabled (Continued) 58 DS07-16907-2E MB91610 Series Pin name P20 P21 P22 P23 P24 P25 P26 P27 P30 P31 P32 P33 P34 P35 P36 P37 P50 P51 P52 P53 P54 P55 P56 P57 P70 P71 P72 P73 P74 P75 P76 P77 PK0 PK1 Function P20/SOUT8 P21/SIN8 P22/SCK8 P23/RCIN_1 P24/SOUT9/OUT0 P25/SIN9/OUT1 P26/SCK9/OUT2 P27/OUT3 P30/SOUT10/INT8 P31/SIN10/INT9 P32/SCK10/INT10 P33/INT11 P34/SOUT11/INT12 P35/SIN11/INT13 P36/SCK11/INT14 P37/INT15 P50 P51 P52 P53 P54/RCIN P55/ADTRG P56/FRCK P57 P70/AN0/OUT0_1 P71/AN1/OUT1_1 P72/AN2/TMO0/OUT2_1 P73/AN3/TMO1/OUT3_1 P74/AN4/TMO2 P75/AN5/SOUT0/TMI0 P76/AN6/SIN0/TMI1 P77/AN7/SCK0/TMI2 PK0 PK1 During initialization INIT = “L” INIT = “H” Sleep Mode Standby Mode SLVL1 = 0 SLVL1 = 1 Output Hi-Z Output Hi-Z Input enabled Maintain previous state Output Hi-Z/ Maintain preInternal input vious state fixed at "0" Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Input enabled when interrupt function selected and enabled Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled* Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" Output Hi-Z Output Hi-Z Input enabled Maintain previous state Maintain previous state Output Hi-Z/ Internal input fixed at "0" (Continued) * : Analog input has a priority (digital input is disconnected) DS07-16907-2E 59 MB91610 Series (Continued) Pin name UDP UDM DCKI DCKO VSYNC HSYNC R4 to R0 G5 to G0 B4 to B0 VOA2 to VOA0 VOB ROUT GOUT BOUT HWDE Function UDP(USB) UDM(USB) DCKI DCKO VSYNC HSYNC R4 to R0 G5 to G0 B4 to B0 Output Hi-Z During initialization INIT = “L” INIT = “H” Output Hi-Z Input enabled Input enabled L output/ DCK output Input enabled L output/ R output L output/ G output L output/ B output L output/ VOA output L output/ VOB output Sleep Mode Maintain previous state/ Input enabled Input enabled L output/ DCK output Input enabled L output/ R output L output/ G output L output/ B output L output/ VOA output L output/ VOB output Standby Mode SLVL1 = 0 Maintain previous state Input state SLVL1 = 1 Output Hi-Z/ Internal input fixed at "0" Input state Input state L output Input state L output L output (OSDC stop) (OSDC stop) Input state Input state VOA2 to VOA0 L output VOB ROUT GOUT BOUT HWDE Input state L output L output (OSDC stop) (OSDC stop) L output/ L output/ ROUT output ROUT output L output/ L output/ GOUT output GOUT output L output/ L output/ BOUT output BOUT output Input enabled Input enabled Input state Input state 60 DS07-16907-2E MB91610 Series • List of pin status (serial write mode) Pin name Function During initialization INIT = “L” During asynchronous write operation ⎯ Input enabled Input enabled Input disabled During synchronous write operation ⎯ Input enabled Input enabled Input disabled INIT = “H” INIT X0 X1 X0A INIT X0 X1 X0A (When INIT input, see PK1. When port selected, input disabled) X1A (When INIT input, see PK0. When port selected, input disabled) MD0 MD1 P00/TIOA0/SOUT0_1/IN0 P01/TIOB0/SIN0_1/IN1 P02/TIOA1/SCK0_1/IN2 P03/TIOB1/IN3 P04/TIOA2/SOUT1 P05/TIOB2/SIN1 P06/TIOA3/SCK1 P07/TIOB3 P10/TIOA4/SOUT2/INT0 P11/TIOB4/SIN2/INT1 P12/TIOA5/SCK2/INT2 P13/TIOB5/INT3 P14/TIOA6/SOUT3/INT4 P15/TIOB6/SIN3/INT5 P16/TIOA7/SCK3/INT6 P17/TIOB7/INT7 P20/SOUT8 P21/SIN8 P22/SCK8 P23/RCIN_1 P24/SOUT9/OUT0 P25/SIN9/OUT1 P26/SCK9/OUT2 P27/OUT3 ⎯ Input enabled Input enabled Input disabled X1A MD0 MD1 P00 P01 P02 P03 P04 P05 P06 P07 P10 P11 P12 P13 P14 P15 P16 P17 P20 P21 P22 P23 P24 P25 P26 P27 Input disabled Input enabled Input enabled Input disabled Input enabled Input enabled Input disabled Input enabled Input enabled Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled (Continued) DS07-16907-2E 61 MB91610 Series Pin name Function During initialization INIT = “L” During asynchronous write operation During synchronous write operation INIT = “H” P30 P31 P32 P33 P34 P35 P36 P37 P50 P51 P52 P53 P54 P55 P56 P57 P70 P71 P72 P73 P74 P75 P76 P77 PK0 PK1 UDP UDM DCKI DCKO VSYNC HSYNC P30/SOUT10/INT8 P31/SIN10/INT9 P32/SCK10/INT10 P33/INT11 P34/SOUT11/INT12 P35/SIN11/INT13 P36/SCK11/INT14 P37/INT15 P50 P51 P52 P53 P54/RCIN P55/ADTRG P56/FRCK P57 P70/AN0/OUT0_1 P71/AN1/OUT1_1 P72/AN2/TMO0/OUT2_1 P73/AN3/TMO1/OUT3_1 P74/AN4/TMO2 P75/AN5/SOUT0/TMI0 P76/AN6/SIN0/TMI1 P77/AN7/SCK0/TMI2 PK0 PK1 UDP (USB) UDM (USB) DCKI DCKO VSYNC HSYNC Output Hi-Z Output Hi-Z Input state L output Input state Output Hi-Z Output Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Input enabled Input enabled L output Input enabled Output Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Input enabled Input enabled L output Input enabled (Continued) Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled Output Hi-Z Output Hi-Z Input enabled Output Hi-Z Input enabled 62 DS07-16907-2E MB91610 Series (Continued) Pin name Function During initialization INIT = “L” During asynchronous write operation During synchronous write operation INIT = “H” R4 to R0 G5 to G0 B4 to B0 VOA2 to VOA0 VOB ROUT GOUT BOUT HWDE R4 to R0 G5 to G0 B4 to B0 VOA2 to VOA0 VOB ROUT GOUT BOUT HWDE Input state Input enabled Input enabled L output L output L output L output L output L output DS07-16907-2E 63 MB91610 Series ■ ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Parameter Power supply voltage*1, *2 Analog power supply voltage* , * Analog reference voltage*1, *3 1 3 Symbol VCC AVCC AVRH Rating Min Vss − 0.3 Vss − 0.3 Vss − 0.3 Vss − 0.3 Max Vss + 4.0 Vss + 4.0 Vss + 4.0 Vcc + 0.3 ( ≤ 4.0) Vss + 6.0 Vss + 4.5 Vss + 4.0 Vcc + 0.3 Vss + 4.5 +4 40 10 43 4 15 100 50 − 10 − 43 −4 − 15 − 100 − 50 850 600 + 85 + 125 Unit V V V V V V V V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA mW mW °C °C *7 Remarks Input voltage* 1 VI Vss − 0.3 Vss − 0.5 Vss − 0.3 Vss − 0.3 Vss − 0.5 −4 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ − 40 − 55 5 V tolerant USB I/O Analog pin input voltage* Output voltage*1 Maximum clamp current 1 VIA VO ICLAMP Σ|ICLAMP| IOL IOLAV ΣIOL ΣIOLAV IOH IOHAV ΣIOH ΣIOHAV PD Ta TSTG USB I/O *8 *8 USB I/O USB I/O Total maximum clamp current “L” level maximum output current*4 “L” level average output current*5 “L” level total maximum output current “L” level total average output current*6 “H” level maximum output current*4 “H” level average output current*5 “H” level total maximum output current*6 “H” level total average output current Power consumption (Flash product) Power consumption (MASK product) Operating temperature Storage temperature *2 : VCC must not drop below VSS − 0.3 V. USB I/O USB I/O *1 : The parameter is based on VSS = AVSS = 0.0 V. *3 : Be careful not to exceed VCC + 0.3 V, for example, when the power is turned on. *4 : The maximum output current is the peak value for a single pin. *5 : The average output is the average current for a single pin over a period of 100 ms. (Continued) 64 DS07-16907-2E MB91610 Series (Continued) *6 : The total average output current is the average current for all pins over a period of 100 ms. *7 : If the input current or the maximum input current are limited by some means with external components, the ICLAMP rating supersedes the VI rating. *8 : • Corresponding pins:P14 to P17,P20 to P27,P30 to P37,P50 to P57 • Use within recommended operating conditions. • Use at DC voltage (current). • The +B signal should always be applied by connecting a limiting resistor between the +B signal and the microcontroller. • The value of the limiting resistor should be set so that the current input to the microcontroller pin does not exceed rated values at any time regardless of instantaneously or constantly when the +B signal is input. • Note that when the microcontroller drive current is low, such as in the low power consumption modes, the +B input potential can increase the potential at the VCC pin via a protective diode, possibly affecting other devices. • Note that if the +B signal is input when the microcontroller is off (not fixed at 0V), since the power is supplied through the pin, the microcontroller may operate incompletely. • Do not leave +B input pins open. • Sample recommended circuit •Input/output equivalent circuit Protective diode Limiting ICLAMP resistor +B input (0 V to 16 V) R Vcc P-ch N-ch WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS07-16907-2E 65 MB91610 Series 2. Recommended Operating Conditions (VSS = AVSS = 0.0 V) Parameter Power supply voltage Analog power supply voltage Analog reference voltage Smoothing capacitor Operating temperature Symbol VCC AVCC AVRH Cs Ta Value Min 3.0 3.0 AVSS ⎯ − 40 Typ ⎯ ⎯ ⎯ 4.7 ⎯ Max 3.6 3.6 AVCC ⎯ + 85 Unit V V V μF °C AVCC ≤ VCC Remarks • C Pin Connection Diagram C This series CS WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 66 DS07-16907-2E MB91610 Series 3. DC Characteristics (1) DC Characteristics (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions Value Min ⎯ ICC ⎯ 55 75 Typ Max Unit Remarks 45 60 OSDC stopped Not using USB mA CPU : 33 MHz, Peripheral : 33 MHz OSDC stopped Using USB mA CPU : 32 MHz, Peripheral : 32 MHz Dot clock 50 MHz (PLL) Dot clock PLL is used Analog RGB DAC is mA used Digital RGB is not used CPU : 33 MHz, Peripheral : 33 MHz Dot clock 75 MHz (PLL) Dot clock PLL is used mA Analog RGB DAC is not used Digital RGB is used CPU : 33 MHz, Peripheral:33 MHz OSDC stopped mA Not using USB Peripheral : 33 MHz OSDC stopped UsmA ing USB Peripheral : 32 MHz μA μA μA (Continued) CPU : 32 kHz Peripheral : 32 kHz Normal operation ⎯ 100 130 Power supply current (Flash product) ICCO VCC ⎯ 105 150 ⎯ ICCS SLEEP mode ⎯ ICCL ICCT ICCH * : Ta = + 25 °C and VCC = 3.3 V Sub operation* Watch mode* STOP mode* ⎯ ⎯ ⎯ 15 25 25 40 150 120 65 550 450 320 DS07-16907-2E 67 MB91610 Series (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions Value Min ⎯ ICC ⎯ 50 60 Typ Max Unit Remarks 35 45 OSDC stopped Not using USB mA CPU : 33 MHz, Peripheral : 33 MHz OSDC stopped Using USB mA CPU : 32 MHz, Peripheral : 32 MHz Dot clock 50 MHz (PLL) Dot clock PLL is used Analog RGB DAC is mA used Digital RGB is not used CPU : 33 MHz, Peripheral : 33 MHz Dot clock 75 MHz (PLL) Dot clock PLL is used mA Analog RGB DAC is not used Digital RGB is used CPU : 33 MHz, Peripheral:33 MHz OSDC stopped mA Not using USB Peripheral : 33 MHz OSDC stopped UsmA ing USB Peripheral : 32 MHz μA μA μA (Continued) CPU : 32 kHz Peripheral : 32 kHz Normal operation ⎯ 80 100 Power supply current (MASK product) ICCO VCC ⎯ 80 110 ⎯ ICCS SLEEP mode ⎯ ICCL ICCT ICCH * : Ta = + 25 °C and VCC = 3.3 V Sub operation* Watch mode* STOP mode* ⎯ ⎯ ⎯ 15 25 25 40 150 120 65 550 450 320 68 DS07-16907-2E MB91610 Series (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name P00 to P07, P10 to P17, P50 to P57, P70 to P77, PK0, PK1, DCKI, VSYNC, HSYNC, INIT, MD0, MD1 P20 to P27, P30 to P37 P00 to P07, P10 to P17, P20 to P27, P30 to P37, P50 to P57, P70 to P77, PK0, PK1, DCKI, VSYNC, HSYNC, INIT, MD0, MD1 P00 to P07, P10 to P17, P20 to P27, P30 to P37, P50 to P57, P70 to P77, PK0, PK1, R0 to R4, G0 to G5, B0 to B4, VOA0 to VOA2, VOB, DCKO ⎯ Pull-up pin IBREAK ICD0 to ICD3 Other than VCC, VSS, AVCC, AVSS, AVRH Conditions Value Min Typ Max Unit Remarks “H” level input voltage (hysteresis input) ⎯ VCC × 0.8 ⎯ VCC + 0.3 V VIHS ⎯ VCC × 0.8 ⎯ VSS + 5.5 V 5 V tolerant “L”level input voltage (hysteresis input) VILS ⎯ Vss − 0.3 ⎯ VCC × 0.2 V “H” level output voltage VOH VCC = 3.0 V VCC − 0.5 IOH = − 4 mA ⎯ VCC V “L” level output voltage VOL VCC = 3.0 V IOL = 4 mA VSS ⎯ 0.4 V Input leak current Pull-up resistance value Pull-down resistance value IIL RPU RPD ⎯ ⎯ ⎯ −5 − 10 16.6 16.6 ⎯ ⎯ 33 33 +5 + 10 66 66 μA μA kΩ kΩ Digital pin Analog pin MB91F610A only Input capacitance CIN ⎯ ⎯ 10 15 pF (Continued) DS07-16907-2E 69 MB91610 Series (Continued) Symbol VREF (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Pin name VREF Conditions ⎯ ⎯ Value Min 1.05 Typ 1.10 Max 1.15 ⎯ Unit V kΩ Remarks Parameter Analog RGB reference voltage Analog RGB reference resistance Analog RGB external load resistance RREF VRO-VSSD 2.4 2.7 RL ROUT, GOUT, BOUT ⎯ ⎯ 150 160 Ω 70 DS07-16907-2E MB91610 Series 4. AC Characteristics (1) Main Clock (MCLK) Input Standard (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions ⎯ Input frequency FCH ⎯ Input clock cycle Input clock pulse width Input clock rise time and fall time Internal operating clock frequency tCYLH ⎯ tCF tCR FCS FCC FCP tCYCS Internal operating clock cycle time tCYCC tCYCP ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ X0, X1 ⎯ PWH/tCYLH PWL/tCYLH ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4 20.83 45 ⎯ ⎯ ⎯ ⎯ 30 30 30 48 250 55 5 33 33 33 ⎯ ⎯ ⎯ MHz ns % ns Value Min 4 Max 48 Unit MHz Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock When using external clock MHz Source clock MHz CPU clock MHz Peripheral bus clock ns ns ns Source clock CPU clock Peripheral bus clock DS07-16907-2E 71 MB91610 Series • Operating guaranteed range (Not using USB) • When the main clock is selected (DIVB=000) Power supply voltage Vcc (V) 3.6 3.3 3.0 2.7 2.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 Internal operation clock Fcc (MHz) • When the PLL clock is selected (DIVB=000) Power supply voltage Vcc (V) 3.6 3.3 3.0 2.7 2.4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Internal operation clock Fcc (MHz) • When the sub clock is selected Power supply voltage Vcc (V) 3.6 3.3 3.0 2.7 2.4 0 4 8 12 16 20 24 28 32 Internal operation clock Fcc (kHz) 72 DS07-16907-2E MB91610 Series • Operating guaranteed range (at using USB) • When the main clock is selected (DIVB=000*1) 3.6 Power supply voltage Vcc (V) 3.3 3.0 2.7 2.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 Internal operation clock Fcc (MHz) • When the PLL clock is selected (DIVB=000*1, ODS=10*3, PMS=0111*4, PDS=0000*2, X0=4 MHz or DIVB=000*1, ODS=10*3, PMS=0001*4, PDS=0010*2, X0=48 MHz) 3.6 Power supply voltage Vcc (V) 3.3 3.0 2.7 2.4 0 4 8 12 16 20 24 28 32 Internal operation clock Fcc (MHz) *1 : The values other than DIVB = 000 are omitted. *2 : The values other than PDS = 0000, 0001,0010 are omitted. *3 : The values other than ODS = 10 are omitted. *4 : The values other than PMS = 0001,0111 are omitted. Note: DIVB ODS PDS PMS : Base clock division configuration bit : PLL macro oscillation clock division rate select bit : PLL input clock division select bit : PLL clock multiple rate select bit DS07-16907-2E 73 MB91610 Series (2) Sub Clock (SBCLK) Input Standard (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name Conditions ⎯ Input frequency FCL ⎯ Input clock cycle Input clock pulse width Input clock rise time and fall time tCYLL ⎯ tCF tCR X0A, X1A ⎯ PWH / tCYLL PWL / tCYLL ⎯ ⎯ ⎯ 45 ⎯ 32.768 30.518 ⎯ ⎯ ⎯ ⎯ 55 200 kHz μs % ns Value Min ⎯ Typ 32.768 Max ⎯ Unit kHz Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock When using external clock tCYLH, tCYLL 0.8 × VCC 0.8 × VCC 0.2 × VCC 0.8 × VCC 0.2 × VCC X0 X0A PWH tCF PWL tCR 74 DS07-16907-2E MB91610 Series (3) Conditions of PLL (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter PLL oscillation stabilization wait time (LOCK UP time) PLL oscillation stabilization wait time for OSDC (LOCK UP time) PLL input clock frequency PLL multiple rate PLL macro oscillation clock frequency Symbol tLOCK tL fPLLI ⎯ fPLLO Value Min 600 10 4 4 96 Typ ⎯ ⎯ ⎯ ⎯ ⎯ Max ⎯ ⎯ 24 24 100 Unit μs ms MHz multiplied ODS × PMS by MHz Remarks Time from when the PLL starts operating until the oscillation stabilizes (4) Regulator Voltage Stabilization Wait Time (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Regulator voltage stabilization wait time Symbol tREG Value Min 50 Max ⎯ Unit μs Remarks Time taken for the regulator voltage to stabilize Note : This is the time from when the external power supply stabilizes (after reaching 3.0 V). (5) Reset Input Standards (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Reset input time (At power-on, main oscillation stop mode) Reset input time (At other times) Reset input rise time and fall time tINITXF tINITXR Symbol Pin name Conditions Value Min Oscillation time of oscillator + 10 tCYLH INIT ⎯ 10 tCYLH ⎯ Max ⎯ ⎯ 10 Unit Remarks tINITX ns ns ms * * : After the supply voltage has stabilized, it takes a further 50 μs until the internal supply stabilizes. Hold the input to the INIT pin during that period. • At power-on • When in stop mode • When in sub mode and sub watch mode when the main oscillation is stopped. tINITX VIHS INIT tINITXF VIHS VILS VILS tINITXR DS07-16907-2E 75 MB91610 Series (6) Base Timer Input Timing • Timer input timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Pin name TIOAn/TIOBn (When used as ECK, TIN) Conditions ⎯ Value Min 2 tCYCP Max ⎯ Unit ns Parameter Input pulse width Symbol tTIWH tTIWL tTIWH ECK TIN VIHS VIHS VILS tTIWL VILS • Trigger Input Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Symbol tTRGH tTRGL Pin name TIOAn/TIOBn (When used as TGIN) Conditions ⎯ Value Min 2 tCYCP Max ⎯ Unit ns Parameter Input pulse width tTRGH VIHS TGIN VIHS tTRGL VILS VILS 76 DS07-16907-2E MB91610 Series (7) Synchronous serial (CSIO) timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) • Synchronous serial (SPI = 0, SCINV = 0) Value Parameter Symbol Pin name Conditions Unit Min Max Serial clock cycle time SCK ↓ → SOUT delay time SIN → SCK ↑ setup time SCK ↑ → SIN hold time Serial clock “L” pulse width Serial clock “H” pulse width SCK ↓ → SOUT delay time SIN → SCK ↑ setup time SCK ↑ → SIN hold time SCK fall time SCK rise time tSCYC tSLOVI tIVSHI tSHIXI tSLSH tSHSL tSLOVE tIVSHE tSHIXE tF tR SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation 4tCYCP − 30 Internal shift clock operation 57 0 2tCYCP − 10 tCYCP + 10 ⎯ 25 20 ⎯ ⎯ ⎯ + 30 ⎯ ⎯ ⎯ ⎯ 48 ⎯ ⎯ 5 5 ns ns ns ns ns ns ns ns ns ns ns Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. tSCYC VOH SCK VOL tSLOVI VOH SOUT VOL tIVSHI VIHS SIN VILS VILS tSHIXI VIHS VOL MS bit = 0 DS07-16907-2E 77 MB91610 Series tSLSH VIHS SCK tF VILS tSLOVE VOH SOUT VOL tIVSHE VIHS SIN VILS VILS tSHIXE VIHS VILS VIHS tR tSHSL VIHS MS bit = 1 • Synchronous serial (SPI = 0, SCINV = 1) Parameter Serial clock cycle time SCK ↑→ SOUT delay time SIN → SCK ↓ setup time SCK ↓ → SIN hold time Serial clock “L” pulse width Serial clock “H” pulse width SCK ↑ → SOUT delay time SIN → SCK ↓ setup time SCK ↓ → SIN hold time SCK fall time SCK rise time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSLSH tSHSL tSHOVE tIVSLE tSLIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Conditions Value Min 4tCYCP − 30 Internal shift clock operation 57 0 2tCYCP − 10 tCYCP + 10 ⎯ 25 20 ⎯ ⎯ Max ⎯ + 30 ⎯ ⎯ ⎯ ⎯ 48 ⎯ ⎯ 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. 78 DS07-16907-2E MB91610 Series tSCYC VOH SCK tSHOVI VOH SOUT VOL tIVSLI VIHS SIN VILS tSLIXI VIHS VILS VOL VOH MS bit = 0 tSHSL tSLSH VIHS SCK VILS VIHS VILS tF VILS tR SOUT tSHOVE VOH VOL tIVSLE tSLIXE VIHS VILS SIN VIHS VILS MS bit = 1 DS07-16907-2E 79 MB91610 Series • Synchronous serial (SPI = 1,SCINV = 0) Parameter Serial clock cycle time SCK ↑→ SOUT delay time SIN → SCK ↓ setup time SCK ↓ → SIN hold time SOUT → SCK ↓ delay time Serial clock “L” pulse width Serial clock “H” pulse width SCK ↑ → SOUT delay time SIN → SCK ↓ setup time SCK ↓ → SIN hold time SCK fall time SCK rise time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSOVLI tSLSH tSHSL tSHOVE tIVSLE tSLIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SOUTn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Internal shift clock operation Conditions Value Min 4tCYCP − 30 57 0 2tCYCP − 30 2tCYCP − 10 tCYCP + 10 ⎯ 25 20 ⎯ ⎯ Max ⎯ + 30 ⎯ ⎯ ⎯ ⎯ ⎯ 48 ⎯ ⎯ 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns ns Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. tSCYC VOH SCK tSOVLI SOUT VOH VOL tIVSLI SIN VIHS VILS tSLIXI VIHS VILS VOH VOL VOL tSHOVI VOL MS bit = 0 80 DS07-16907-2E MB91610 Series tSLSH VIHS VILS * SOUT VOH VOL tIVSLE SIN VIHS VILS tSLIXE VIHS VILS tF VILS tR VIHS tSHSL VIHS VILS tSHOVE VOH VOL SCK MS bit = 1 * : Changes when writing to TDR register • Synchronous serial (SPI = 1, SCINV = 1) Parameter Serial clock cycle time SCK ↓ → SOUT delay time SIN → SCK ↑ setup time SCK ↑ → SIN hold time SOUT → SCK ↑ delay time Serial clock “L” pulse width Serial clock “H” pulse width SCK ↓ → SOUT delay time SIN → SCK ↑ setup time SCK ↑ → SIN hold time SCK fall time SCK rise time Symbol tSCYC tSLOVI tIVSHI tSHIXI tSOVHI tSLSH tSHSL tSLOVE tIVSHE tSHIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SOUTn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Internal shift clock operation Conditions Value Min 4tCYCP − 30 57 0 2tCYCP − 30 2tCYCP − 10 tCYCP + 10 ⎯ 25 20 ⎯ ⎯ Max ⎯ + 30 ⎯ ⎯ ⎯ ⎯ ⎯ 48 ⎯ ⎯ 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns ns Notes: • The above standards apply to CLK synchronous mode. • tCYCP indicates the peripheral clock cycle time. • When the external load capacitance C = 50 pF. DS07-16907-2E 81 MB91610 Series tSCYC VOH VOL tSOVHI SOUT VOH VOL tIVSHI SIN VIHS VILS tSHIXI VIHS VILS tSLOVI VOH VOL VOH SCK MS bit = 0 tR SCK VILS VOH VOL tIVSHE SIN VIHS VILS VIHS tSHSL VIHS VILS tSLOVE tSLSH tF VIHS VILS SOUT VOH VOL tSHIXE VIHS VILS MS bit = 1 • External clock (EXT = 1) : asynchronous only Parameter Serial clock “L” pulse width Serial clock “H” pulse width SCK fall time SCK rise time Symbol tSLSH tSHSL tF tR CL = 50 pF Conditions Value Min tCYCP + 10 tCYCP + 10 ⎯ ⎯ Max ⎯ ⎯ 5 5 Unit ns ns ns ns tR SCK VILS VIHS tSHSL VIHS VILS tSLSH tF VIHS VILS 82 DS07-16907-2E MB91610 Series (8) Free-run Timer Clock, Reload Timer Event Input,Input Capture Input, Interrupt Input Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Symbol Pin name FRCK TMIn INn INTn Conditions ⎯ ⎯ ⎯ Value Min 2 tCYCP 3 tCYCP 1.0 Max ⎯ ⎯ ⎯ Unit Remarks ns ns μs *1 *1 *2 Input pulse width tTIWH tTIWL *1 : tCYCP indicates peripheral clock cycle time, except when in stop mode, in main timer mode and in watch mode. *2 : When in stop mode, in main timer mode, or in watch mode. FRCK TMIn INn INTn tTIWH VIHS tTIWL VIHS VILS VILS (9) A/D Converter Trigger Input Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter A/D converter trigger input Symbol tTADTGL tTADTGH Pin name ADTRG Conditions ⎯ Value Min 2 tCYCP Max ⎯ Unit ns * Remarks * : tCYCP indicates peripheral clock cycle time. tTADTGL ADTRG tTADTGH VIHS VIHS VILS VILS DS07-16907-2E 83 MB91610 Series (10) I2C Timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter SCL clock frequency “(Repeated) START condition” hold time SDA ↓ → SCL ↓ SCL clock “L” width SCL clock “H” width “Repeated START condition” setup time SCL ↑→ SDA ↓ Data hold time SCL ↓ → SDA ↓ ↑ Symbol Pin name fSCL SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) SCKn (SCLn) SCKn (SCLn) SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) ⎯ ⎯ ⎯ CL = 50 pF, R= (Vp/IOL) *1 Conditions Typical mode Min 0 Max 100 High-speed mode*3 Min 0 Max 400 Unit kHz tHDSTA 4.0 ⎯ 0.6 ⎯ μs tLOW tHIGH tSUSTA 4.7 4.0 4.7 ⎯ ⎯ ⎯ 1.3 0.6 0.6 ⎯ ⎯ ⎯ μs μs μs tHDDAT 0 3.45*2 0 0.9*3 μs Data setup time SDA ↓ ↑→ SCL↑ “STOP condition” setup time SCL↑→ SDA↑ Bus free time between “STOP condition” and “START condition” Noise filter tSUDAT 250 ⎯ 100 ⎯ ns tSUSTO 4.0 ⎯ 0.6 ⎯ μs tBUF tSP 4.7 2 tCYCP *4 ⎯ ⎯ 1.3 2 tCYCP *4 ⎯ ⎯ μs ns *1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2 : The maximum tHDDAT must satisfy that it doesn't extend at least “L” period (tLOW) of device's SCL signal. *3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of “tSUDAT ≥ 250 ns”. *4 : tCYCP is the peripheral clock cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more. 84 DS07-16907-2E MB91610 Series SDA tSUSTA tLOW tSUDAT tBUF SCL tHDSTA tHDDAT tHIGH tHDSTA tSP tSUSTO (11) Analog RGB (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Analog RGB output delay Analog RGB output settling time Symbol tVAD Pin name Conditions Value Min ⎯ ⎯ Typ 12 ⎯ Max ⎯ 20 Unit ns Remarks 50 MHz (Max) tVAS ROUT, GOUT, BOUT VREF = 1.1 V, VDDD = 3.3 V, VRO* = 2.7 kΩ ns * : VRO is an external resistance for DAC. • Display signal output timing DCKI tVAD 1 LSB ROUT GOUT BOUT tVAS 1 LSB DS07-16907-2E 85 MB91610 Series (12) Digital RGB Vertical synchronous/ horizontal synchronous/ display output control signal input timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Horizontal synchronous signal cycle time Horizontal synchronous signal pulse width Horizontal synchronous signal setup time Horizontal synchronous signal hold time Vertical synchronous signal setup time Vertical synchronous signal hold time Input synchronous signal rising/ falling time Symbol tHCYC tWH tDHST HSYNC tDHHD tHVST VSYNC tHVHD tDR tDF HSYNC, VSYNC 1H − 5 ⎯ ⎯ 2 Dot clock ns * 0 5 ⎯ ⎯ ns Dot clock Pin name HSYNC HSYNC Value Min 100 + tWH 20 ⎯ 4 Max ⎯ ⎯ 6 ⎯ Unit Dot clock Dot clock μs ns Remarks * : H stands for the horizontal synchronous signal. 1 synchronous is 1 unit. • Horizontal synchronous signal and display output control signal input timing DCKI 0.8 VCC 0.2 VCC tDHST tDHHD 0.8 VCC 0.8 VCC 0.2 VCC HSYNC 0.2 VCC tDR, tDF 86 DS07-16907-2E MB91610 Series • Horizontal synchronous signal input tHCYC tDF tWH tDR 0.8 VCC 0.2 VCC HSYNC 0.8 VCC 0.8 VCC 0.2 VCC • Vertical synchronous signal input timing • Detect VSYNC at HSYNC leading edge tDF tWH tDR 0.8 VCC 0.2 VCC tHVHD HSYNC 0.8 VCC 0.2 VCC tHVST tDF 0.8 VCC tDR 0.8 VCC VSYNC 0.2 VCC 0.2 VCC • Detect VSYNC at HSYNC trailing edge tDF tWH tDR 0.8 VCC 0.2 VCC tHVST tHVHD HSYNC 0.8 VCC 0.2 VCC tDF 0.8 VCC tDR 0.8 VCC VSYNC 0.2 VCC 0.2 VCC DS07-16907-2E 87 MB91610 Series (13) Display signal timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Dot clock input cycle time Dot clock input pulse width Dot clock output delay time1 Display signal output delay time I1 Symbol tDIF tDIWH tDIWL tPDCS tPDI1 Pin name DCKI DCKI DCKO R0 to R4, G0 to G5, B0 to B4, VOB, VOA0 to VOA2 Value Min 8 5 5 2.2 2 Max 75 ⎯ ⎯ 8 8.3 Unit MHz ns ns ns ns Remarks *1 *1 *2 *2 Display signal output delay time O1 tPDO1 −4 +5 ns *2 *1 : Input continuous signal to the dot clock. *2 : Output load 16 pF Note: Actual display output varies depending on what is controlled, such as display output control and display location control in each display layer. • Display signal output timing tDIF tDIWH 0.8 VCC 0.2 VCC tPDCS tPDCS tDIWL 0.8 VCC 0.2 VCC DCKI 0.8 VCC DCKO tPDO1 tPDI1 0.2 VCC R0 to R4 G0 to G5 B0 to B4 VOB VOA0 to VOA2 0.8 VCC 0.2 VCC 88 DS07-16907-2E MB91610 Series 5. Electrical Characteristics for the A/D Converter (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Full transition voltage Compare time Conversion time Power supply current (analog + digital) Reference power supply current (between AVRH and AVSS) Analog input capacity Interchannel disparity Analog port input current Analog input voltage Standard voltage Pin name ⎯ ⎯ ⎯ ⎯ AN0 to AN7 AN0 to AN7 ⎯ ⎯ AVCC Value Min ⎯ −5 − 3.5 −3 − 1.5 AVRH − 4 0.72* 1.2* ⎯ ⎯ ⎯ AVRH ⎯ ⎯ AN0 to AN7 AN0 to AN7 AVRH ⎯ ⎯ ⎯ ⎯ AVSS AVSS 3 1 Typ ⎯ ⎯ ⎯ ⎯ + 0.5 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Max 10 +5 + 3.5 +3 +4 ⎯ ⎯ 3.5 11 0.6 5 8.5 4 10 AVRH AVCC Unit bit LSB LSB LSB LSB μs μs μA Remarks AVCC = 3.3 V, AVRH = 3.3 V AVRH − 1.5 AVRH + 0.5 LSB PCLK = 33 MHz PCLK = 33 MHz At power-down*2 mA D/A stopped mA AVRH = 3.0 V μA pF LSB μA V V At power-down*2 *1 : Depending on the clock cycle supplied to peripheral resources. Ensure that it satisfies the value; PCLK cycle × more than 4 + the value calculated from (Equation 1). The condition of the minimum conversion time is when PCLK = 33 MHz, the value of sampling time: 0.424 μs, external impedance: 1.4 kΩ or less and compare time: 0.72 μs. (Continued) DS07-16907-2E 89 MB91610 Series (Continued) *2 : The current when the CPU is in stop mode and the A/D converter is not operating. *3 : Compare time = {(CT + 1) × 10 + 4} × peripheral clock (PCLK) period. (CT indicates compare time setting bits.) The condition of the minimum compare time is when CT = 1 and PCLK = 33 MHz. Rext AN0 to AN7 Analog input pin Rin Comparator Analog signal source Cin Rin Approx. 5.3 kΩ Cin Approx. 8.5 pF The output impedance of the external circuit connected to the analog input affects the sampling time of the A/D converter. Design the output impedance of the output circuit such that the required sampling time is less than the value of TS calculated from the following equation. (Equation 1) Ts = (Rin + Rext) × Cin × 8 Ts : Sampling time Rin : Input resistance of A/D = 5.3 kΩ Cin : Input capacitance of A/D = 8.5 pF Rext : Output impedance of external circuit If the sampling time is set as 600 ns, 600 ns ≥ (5.3 kΩ + Rext) × 8.5 pF × 8 ∴Rext ≤ 3.5 kΩ And the impedance of the external circuit therefore needs to be 3.5 kΩ or less. 90 DS07-16907-2E MB91610 Series • Definition of 10-bit A/D Converter Terms : Analog variation that is recognized by an A/D converter. : Deviation of the line between the zero-transition point (0000000000←→0000000001) and the full-scale transition point (1111111110←→1111111111) from the actual conversion characteristics. • Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1 LSB. • Total error : Difference between the actual value and the theoretical value. The total error includes zero transition error, full-scale transition error, and linear error. • Resolution • Linearity error Linearity error 3FFH 3FEH {1 LSB (N − 1) + V OT} 3FDH Differential linearity error Actual conversion characteristics (N + 1)H Actual conversion characteristics Digital output VFST Digital output (Actuallymeasured value) NH Ideal characteristics 004H 003H 002H 001H VNT (Actually-measured value) Actual conversion characteristics Ideal characteristics (N − 1)H V(N+1)T VNT (Actually-measured value) (N − 2)H VOT AVSS (Actually-measured value) AVRH AVSS (Actually-measured value) Actual conversion characteristics AVRH Analog input Analog input VNT − {1 LSB × (N − 1) + VOT} [LSB] 1 LSB' V (N+1) T − VNT − 1 [LSB] Differential linearity error of digital output N = 1 LSB VFST − VOT 1 LSB = 1022 Linearity error of digital output N = N VOT VFST VNT : A/D converter digital output value. : Voltage at which the digital output changes from 000H to 001H. : Voltage at which the digital output changes from 3FEH to 3FFH. : Voltage at which the digital output changes from (N − 1)H to NH. (Continued) DS07-16907-2E 91 MB91610 Series (Continued) Total error 3FFH 1.5 LSB' 3FEH 3FDH {1 LSB' (N − 1) + 0.5 LSB'} Actual conversion characteristics Digital output 004H 003H 002H 001H VNT (Actually-measured value) Actual conversion characteristics Ideal characteristics 0.5 LSB' AVSS Analog input AVRH 1 LSB' (Ideal value) Total error of digital output N AVRH − AVSS [V] 1024 VNT − {1 LSB' × (N − 1) + 0.5 LSB'} = 1 LSB' = N : A/D converter digital output value. VNT : Voltage at which the digital output changes from (N + 1)H to NH. VOT’ (Ideal value) = AVSS + 0.5 LSB [V] VFST’ (Ideal value) = AVRH − 1.5 LSB [V] 92 DS07-16907-2E MB91610 Series 6. Electrical Characteristics for the Analog RGB D/A Converter (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Resolution Linearity error Differential linearity error Analog output impedance Analog current (R/B/GOUT) Power supply current (VDDD) Value Min ⎯ ⎯ − 2.0 − 1.0 ⎯ 4.5 0 ⎯ Typ ⎯ ⎯ ⎯ ⎯ 250 5.2 2 25 Max 5 6 + 2.0 + 1.0 ⎯ 5.8 20 27 Unit bit bit LSB LSB kΩ mA μA mA Remarks ROUT, BOUT GOUT When the output is unloaded When the output is unloaded Analog output < 1.0 V Full-scale Zero-scale VREF = 1.1 V DS07-16907-2E 93 MB91610 Series 7. USB Characteristics (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Parameter Input High level voltage Input Low level voltage Input characteristics Differential input sensitivity Differential common mode input voltage Output High level voltage Symbol VIH VIL VDI VCM Pin name Conditions ⎯ ⎯ ⎯ ⎯ External pull-down resistance = 15 k Ω UDP, UDM External pull-up resistance = 1.5 kΩ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Value Min 2.0 VSS − 0.3 0.2 0.8 Max VCC + 0.3 0.8 ⎯ 2.5 Unit V V V V *1 *1 *2 *2 Remarks VOH 2.8 3.6 V *3 Output Low level voltage Output characteristics Crossover voltage Rise time Fall time Rise/fall time matching Output impedance Input capacitance Transceiver edge rate control capacitance VOL 0.0 0.3 V *3 VCRS tFR tFF tRFM ZDRV 1.3 4 4 90 28 ⎯ 25 2.0 20 20 111.11 44 V nS nS % Ω pF Ω *4 *5 *5 *5 Including Rs = 27 Ω *6 Recommended value:27 Ω CEDGE 75 Series resistance RS 30 *1 : The switching threshold voltage of Single-End-Receiver of USB I/O buffer is set as within VIL (Max) = 0.8 [V], VIH (Min) = 2.0 [V] (TTL input standard). There are some hystereses to lower noise sensitivity. (Continued) 94 DS07-16907-2E MB91610 Series *2 : Use differential-Receiver to receive USB differential data signal. Differential-Receiver has 200 [mV] of differential input sensitivity when the differential data input is within 0.8 [V] to 2.5 [V] to the local ground reference level. Above voltage range is the common mode input voltage range. Minimum differential input sensitivity [V] 1.0 [V] 0.2 [V] 0.8 [V] 2.5 [V] Common mode input voltage [V] *3 : The output drive capability of the driver is below 0.3 [V] at Low-State (VOL) (to 3.6 [V] and 1.5 kΩ load), and 2.8 [V] or above (to the VSS and 1.5 kΩ load) at High-State (VOH). *4 : The cross voltage of the external differential output signal (D + /D − ) of USB I/O buffer is within 1.3 [V] to 2.0 [V]. D+ Max 2.0 [V] Min 1.3 [V] D- VCRS standard range *5 : Regarding tFR ,tFF, tRFM They indicate rise time (Trise) and fall time (Tfall) of the differential data signal. They are defined by the time between 10% to 90% of the output signal voltage. For full-speed buffer, tFR/tFF ratio is regulated as within ±10% to minimize RFI emission. Rise time UDP UDM VCRS 10% 90% Fall time 90% 10% tFR tFF (Continued) DS07-16907-2E 95 MB91610 Series (Continued) *6 : The place to connect transceiver edge rate control capacitance CEDGE For this USB I/O, it is recommended to use CEDGE control capacitor. For USB Max standard as 75 pF, please control the edge characteristic of output waveform by connecting 30 [pF] to 50 [pF] (recommended value : 47 [pF] = 50[pF]) to D + and D − lines when implementing on the board. : RS = 27 Ω +D CEDGE 3-State RS = 27 Ω -D CEDGE Driver output impedance 3 Ω to 19 Ω Rs serial resistance value 25 Ω to 30 Ω Please apply 27 Ω of serial resistance value as a recommended value. 96 DS07-16907-2E MB91610 Series 8. Flash Memory Write/Erase Characteristics (VCC = 3.3 V, Ta = + 25 °C) Parameter Sector erase time Half word (16bits) write time Chip erase time* Flash memory data hold time 1 Value Min ⎯ ⎯ ⎯ 10000 10*2 Typ 0.9 23 10.8 ⎯ ⎯ Max 3.6 370 43.2 ⎯ ⎯ Unit s μs s Remarks Excludes write time prior to internal erase Not including system-level overhead time. Excludes write time prior to internal erase Erase/write cycles cycle Average Ta ≤ + 85 °C year Average Ta ≤ + 85 °C *1 : The chip erase time is the sector erase time multiplied across all sectors. *2 : This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85 °C) . DS07-16907-2E 97 MB91610 Series ■ ORDERING INFORMATION Part number MB91F610APMC MB91613PMC Package 120-pin plastic LQFP (FPT-120P-M21) 98 DS07-16907-2E MB91610 Series ■ PACKAGE DIMENSION 120-pin plastic LQFP Lead pitch Package width × package length Lead shape Sealing method Mounting height Weight 0.50 mm 16.0 × 16.0 mm Gullwing Plastic mold 1.70 mm MAX 0.88 g (FPT-120P-M21) 120-pin plastic LQFP (FPT-120P-M21) 18.00±0.20(.709±.008)SQ 16.00±0.10(.630±.004)SQ 90 61 91 60 0.08(.003) Details of "A" part 1.50 –0.10 .059 –.004 +0.20 +.008 (Mounting height) INDEX 0~8° 120 31 "A" 0.10±0.05 (.004±.002) (Stand off) 0.25(.010) LEAD No. 1 30 0.50(.020) 0.22±0.05 (.009±.002) 0.08(.003) M 0.145 .006 +0.05 –0.03 +.002 –.001 0.60±0.15 (.024±.006) C 2001-2008 FUJITSU MICROELECTRONICS LIMITED F120033S-c-3-4 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ DS07-16907-2E 99 MB91610 Series ■ MAIN CHANGES IN THIS EDITION Page Section Change Results Changed the part number. (MB91F610 → MB91F610A) Added “MB91613” to the part number. Changed the terms. (USB function with Mini-HOST → USB function/ HOST) (Mini-HOST → HOST) Changed the explanation of “• USB HOST”. (• Support of bulk and interrupt transfer (Only using endpoint1 and endpoint2) → • Support control transfer, bulk transfer, interrupt transfer, and isochronous transfer) Added the note *. Changed “I/O circuit type” of the pins number 69, 70 and 71. (L → F, L) Changed “Function” of the pin number 83 to 88, and 92 to 95. (Added “N.C. pin for MASK products.”.) ■ I/O CIRCUIT TYPE ■ HANDLING DEVICES ■ MEMORY SPACE 2.Memory map ■ I/O MAP Changed “Remarks” of the Type L. (Added “• Flash memory product only”.) Added “• OSDC output pin”. Corrected the table. (Flash/ROM → FLASH) (Added 000F 8000H) Corrected “Initial value after reset”. (FSTR:-------0 → -------1) Corrected “Block” for the line, 0000 0498H to 0000 049CH. (Changed to “Reserved”.) ■ ELECTRICAL CHARACTERISTICS Changed the notation of “Rating Max” for “Input voltage”. 1. Absolute Maximum Ratings (VSS + 4.0 → VCC + 0.3 ( ≤ 4.0)) Corrected “Remarks” for “Input voltage”. (5 V tolerant*7 → 5 V tolerant) (USB I/O*7 → USB I/O) Changed from “Power consumption” to “Power consumption (Flash product)”. Added “Power consumption (MASK product)”. Corrected the description of *8. (Deleted “ • Note that if the + B signal is input at power-on, since the power is supplied through the pin, the power supply voltage may become the voltage at which a power-on reset does not work.”.) (Continued) ⎯ ⎯ ■ FEATURES 4 7 11 12 21 27 31 ■ PIN ASSIGNMENT ■ PIN DESCRIPTION 39 43 64 65 100 DS07-16907-2E MB91610 Series Page Section Change Results 67 ■ ELECTRICAL CHARACTERISTICS Changed from “Power supply current” to “Power supply current 3. DC Characteristics (Flash product)”. (1) DC Characteristics Changed “Value” for ICCO. (Typ : 150 → 100 and 130 → 105) (Max : 180 → 130) Added “Power supply current (MASK product)”. Added PK0, PK1, INIT, MD0, and MD1 to “Pin name" for ““H” level input voltage (hysteresis input)”, and ““L” level input voltage (hysteresis input)”. Added PK0 and PK1 to “Pin name” for ““H” level output voltage”, and ““L” level output voltage”. 4. AC Characteristics Added the sentence, “When crystal oscillator is connected” to (1) Main Clock (MCLK) Input Standard “Remarks” for “Input frequency”. Added the sentence, “When using external clock” to “Remarks” for “Input clock cycle”, and “Input clock pulse width”. Corrected “ • Operating guaranteed range (Not using USB)”. (Changed from “ • Operating guaranteed range” to “ • Operating guaranteed range (Not using USB)”.) Corrected “ • Operating guaranteed range (at using USB)”. (Added *1 to *4 to each value.) (Changed from “VMS” to “PMS” for “ • When the PLL clock is selected”.) (Added the note at the bottom of the page.) (2) Sub Clock (SBCLK) Input Standard Added the column, “Remarks”. Divided the line, “Input frequency” into two lines, “When crystal oscillator is connected”, and “When using external clock”. Added “Input clock pulse width”, and “Input clock rise time and fall time”. Corrected the table. (Added “< When external clock input>”.) (Deleted “X1” and “X1A”.) (3) Conditions of PLL Changed from “(3) PLL Oscillation Stabilization Wait Time (LOCK UP Time)” to “(3) Conditions of PLL”. Added the column, “Typ” below “Value”. Added “PLL input clock frequency”, “PLL multiple rate”, and “PLL macro oscillation clock frequency”. Added “Reset input rise time and fall time”. Added “VIHS, tINITXF, tINITXR” to the table. Added “Compare time”. Corrected the note, *1. (compare time: 0.73 μs → compare time: 0.72 μs) Added the note *3. Corrected “ • Definition of 10-bit A/D Converter Terms”. (1LSB → 1LSB') (Continued) 68 69 71 72 73 74 75 (5) Reset Input Standards 5. Electrical Characteristics for the A/D Converter 89, 90 91, 92 DS07-16907-2E 101 MB91610 Series (Continued) Page 93 Section Change Results ■ ELECTRICAL CHARACTERISTICS Corrected “Resolution”. 6. Electrical Characteristics for the Deleted the description with * at the lower part of the table. Analog RGB D/A Converter 7. USB Characteristics ■ ORDERING INFORMATION Corrected the note, *3. (Added “at High-State (VOH)”.) Changed the part number. (MB91F610PMC → MB91F610APMC) Added “MB91613PMC” to the part number. 95 98 The vertical lines marked in the left side of the page show the changes. 102 DS07-16907-2E MB91610 Series MEMO DS07-16907-2E 103 MB91610 Series FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3329 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. 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Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department