CA3141

Semiconductor January 1999 T NT DUC PRO LACEME 747 ETE REP -7 OL -442 OBS ENDED -800 com 1 M ons arris. COM icati O RE ral Appl tapp@h N n High-Voltage Diode Array For Cent : ce Call or email Industrial and Military CA3141 Commercial, Applications Features • Matched Monolithic Construction - VF Match (Each Diode Pair) . . . . 0.55mV At IF = 1mA • Low Diode Capacitance. . . . . . . 0.3pF (Typ) at VR = 2V • High Diode-to-Substrate Breakdown. . . . . . . . . 30V (Min) • Low Reverse (Leakage) Current . . . . . . . 100nA (Max) Description The CA3141E High Voltage Diode Array Consists of ten general purpose high reverse breakdown diodes. Six diodes are internally connected to form three common cathode diode pairs, and the remaining four diodes are internally connected to form two common anode diode pairs. Integrated circuit construction assures excellent static and dynamic matching of the diodes, making the CA3141 extremely useful for a wide variety of applications in communications and switching systems. Applications • Balanced Modulators or Demodulators • Analog Switches • High-Voltage Diode Gates • Current Ratio Detectors Part Number Information PART NUMBER CA3141E TEMP. RANGE (oC) -55 to 125 PACKAGE 16 Ld PDIP PKG. NO. E16.3 Pinout CA3141 (PDIP) TOP VIEW 1 2 3 4 5 6 7 8 D5 D6 D2 D3 D9 D7 D1 D10 16 15 14 13 12 11 10 9 D4 D8 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1999 File Number 906.4 1 CA3141 Absolute Maximum Ratings Inverse Voltage (PIV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Peak Diode -to-Substrate Voltage . . . . . . . . . . . . . . . . . . . . . . . 30V Peak Forward Surge Current [IF (Surge)] . . . . . . . . . . . . . . . . 100mA DC Forward Current (IF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Maximum Power Dissipation (Any One Diode) . . . . . . . . . . . . . . 50mW Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER DC Forward Voltage Drop TA = 25oC SYMBOL VF TEST CONDITIONS IF (Anode) 100µA 1mA 10mA MIN 30 30 TYP 0.7 0.78 0.93 50 50 0.55 -1.5 50 See Figure 4 See Figure 5 See Figure 6 IFA = 1mA, VDS = 10V 0.9 0.96 MAX 0.9 1 1.2 100 100 UNITS V V V V V nA nA mV mV/oC ns pF pF pF - DC Reverse Breakdown Voltage DC Breakdown Voltage Between Any Diode and Substrate DC Reverse (Leakage) Current DC Reverse (Leakage) Current Between Any Diode and Substrate Magnitude of Diode Offset Voltage Between Diode Pairs Temperature Coefficient of Forward Voltage Drop Reverse Recovery Time Diode Capacitance Diode Anode-to-Substrate Capacitance Diode Cathode-to-Substrate Capacitance Magnitude of Cathode-to-Anode Current Ratio V(BR)R V(BR)DI IR IDI IF = -10µA IDI = 10µA VF = -20V VDI = 20V VDI = 20V, IFA = 1mA ∆VF/∆T tRR CD CDAI CDCI |IFC/IFA| IF = 1mA IF = 2mA, IR = 2mA Typical Performance Curves 1 DC FORWARD VOLTAGE DROP (V) DC FORWARD VOLTAGE DROP (V) TA = 25oC 0.8 1.2 1 0.6 0.8 0.6 IF = 10mA IF = 3mA IF = 1mA IF = 300µA IF = 100µA IF = 10µA IF = 1µA IF = 100nA 0.4 0.4 0.2 0.2 0 0.1 1 10 102 103 104 FORWARD CURRENT (µA) 0 -100 -50 0 50 100 TEMPERATURE (oC) 150 FIGURE 1. DC FORWARD VOLTAGE DROP vs FORWARD CURRENT FIGURE 2. DC FORWARD VOLTAGE DROP vs TEMPERATURE 2 CA3141 Typical Performance Curves 3 DIODE OFFSET VOLTAGE (mV) 2.5 2 1.5 TA = 25oC |VF1 - VF2| , |VF3 - VF4| , |VF5 - VF6| |VF7 - VF8| , |VF9 - VF10| (Continued) 1.2 TA = 25oC 1 DIODE CAPACITANCE (pF) 0.8 0.6 D5, D9 D2 D7, D8 D4 D1, D6 D3, D10 1 0.5 0.4 0.2 0 1 102 103 104 MAGNITUDE OF ANODE CURRENT (µA) 10 105 0 0 5 10 15 20 CATHODE-TO-ANODE DC REVERSE VOLTAGE (V) FIGURE 3. 3. DIODE OFFSET VOLTAGE vs MAGNITUDE OF ANODE CURRENT FIGURE 4. DIODE CAPACITANCE vs CATHODE-TO-ANODE REVERSE VOLTAGE 1.6 DIODE ANODE-TO-SUBSTRATE CAPACITANCE (pF) 1.5 1.4 1.3 1.2 1.1 TA = 25oC DIODE CATHODE-TO-SUBSTRATE CAPACITANCE (pF) 12 TA = 25oC 10 8 6 CATHODE (TERMINALS 3, 6, 14) ANODE (TERMINALS 2, 8, 11, 16) ANODE (TERMINAL 1) 1 0.9 0.8 0.7 0.6 0.5 0 ANODE (TERMINALS 4, 5) 123456 7 8 9 10 ANODE-TO-SUBSTRATE DC REVERSE VOLTAGE (V) ANODE (TERMINAL 15) 4 2 CATHODE (TERMINALS 7, 10, 12, 13) 0 0 5 10 15 20 CATHODE-TO-SUBSTRATE DC REVERSE VOLTAGE (V) FIGURE 5. DIODE ANODE-TO-SUBSTRATE CAPACITANCE vs REVERSE VOLTAGE FIGURE 6. DIODE CATHODE-TO-SUBSTRATE CAPACITANCE vs CATHODE-TO-SUBSTRATE DC REVERSE VOLTAGE FORWARD (CATHODE) CURRENT (mA) 10 DC LEAKAGE CURRENT (pA) TA = 25oC VDI = 10V 105 104 103 102 10 DIODE REVERSE (LEAKAGE) CURRENT 1 0.1 DIODE-TO-SUBSTRATE LEAKAGE CURRENT 1 0.1 0.01 0.01 10 1 FORWARD (ANODE) CURRENT (mA) 0.1 -100 -50 0 50 100 150 TEMPERATURE (oC) FIGURE 7. FORWARD (CATHODE) CURRENT vs FORWARD (ANODE) CURRENT FIGURE 8. DC LEAKAGE CURRENT vs TEMPERATURE 3 CA3141 Dual-In-Line Plastic Packages (PDIP) N E1 INDEX AREA 12 3 N/2 E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL -B- MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93 MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 A E A2 L A C L -AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A1 A2 -C- B B1 C D D1 E E1 e eA eB L N eA eC C e C A BS eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 0.100 BSC 0.300 BSC 0.115 16 0.430 0.150 - 2.54 BSC 7.62 BSC 10.92 3.81 16 2.93 4