AMMC-3040-W10

Agilent AMMC-3040 18-36 GHz Double-Balanced Mixer with Integrated LO Amplifier/ Multiplier Data Sheet Features • High IIP3 : +23 dBm • Wide Bandwidth • RF: 18-36 GHz • LO: 18-36 GHz • IF: DC-3 GHz 2520 x 760 µm (99.2 x 29.9 mils) ± 10 µm (± 0.4 mils) 100 ± 10 µm (4 ± 0.4 mils) 75 x 75 µm (3 ± 0.4 mils) Chip Size: Chip Size Tolerance: Chip Thickness: Pad Dimensions: • Fundamental or Sub-Harmonic Mixing • Up or Down Converter • Conversion Loss: 9.5dB • P1dB : +17 dBm • Low LO Drive Power: + 2 dBm • Usable to 42 GHz Applications • Point-to-Point Radio • LMDS • SATCOM Description The AMMC- 3040 is a broadband Double- Balanced Mixer (DBM) with an integrated high- gain LO amplifier. This MMIC can be used as either an up converter or down converter in microwave or millimeter wave applications. If desired, the LO amplifier can be biased to function as a frequency multiplier to enable second harmonic mixing of the LO input. The mixer section ofthe AMMC- 3040 is fabricated using a suspended metal system to create a unique, broadsidecoupled balun structure (patent pending) to achieve exceptional bandwidth. The MMIC provides repeatable conversion loss without tuning, making it highly suitable for automated assembly processes. AMMC-3040 Absolute Maximum Ratings[1] Symbol Parameters/Conditions Units V V mA °C °C °C -55 -65 +165 +300 -3.0 Min. Max. 5 0.5 550 +160 VD1, 2, 3, 4 Positive Drain Voltage VG1, 2, 3, 4 Gate Voltage Idd Tch Tb Tstg Tmax Note: Total Drain Current Operating Channel Temp. Operating Backside Temp. Storage Case Temp. Maximum Assembly Temp (60 sec max) °C 1. Operation in excess of any one of these conditions may result in permanent damage to this device. Note: These devices are ESD sensitive. The following precautions are strongly recommended: Ensure that an ESD approved carrier is used when dice are transported from one destination to another. Personal grounding is to be worn at all times when handling these devices. AMMC-3040 DC Specifications/Physical Properties[1] Symbol VD1, 2, 3, 4 Id1 ID2, 3, 4 VG1, 2, 3, 4 Vp θch-b Notes: 2. Channel-to-backside Thermal Resistance (θch-b)=58°C/Ω at Tchannel (Tc)=150 °C as measured using the liquid crystal method. Thermal Resistance at backside temperature (Tb)=25 °C calculated from measured data. 1. Measured in wafer form with Tchuck = 25°C. (Except θch-bs.) Parameters and Test Conditions Drain Supply Operating Voltage First Stage Drain Supply Current Vdd = 3.5 V, Vg1 = −0.5 V Total Drain Supply Current for Stages 2, 3 and 4 (Vdd = 3.5 V, Vgg = −0.5 V) Gate Supply Operating Voltages (Idd = 250 mA) Pinch-off Voltage (Vdd = 3.5 V, Idd < 10 mA Thermal Resistance[2] (Backside Temp. Tb= 25°C) Units V mA mA V V °C/W Min. 2 Typ. 3.5 50 225 -0.5 -1.5 49 Max. 5 AMMC-3040 RF Specifications Zo=50 Ω, Tb = 25°C, IF Output = 2 GHz, LO Input Power = +2 dBm, RF Input Power = -20 dBm, except as noted. V dd =3.5 V, I dd =250 mA Typ. Lc Lc ISOL L-R P−1 dB IIP3 Notes: 1. 100% on-wafer RF testing is done at RF frequency = 18, 22, and 32 GHz. 2. IF Input = 2 GHz, IF Input Power = -20 dBm, RF freq = LO + IF 3. Does not include LO amplifier gain of ~20 dB. 4. ∆f = 2 MHz, RF Input Power = -5 dBm. Symbol Parameters and Test Conditions Conversion Loss, Down Conversion [1] Conversion Loss, Up Conversion [2] LO - RF Isolation at RF Frequency = 22 GHz [3] Input Power at 1 dB Conversion Loss Compression, Down Conversion Input 3rd Order Intercept Point, Down Conversion at RF Frequency = 22 GHz [4] Units V dd =4.5 V, I dd =150 mA Typ. 10 10.5 32 17 22 Max. 12 dB dB dB dBm dBm 9.5 10 31 17 23 2 AMMC-3040 Typical Performance Zo=50 Ω, Tb = 25°C, IF = 2 GHz, LO Input Power = +2 dBm, RF Input Power = -20 dBm, except as noted. 14 12 CONVERSION LOSS (dB) 10 8 6 4 2 0 20 22 24 26 28 30 32 34 36 38 40 42 RF FREQUENCY (GHz) LO = - 4 dBm LO = 0 dBm LO = 4 dBm 14 13 CONVERSION LOSS (dB) 12 11 10 9 8 20 22 24 26 28 30 32 34 36 38 40 42 RF FREQUENCY (GHz) LO = - 4 dBm LO = 0 dBm LO = 4 dBm 14 13 CONVERSION LOSS (dB) 12 11 10 9 8 18 LO = 0 dBm LO = 2 dBm LO = 4 dBm 20 22 24 26 28 30 32 34 RF FREQUENCY (GHz) Figure 1. Conversion Loss, UpConversion. Vd = 3.5 V, Id = 250 mA, LO freq = RF - IF. 14 13 CONVERSION LOSS (dB) 12 11 10 9 8 18 LO = 0 dBm LO = 2 dBm LO = 4 dBm Figure 2. Conversion Loss, Down Conversion. Vd = 3.5 V, Id = 250 mA, LO freq = RF - IF. 12 11 CONVERSION LOSS (dB) 10 9 8 7 6 23 GHz 35 GHz Figure 3. Conversion Loss, Up Conversion. Vd = 4.5 V, Id = 150 mA, LO freq = RF + IF. 12 11 CONVERSION LOSS (dB) 10 9 8 7 6 23 GHz 35 GHz 20 22 24 26 28 30 32 34 -4 -3 -2 -1 0 1 2 3 4 5 6 -4 -3 -2 -1 0 1 2 3 4 5 6 RF FREQUENCY (GHz) RF FREQUENCY (GHz) LO INPUT POWER (dBm) Figure 4. Conversion Loss, Down Conversion. Vd = 4.5 V, Id = 150 mA, LO freq = RF + IF. Figure 5. Conversion Loss Vs. LO Input Power, Up Figure 6. Conversion Loss Vs. LO Input Power, Conversion. Vd = 3.5 V, Id = 250 mA, LO freq = RF Down Conversion. Vd = 3.5 V, Id = 250 mA, LO - IF. freq = RF - IF. 25 25 20 18 P1dB (dBm) P1dB (dBm) 20 P1dB (dBm) 20 16 15 15 14 LO = LO = LO = LO = - 2 dBm 0 dBm 2 dBm 4 dBm 10 10 LO = 0 dBm LO = 2 dBm LO = 4 dBm 12 5 5 10 18 20 22 24 26 28 30 32 34 36 38 40 RF FREQUENCY (GHz) 0 18 20 22 24 26 28 30 32 34 36 38 40 RF FREQUENCY (GHz) 0 18 20 22 24 26 28 30 32 34 RF FREQUENCY (GHz) Figure 7. Input Power at 1 dB Conversion Loss Compression, Down Conversion. Vd = 3.5 V, Id = 250 mA, LO freq = RF + IF. Figure 8. Input Power at 1 dB Conversion Loss Compression, Up Conversion. Vd = 3.5 V, Id = 250 mA, LO freq = RF + IF. Figure 9. Input Power at 1 dB Conversion Loss Compression, Down Conversion. Vd = 4.5 V, Id = 150 mA, LO freq = RF + IF. 3 AMMC-3040 Typical Performance(cont.) 25 25 25 20 P1dB (dBm) IIP3 (dBm) 20 IIP3 (dBm) 20 15 15 15 10 LO = 0 dBm LO = 2 dBm LO = 4 dBm 10 10 5 5 5 0 18 20 22 24 26 28 30 32 34 0 20 22 24 26 28 30 32 34 36 38 40 42 RF FREQUENCY (GHz) 0 18 20 22 24 26 28 30 32 34 RF FREQUENCY (GHz) RF FREQUENCY (GHz) Figure 10. Input Power at 1 dB Conversion Loss Compression, Up Conversion. Vd = 4.5 V, Id = 150 mA, LO freq = RF + IF. 40 35 30 ISOLATION (dB) Figure 11. Input 3rd Order Intercept Point,, Down Figure 12. Input 3rd Order Intercept Point, Down Conversion. Vd = 3.5 V, Id = 250 mA, LO freq = RF Conversion. Vd = 4.5 V, Id = 150 mA, LO freq = - IF. RF - IF. 40 35 30 ISOLATION (dB) 25 20 15 10 5 0 18 20 22 24 26 28 30 32 34 36 25 20 15 10 5 0 20 22 24 26 28 30 32 34 36 38 40 42 RF FREQUENCY (GHz) RF FREQUENCY (GHz) Figure 13. LO-RF Isolation, Down Conversion. Vd = 3.5 V, Id = 250 mA. Note: Does not include LO Buffer amplifier gain of ~20 dB, LO freq = RF - IF. Figure 14. LO-RF Isolation, Down Conversion. Vd = 4.5 V, Id = 150 mA. Note: Does not include LO Buffer amplifier gain of ~18 dB, LO freq = RF - IF. 0 82 420 700 914 1141 1475 2018 2520 760 Vd1 Vg2 Vd2 Vd3 Vd4 IF 760 480 LO RF 96 0 300 Vg1 0 98 Vg2 568 Vg3 894 Vg4 1320 IF 2018 1720 Figure 15. AMMC-3040 Bond Pad Locations, dimensions in microns. 4 To VDD DC Drain Supply Feed Gold Plated Shim (optional) 100 pF IF 0.6 pF ~500 µm long wire To VDD DC Drain Supply Feed Gold Plated Shim (optional) 100 pF IF 0.6 pF ~500 µm long wire Cb Cb LO RF LO RF 100 pF 100 pF To VGG DC Gate Supply Feed 100 pF Cb To VGG DC Gate Supply Feed Cb Cb To VGG DC Gate Supply Feed (a) Fundamental LO. Single drain and single gate supply assembly for using the LO amplifier in fundamental frequency mixer applications. (b) Sub-harmonic LO. Separate first-stage gate bias supply to use the LO amplifier as a multiplier for application as a sub-harmonic mixer. (Note: To assure stable operation bias supply feeds should be bypassed to ground with a capacitor, Cb > 100 pF typical) Figure 16. AMMC-3040 Assembly diagram. Biasing for Fundamental Mixing The recommended DC bias condition for the AMMC- 3040 LO amplifier when used as a fundamental frequency mixer is with all four drains connected to a single 3.5 to 4.5V supply and all four gates connected to an adjustable negative supply voltage as shown in Figure 16 (a). The gate voltage is adjusted for a total drain supply current of typically 150 to 250 mA. The second, third, and fourth stage DC drain bias lines are connected internally and therefore require only a single bond wire. A separate bond wire is needed for the first stage DC drain bias, Vd1. The third and fourth stage DC gate bias lines are connected internally. A total of three DC gate bond wires are required: one for Vg1, one for Vg2, and one for the Vg3 / Vg4 connection. The internal matching circuitry at the RF input creates a 50ohm DC and RF path to ground. Any DC voltage applied to the RF input must be maintained below 1 volt, otherwise, a blocking capacitor should be used. The RF output is AC coupled. No ground bond wires are needed since the ground connection is made by means of plated through via holes to the backside of the chip. Biasing for Sub-Harmonic Mixing The LO amplifier in the AMMC3040 can also be used as a frequency doubler. Optimum conversion efficiency as a doubler is obtained with an input power level of 3 to 8 dBm. Frequency multiplication is achieved by reducing the bias on the first stage FET to efficiently generate harmonics. The remaining three stages are then used to provide amplification. While many bias methods could be used to generate and amplify the desired harmonics within the AMMC- 3040’s LO amplifier, the following information is suggested as a starting point for sub- harmonic mixing applications. Frequency doubling is accomplished by biasing the first stage FET at pinch- off by setting Vg1 = Vp ≈ –1.1 volts. The remaining three stages are biased for normal amplification, e.g., Vgg is adjusted such that Id2 + Id3 + Id4 ≈ 250 mA. The drain voltage, Vdd, for all four stages should be 3.5 to 4.5 volts. The assembly diagram shown in Figure 16 (b) can be used as a guideline. In all cases, Cb > 100 pF to assure stability. IF Output Port The IF output port is located near the middle of the die, allowing this connection to be made from either side of the chip for maximum layout flexibility. The LO and RF signals are reflectively terminating at the IF port by connecting a 20- mil (500 um) long bond wire from the IF output pad on the MMIC to a shunt 0.6 pF chip capacitor mounted off- chip as indicated in Figure 16. 5 Assembly Techniques The backside of the AMMC- 3040 chip is RF ground. For microstripline applications, the chip should be attached directly to the ground plane (e.g., circuit carrier or heatsink) using electrically conductive epoxy[1]. For best performance, the topside of the MMIC should be brought up to the same height as the circuit surrounding it. This can be accomplished by mounting a gold plated metal shim (same length and width as the MMIC) under the chip, which is of the correct thickness to make the chip and adjacent circuit coplanar. The amount of epoxy used for chip and or shim attachment should be just enough to provide a thin fillet around the bottom perimeter of the chip or shim. The ground plane should be free of any residue that may jeopardize electrical or mechanical attachment. For use on coplanar circuits, the chip can be mounted directly on the topside ground plane of the circuit as long as care is taken to ensure adequate heat sinking. Multiple vias underneath the chip will significantly improve heat conduction. The location of the RF, LO, and IF bond pads is shown in Figure 15. Note that all RF input and output ports are in a Ground- Signal- Ground configuration. The IF port is located near the middle of the die, which allows for maximum layout flexibility since the IF connection can be made from either side of the chip. RF connections should be kept as short as reasonable to minimize performance degradation due to series inductance. A single bond wire is sufficient for all signal connections. However, doublebonding with 0.7 mil gold wire or the use of gold mesh[2] is recommended for best performance, especially near the high end of the frequency range. Thermosonic wedge bonding is the preferred method for wire attachment to the bond pads. Gold mesh can be attached using a 2 mil round tracking tool and a tool force of approximately 22 grams with an ultrasonic power of roughly 55 dB for a duration of 76 ± 8 mS. A guided wedge at an ultrasonic power level of 64 dB can be used for the 0.7 mil wire. The recommended wire bond stage temperature is 150 ± 2° C. Caution should be taken to not exceed the Absolute Maximum Ratings for assembly temperature and time. The chip is 100 µm thick and should be handled with care. This MMIC has exposed air bridges on the top surface and should be handled by the edges or with a custom collet (do not pick up die with vacuum on die center.) This MMIC is also static sensitive and ESD handling precautions should be taken. Notes: 1. Ablebond 84-1 LM1 silver epoxy is recommended. 2. Buckbee-Mears Corporation, St. Paul, MN, 800-262-3824 Ordering Information: AMMC-3040-W10 = waffle pack, 10 devices per tray AMMC-3040-W50 = waffle pack, 50 devices per tray www.agilent.com/ semiconductors For product information and a complete list of distributors, please go to our web site. Data subject to change. Copyright  2004 Agilent Technologies, Inc. February 12, 2004 5989-0528EN