LM51031D

Fast PFET Buck Controller FEATURES 1.0 A Totem Pole Output Driver High Speed Oscillator (700 kHz max) No Stability Compensation Required Lossless Short Circuit Protection Vcc Monitor 2.0% Precision Reference Programmable Soft-Start Moisture Sensitivity Level 3 LM51031 SOP-8 PKG DESCRIPTION The LM51031 is a switching contoller for use in DC-DC converters. It can be used in the buck topology with a minimum number of external components. The LM51031 consists of a Vcc monitor for controlling the state of the device, 1.0A power driver for controlling the gate of a discrete P-Channel transistor, fixed frequency oscillator, short circuit protection timer, programmable Soft-Start, precision reference, fast output voltage monitoring comparator, and output stage driver logic with latch. The high frequency oscillator allows the use of small inductiors and output capacitors, minimizing PC board area and system cost. The programmable Soft-Start reduces current surges at startup. The short circuit protection timer signifaicantly reduces the duth cycle to approximately 1/30 of its cycle during short circuit conditions. ORDERING INFORMATION Device LM51031D Marking LM51031 Package SOP-8 Typical Application (Fixed Output Voltage Versions) Figure 1. Block Diagram and Typical Application 2008 - Ver. 1.0 HTC −1− Fast PFET Buck Controller MAXIMUM RATINGS LM51031 (Absolute Maximum Ratings indicate limits beyond which damage to the device may occur) Rating Maximum Supply Voltage Driver Supply Voltage Driver Output Voltage COSC, CS, VFB (Logic Pin) Peak Output Current Steady State Out Current Operating Junction Temperature Operating Ambient Temperature Range Storage Temperature Range ESD (Human Body Model) Lead Temperature Soldering Wave Solder (through hole sytle only) (note 1) Reflow (SMD styles only) (note 2) 260 peak 230 peak ℃ ℃ Symbol VCC VC VGATE TJ TA TS Value 20 20 20 6 1 200 0 to 125 0 to 70 -65 to 150 2.0 Unit V V V V A mA ℃ ℃ ℃ kV Maximum ratings are those value beyond which device damage con occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliablilty may be affected. 1. 10 sec. maximum. 2. 60 sec. max above 183℃ PACKAGE LEAD DESCRIPTION Package Pin Number 1 2 3 4 5 6 7 8 Pin Symbol VGATE PGND COSC GND VFB VCC CS VC Function Driver pin to gate of external P-ch FET. Output power stage ground connection. Oscilator frequency programming capacitor. Logic ground. Feedback voltage input. Logic supply voltage. Soft-Start and fault timing capacitor. Driver supply Voltage. HTC −2− Fast PFET Buck Controller ELECTRICAL CHARACTERISTICS LM51031 (Specifications apply for 4.5V ≤ VCC ≤ 16V, 3V ≤ VC ≤ 16V, 0℃ ≤ TJ ≤ 125℃, unless otherwise specified.) Characteristic Oscillator Frequency Charge Current Discharge Current Maximum Duty Cycle Test Conditions VFB = 1.2V COSC = 470 pF 1.4 V < VCOSC < 2.0 V 2.7 V > VCOSC > 2.0 V 1 - (tOFF/tON) 1.0 V < VCS < 2.0 V 2.55 V > VCS < 2.4 V 2.4 V < VCS < 1.5 V 0 V < VCS < 2.5 V 2.6 V > VCS > 2.4 V 2.4 V > VCS > 1.5 V VFB = 1.0 V VFB = 1.5 V VCS = when GATE goes high Minimum VCS VFB = 0 V Min 160 80.0 175 40.0 4.0 0.7 0.2 9.0 2.5 0.4 0.725 1.225 1.210 1.12 1.10 70 4.100 4.085 65 TYP 200 110 680 83.3 264 66 6 0.85 0.3 15 3.1 2.5 2.6 2.4 1.5 0.7 0.866 1.250 1.250 1.15 1.15 6 1 100 4.0 1.2 1.5 25 25 4.300 4.200 130 4.5 2.7 500 Max 240 325 80 10 1.4 0.45 23 4.6 1.0 1.035 1.275 1.290 1.17 1.19 15 4 120 20 1.5 2.1 60 60 4.500 4.415 200 6.0 4.0 900 Unit kHz uA uA % Short Circuit Timer Charge Current Fast Discharge Current Slow Discharge Current Start Fault Inhibit Time Valid Fault Time GATE Inhibit Time Fault Duty Cycle CS Comparator Fault Enable CS Voltage Max CS Voltage Fault Detect Voltage Fault Inhibit Voltage Hold Off Release Voltage VFB = 1.0 V; CS = 0.1 uF; V COSC = 2.0 V uA uA uA ms ms ms % V V V V V V V V V V mV uA mV mV V V ns ns V V mV mA mA A Regulator Threshold Voltage Clamp VCS = 1.5 V CFB Comparator Regulator Threshold Voltage Fault Threshold Voltage Threshold Line Regulation Input Bias Current Voltage Tracking Input Hysteresis Voltage Power Stage GATE DC low Saturation Voltage GATE DC High Saturation Voltage Rise Time Fall Time VCOSC = VCS = 2.0 V TJ = 25℃ (Note 3) TJ = 0 to 125℃ TJ = 25℃ (Note 3) TJ = 0 to 125℃ 4.5 V ≤ VCC ≤ 16 V VFB = 0 V (Regulator Threshold - Fault Threshold Voltage) VCC = V C = 10 V; V FB = 1.2 V VCOSC = 1.0V;200 mA Sink VCOSC = 2.7V;200 mA Source; VC=VGATE CGATE = 1.0 nF; 1.5 V < VGATE < 9.0 V CGATE = 1.0 nF; 1.5 V < VGATE < 9.0 V 4.5 V < VCC < 16 V, Gate switching 3.0 V < VC < 16 V, Gate Nonswitching VCC = 4.0 VCC Monitor Turn-On Threshold Turn-Off Threshold Hysteresis Current Drain ICC IC Shutdown ICC 3. Guaranteed by design, not 100% tested in production. HTC −3− Fast PFET Buck Controller LM51031 Figure 2. Block Diagram THEORY OF OPERATION Control Scheme The LM51031 monitors and the output voltage to determine when to turn on the PFET. If VFB falls below the internal reference voltage of 1.25V during theoscillator’s charge cycle, the PFET is turned on and remains on for the duration.of the charge time. The PFET gets turned off and remains off during the oscillator’s discharge time with the maximum duty cycle to 80%. It requires 7mV typical, and 20mV maximum ripple on the V FB pin is required to operate. This method of control does not its require any loop stability compensation. Startup The LM51031 has an externally programmable soft start feature that allows the output voltage to come up slowly preventing voltage overshoot on the output. At startup, the voltage on all pins is zero. As VCC rises, the VC voltage along with the internal resistor RG keeps HTC −4− Fast PFET Buck Controller the PFET off. As VCC and VC continue to rise, the oscillator capacitor (COSC) and Soft start/Fault Timing capacitor(CS) charges via internal current sources. COSC gets charged by the current source IC and CS gets charged by the IT source combination described by: LM51031 Lossless Short Circuit Protection The LM51031 has “lossless” short circuit protection since there is no current sense resistor reguired. When the voltage at the CS pin (the fault timing capacitor voltage) reaches 2.5V during startup, the fault timing circuitry is enabled. During normal operation the CS voltage is 2.6V. During a short circuit or a transient condition, the output voltage moves lower and the voltage at VFB drops. If VFB drops below 1.15V, the output of the fault comparator goes high and the The internal Holdoff Comparator ensures that the external PFET is off until VCS > 0.7V, preventing the GATE flip-flop (F2) from being set. This allows the oscillator to reach its operating frequency before enabling the drive output. Soft start is obtained by clamping the VFB comparator’s (A6) reference input to approximately 1/2 of the voltage at the CS pin during startup, permitting the control loop and the output voltage to slowly increase. Once the CS pin charges above the Holdoff Comparator trip point of 0.7V, the low feedback to the VFB Comparator sets the GATE flip-flop during COSC ’s charge cycle. Once the GATE flip-flop is set, VGATE goes low and turns on the PFET. When VCS exceeds 2.4V, the CS charge sense comparator (A4) sets the V FB comparator reference to 1.25V completing the startup LM51031 goes into a fast discharge mode. The fault timing capacitor, CS, discharges to 2.4V. If the VFB voltage is still below 1.15V when the CS pin reaches 2.4V, a valid fault condition has been detected. The slow discharge comparator output goes high and enables gate G5 which sets the slow discharge flip flop. The Vgate flip flop resets and the output switch is turned off. The fault timing capacitor is slowly discharged to 1.5V. The LM51031 then enters a normal startup routine. If the fault is still present when the fault timing capacitor voltage reaches 2.5V, the fast and slow discharge cycles repeat as shown in figure 2. If the VFB voltage is above 1.15V when CS reaches 2.4V a fault condition is not detected, normal operation resumes and CS charges back to 2.6V. This reduces the chance of erroneously detecting a load transient as a cycle. fault condition. Figure 3. Voltage on Start Capacitor (V GS), the Gate (VGATE), and in the Feedback Loop (VFB), During Startup, Normal and Fault Conditions HTC −5− Fast PFET Buck Controller Buck Regulator Operation A block diagram of a typical buck regulator is shown in Figure 4. If we assume that the output transistor is initially off, and the system is in discontinuous operation, the inductor current IL is zero and the output voltage is at its nominal value. The current drawn by the load is supplied by the output capacitor CO. When the voltage across CO drops below the threshold established by the feedback LM51031 resistors R1 and R2 and he reference voltage VREF, the power transistor Q1 switches on and current flows through the inductor to the output. The inductor current rises at a rate determined by (VIN − VOUT)/L. The duty cycle (or “on” time) for the LM51031 is limited to 80%. If output voltage remains to 80%. If output voltag remains higher than nominal during the entire C OSC change time, the Q1 does not turn on, skipping the pulse Figure 4. Buck Regulator Block Diagram APPLICATIONS INFORMATION LM51031 Design Example Specications 12 V to 5.0 V, 3.0 A Buck Controller Vin = 12 V ±20% (i.e. 14.4 V max, 121 V nom, 9.6 V min) Vout = 5.0 V±2% Iout = 0.3 A to 3.0 A Output ripple voltage < 50 mV max Efficiency > 80% fSW = 200 kHz 1) Duty Cycle Estimates Since the maximum duty cycle D, of the LM51031 is limited to 80% min, it is necessary to estimate the duty cycle for the various input condidtions over the complete operating range. The duty cycle for a buck regulator operating in a where: VSAT = RDS(ON) × IOUT max and RDS(ON) is the value at TJ 100°C. If VF = 0.60 V and VSAT = 0.60 V then the above equati becomes: continuous conduction mode is given by: HTC −6− Fast PFET Buck Controller 2) Switching Frequency and On and Off Time Calculations Given that fSW = 200 kHz and DMAX = 0.80 LM51031 impedance aluminum are less expensive. of suppliers and are the best choice for surface mount Solid tantalum chip capacitors are available from a numb of suppliers and are the best choice for surface mount applications. The output capacitor limits the output ripple voltage. Th e LM51031 needs a maximum of 20 mV of output ripple fo r the feedback comparator to change state. If we assume that all the inductor ripple current flows through the outpu t capacitor and that it is an ideal capacitor (i.e. zero ESR), 3) Oscillator Capacitor Selection The switching frequency is set by COSC, whose value is given by: the minimum capacitance needed to limit the output rippl e to 50 mV peak−to−peak is given by: The minimum ESR needed to limit the output voltage ripple to 50 mV peak−to−peak is: 4) Inductor Selection The inductor value is chosen for continuous mode operation down to 0.3 Amps. The ripple current ∆I = 2 × IOUTmin = 2 × 0.3 A = 0.6 A The output capacitor should be chosen so that its ESR is less than 83 mΩ. During the minimum off time, the ripple current is 0.4 A and the output voltage ripple will be: This is the minimum value of inductor to keep the ripple current < 0.6 A during normal operation. A smaller inductor will result in larger ripple current. Ripple current at a minimum off time is: 6) VFB Divider The input bias current to the comparator is 4.0 uA. The resistor divider current should be considerably higher than this to ensure that there is sufficient bias current. If we The core must not saturate with the maximum expected current, here given by: choose the divider current to be at least 250 times the bia current this permits a divider current of 1.0 mA and simplifies the calculations. 5) Output Capacitor The output capacitor and the inductor form a low pass filter. The output capacitor should have a low ESL and ESR. Low impedance aluminum electrolytic, tantalum or organic semiconductor capacitors are a good choice for an output capacitor. Low Let R2 = 1.0 K Rearranging the divider equation gives: HTC −7− Fast PFET Buck Controller 7) Divider Bypass Capacitor CRR Since the feedback resistors divide the output voltage by a factor of 4.0, i.e. 5.0 V/1.25 V = 4.0, it follows that the output ripple is also divided by four. This would require that the output ripple be at comparator. We use a capacitor CRR to act as an least 60 mV (4.0 × 15 mV) to trip the feedback AC short. The ripple voltage frequency is equal to the switching frequency so we choose CRR = 1.0 nF. 8) Soft−Start and Fault Timing Capacitor CS CS performs several important functions. First it provides a delay time for load transients so that the IC does not enter a fault mode every time the load changes abruptly. Secondly it disables the fault circuitry during startup, it also provides Soft−Start by clamping the reference voltage during startup, allowing it to rise slowly, and, finally it controls the hiccup short circuit protection circuitry. This reduces the duty cycle to approximately 0.035 during short circuit conditions. An important consideration in calculating CS is that it’s voltage does not reach 2.5 V (the voltage at which the fault detect circuitry is enabled) before VFB reaches 1.15 V otherwise the power supply will never start. If the VFB pin reaches 1.15 V, the fault timing comparator will discharge CS and the supply will not start. For the VFB voltage to reach 1.15 V the output voltage must be at least 4 × 1.15 = 4.6 V. If we choose an arbitrary startup time of 900 s, the value of CS is: 9) Input Capacitor For this circuit The fault time is given by: where ICharge is 264 uA typical. where IFastDischarge is 66 uA typical. LM51031 The fast discharge time occurs when a fault is first detected. The CS capacitor is discharged from 2.5 V to 2 The recharge time is the time for CS to charge from 1.5 to 2.5 V. A larger value of CS will increase the fault time out time but will also increase the Soft−Start time. The input capacitor reduces the peak currents drawn from the input supply and reduces the noise and ripple voltage on the VCC and VC pins. This capacitor must als o ensure that the VCC remains above the UVLO voltage in the event of an output short circuit. A low ESR capacitor The fault time is the sum of the slow discharge time the fast discharge time and the recharge time. It is dominated by the slow discharge time. The first parameter is the slow discharge time, it is the time for the CS capacitor to discharge from 2.4 V to 1.5 V and is given by: output short circuit. A low ESR capacitor of at least 100 u is good. A ceramic surface mount capacitor should also be connected between VCC and ground to filter high frequency noise. 10) MOSFET Selection The LM51031 drives a P−Channel MOSFET. The VGATE pin swings from GND to VC. The type of P−Ch FET used depends on the operating conditions but for input voltage where IDischarge is 6.0 uA typical. below 7.0 V a logic level FET should be used. HTC −8− Fast PFET Buck Controller A P−Ch FET with a continuous drain current (ID) rating greater than the maximum output current is required. The Gate−to−Source voltage VGS and Source Breakdown Voltage should be chosen based on the input supply voltage. The power dissipation due to the conduction losses is given by: LM51031 where The power dissipation of the P−Ch FET due to the switching losses is given by: where tr = Rise Time. 11) Diode Selection The flyback or catch diode should be a Schottky diode because of it’s fast switching ability and low forward voltage drop. The current rating must be at least equal to the maximum output current. The breakdown voltage should be at least 20 V for this 12 V application. The diode power dissipation is given by: HTC −9−