LM5171D

1.5A, 280kHz, Boost Regulator FEATURES • Integrated Power Switch 1.5A Guaranteed • Wide Input Voltage Range 2.7V to 30V • High Frequency Allows for Small Components • Minimum External Components • Easy External Synchronization • Frequency Foldback Reduces Component Stress During an Overcurrent Condition • Thermal Shutdown with Hysteresis • Shutdown Current is 50 uA Maximum • Wide Ambient Temperature Range • Moisture Sensitivity Level 3 LM5171 SOP-8 PKG APPLICATION • LCD Monitor/TV LED Backlight Driver • TFT-LCD Power Management ORDERING INFORMATION Device LM5171D Package SOP-8 DESCRIPSION The LM5171 product is 280kHz switching regulator with a high efficiency, 1.5A integrated switch. This part operates over a wide input voltage range, from 2.7V to 30V. The flexibility of the design allows the chip to operate in most power supply configurations, including boost, flyback, forward, inverting, and SEPIC. This IC utilizes current mode architecture, which allows excellent load and line regulation, as well as a practical means for limiting current. Combining high frequency operation with a highly integrated regulator circuit results in an extremely compact power supply solution. The circuit design includes provisions for features such as frequency synchronization, shutdown, and feedback control. ABSOLUTE MAXIMUM RATINGS RATING Junction Temperature Range Storage Temperature Range Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case Lead Temperature (Soldering, 10 sec) (Note 1) SYMBOL TJ Tstg RθJA RθJC - VALUE -40 to 125 -65 to 150 165 45 230 UNIT ℃ ℃ ℃/W ℃/W ℃ Note 1. 60 second maximum above 183°C. * Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Maximum ratings applied to the device are individual stress limit value and are not valid simultaneously. If the limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. Ordering Information Package SOP-8 Order No. LM5171D 1.5A, 280kHz Description Supply As Reel Status Active Dec. 2010 - Rev. 1.2.1 -1 - HTC 1.5A, 280kHz, Boost Regulator ABSOLUTE MAXIMUM RATINGS* Pin Name IC Power Input Shutdown / Sync Loop Compensation Voltage Feedback Input Test Pin Power Ground Analog Ground Switch Input Pin Symbol Vcc SS Vc FB Test PGND AGND Vsw VMAX 30 V 30 V 6.0 V 10 V 6.0 V 0.3 V 0V 40 V VMIN - 0.3 V - 0.3 V - 0.3 V - 0.3 V - 0.3 V - 0.3 V 0V - 0.3 V ISOURCE N/A 1.0 mA 10 mA 1.0 mA 1.0 mA 4.0 A N/A 10 mA LM5171 ISINK 200 mA 1.0 mA 10 mA 1.0 mA 1.0 mA 1.0 mA 10 mA 3.0 A * Operating Ratings indicate conditions for which the device is intended to be but do not guarantee specific performance limits. For guaranteed specifications, see the Electrical Characteristics.) BLOCK DIAGRAM VCC Shutdown Delay Timer 2.0V Regulator Thermal Shutdown Switch Oscillator Sync Frequency Shift 5:1 S R x5 63mΩ Q Driver VSW SS Test PGND 0.4V Detector Ramp Summer FB 1.276V + - + Error Amp PWM Comparator AGND VC Dec. 2010 - Rev. 1.2.1 -2 - HTC 1.5A, 280kHz, Boost Regulator PIN CONFIGURATION VC FB Test SS 1 2 3 4 8 7 6 5 LM5171 VSW PGND AGND VCC SOP-8 PKG PIN DESCRIPTION Pin No. 1 Pin Name VC Pin Function Loop compensation pin. The VC pin is the output of the error amplifier and is used for loop compensation and current limit. Loop compensation can be implemented by a simple RC network as shown in the application circuit on page 4 as R1 and C1. Feedback pin. This pin senses an output voltage and is referenced to 1.276V. When the voltage at this pin falls below 0.4V, chip switching frequency reduces to 20% of the nominal frequency. This pin is connected to internal test logic and should either be left floating or be used in soft start circuit. Connection to a voltage between 9.5 V and 15 V shuts down the internal oscillator and leaves the power switch running. Synchronization and shutdown pin. This pin may be used to synchronize the part to nearly twice the base frequency. A TTL low will shut the part down and put it into low current mode. If synchronization is not used, this pin should be either tied high or left floating for normal operation. Input power supply pin. This pin supplies power to the part and should have a bypass capacitor connected to AGND. Analog ground. This pin provides a clean ground for the controller circuitry and should not be in the path of large currents. The output voltage sensing resistors should be connected to this ground pin. This pin is connected to the IC substrate. Power ground. This pin is the ground connection for the emitter of the power switching transistor. Connection to a good ground plane is essential. High current switch pin. This pin connects internally to the collector of the power switch. The open voltage across the power switch can be as high as 40 V. To minimize radiation, use a trace as short as practical. 2 FB 3 Test 4 SS 5 VCC 6 AGND 7 PGND 8 VSW Dec. 2010 - Rev. 1.2.1 -3 - HTC 1.5A, 280kHz, Boost Regulator APPLICATION CIRCUIT R2 3.72k 1 2 LM5171 VC FB Test SS VSW PGND AGND VCC 8 7 6 5 L1 D1 MBRS120T3 VOUT 5V C1 0.01uF 3 4 SS 3.3V R1 5k + 22uH C3 22uF R3 1.28k + C2 22uF ELECTRICAL CHARACTERISTICS 2.7V < Vcc < 30 V, 0°C < TJ < 125°C, unless otherwise stated. Characteristics Error Amplifier FB Reference Voltage FB Input Current FB Reference Voltage Line Regulation Error Amp Transconductance Error Amp Gain Vc Source Current Vc Sink Current Vc High Clamp Voltage Vc Low Clamp Voltage Vc Threshold Test Condition Min TYP Max Unit Vc tied to FB : Measure at FB FB = VREF Vc = FB Ivc = ± 25 uA (Note 2) 1.246 -1.0 300 200 25 200 1.5 0.25 200 1.276 0.1 0.01 550 500 50 625 1.7 0.50 625 1.300 1.0 0.03 800 90 1500 1.9 0.65 1500 V uA %/V uMho V/ V uA uA V V uA FB = 1.0V, Vc = 1.25V FB = 1.5V, Vc = 1.25V FB = 1.0V, Vc sources 25uA FB = 1.5V, Vc sinks 25uA Reduce Vc from 1.5V until switching stops Oscillator Base Operating Frequency Reduced Operating Frequency Maximum Duty Cycle FB Frequency Shift Threshold Frequency drops to reduced operating frequency -4 FB = 1V FB = 0V 230 30 90 0.36 280 52 94 0.40 310 120 0.44 kHz kHz % V Dec. 2010 - Rev. 1.2.1 - HTC 1.5A, 280kHz, Boost Regulator ELECTRICAL CHARACTERISTICS (Continued) 2.7V < Vcc < 30 V, 0°C < TJ < 125°C, unless otherwise stated. LM5171 Characteristics Sync / Shutdown Sync Range Sync Pulse Transition Threshold SS Bias Current Shutdown Threshold Shutdown Delay Power Switch Test Condition Min TYP Max Unit 320 Rise Time = 20 ns SS = 0V SS = 3.0V 2.5 -15 0.50 2.7V ≤ Vcc ≤ 12V 12V ≤ Vcc ≤ 30V 12 12 -3 3 0.85 80 36 500 8 1.20 350 200 kHz V uA V us us ISWITCH = 1.5A (Note 2) Switch Saturation Voltage ISWITCH = 1.0A, 0°C ≤ TA ≤ 70°C ISWITCH = 10mA Switch Current Limit Minimum Pulse Width 50% duty cycle (Note 2) 80% duty cycle (Note 2) (Note 2) 1.6 1.5 200 - 0.8 0.55 0.09 1.9 1.7 250 10 17 2.0 1.4 1.00 0.45 2.4 2.2 300 30 100 30 100 100 V V V A A ns mA/A mA/A mA/A mA/A uA FB = 0V, Isw = 4.0A 2.7V ≤ VCC ≤ 12V, 10mA ≤ Isw ≤1.0A 12V ≤ VCC ≤ 30V, 10mA ≤ Isw ≤ 1.0A ∆Icc/∆Ivsw 2.7V ≤ VCC ≤ 12V,10mA ≤ Isw ≤ 1.5A (Note2) 12V ≤ VCC ≤ 30V, 10mA≤ Isw ≤ 1.5A (Note2) Switch Leakage General Operating Current Shutdown Mode Current Minimum Operating Input Voltage Thermal Shutdown Thermal Hysteresis Vsw = 40V, Vcc = 0V Isw = 0 Vc < 0.8V, SS = 0V, 2.7V ≤ Vcc ≤ 12V Vc < 0.8V, SS = 0V, 12V ≤ Vcc ≤ 30V Vsw Switching, Maximum Isw = 10mA (Note 2) (Note 2) 150 - 5.5 12 2.45 180 25 8 60 100 2.70 210 - mA uA uA V °C °C Note 2. Guaranteed by design, not 100% tested in production. Dec. 2010 - Rev. 1.2.1 -5 - HTC 1.5A, 280kHz, Boost Regulator TYPICAL PERFORMANCE CHARCTERISTICS LM5171 Figure 3. ICC(No Switching) vs. Temperature Figure 4. ∆Icc/∆Ivsw vs. Temperature Figure 5. VCE(SAT) vs. ISW Figure 6. Minimum Input Voltage vs. Temperature VCC = 12V Figure 7. Switching Frequency vs. Temperature Figure 8. Switching Frequency vs. VFB Figure 9. Current Limit vs. Temperature Figure 10. Maximum Duty Cycle vs. Temperature Dec. 2010 - Rev. 1.2.1 -6 - HTC 1.5A, 280kHz, Boost Regulator TYPICAL PERFORMANCE CHARCTERISTICS (Continued) LM5171 Figure 11. Vc Threshold and High Clamp Figure 12. Shutdown Threshold vs. Temperature Voltage vs. Temperature Figure 13. Shutdown Delay vs. Temperature Figure 14. ISS vs VSS Figure 15. ICC vs. VIN During Shutdwon Figure 16. Error Amplifier Transconductance vs. Temperature Figure 17. Switch Leakage vs. Temperature Dec. 2010 - Rev. 1.2.1 -7 Figure 18. Error Amplifier IOUT vs. VFB - HTC 1.5A, 280kHz, Boost Regulator APPLICATION INFORMATION Current Mode Control VIN Oscillator VC R + PWM Comparator X5 63mΩ S Q Power Switch VSW L D1 MBRS120T3 C0 LM5171 RLoad Figure 19. Current Mode Controle Scheme The LM5171 is a current mode control scheme, in which the PWM ramp signal is derived from the power switch current. This ramp signal is compared to the output of the error amplifier to control the on-time of the power switch. The oscillator is used as a fixed-frequency clock to ensure a constant operational frequency. The resulting control scheme features several advantages over conventional voltage mode control. First, derived directly from the inductor, the ramp signal responds immediately to line voltage changes. This eliminates the delay caused by the output filter and error amplifier, which is commonly found in voltage mode controllers. The second benefit comes from inherent pulse−by−pulse current limiting by merely clamping the peak switching current. Finally, since current mode commands an output current rather than voltage, the filter offers only a single pole to the feedback loop. This allows both a simpler compensation and a higher gain−bandwidth over a comparable voltage mode circuit. Without discrediting its apparent merits, current mode control comes with its own peculiar problems, mainly, sub harmonic oscillation at duty cycles over 50%. The LM5171 solves this problem by adopting a slope compensation scheme in which a fixed ramp generated by the oscillator is added to the current ramp. A proper slope rate is provided to improve circuit stability without sacrificing the advantages of current mode control. Oscillator and Shutdown Figure 20. Timing Diagram of Sync and Shutdown Dec. 2010 - Rev. 1.2.1 -8 - HTC 1.5A, 280kHz, Boost Regulator LM5171 The oscillator is trimmed to guarantee 18% frequency accuracy. The output of the oscillator turns on the power switch at a frequency of 280 kHz. The power switch is turned off by the output of the PWM Comparator. A TTL−compatible sync input at the SS pin is capable of syncing up to 1.8 times the base oscillator frequency. As shown in Figure 20, in order to sync to a higher frequency, a positive transition turns on the power switch before the output of the oscillator goes high, thereby resetting the oscillator. The sync operation allows multiple power supplies to operate at the same frequency. A sustained logic low at the SS pin will shut down the IC and reduce the supply current. An additional feature includes frequency shift to 20% of the nominal frequency when the FB pin trigger the threshold. During power up, overload, or short circuit conditions, the minimum switch on−time is limited by the PWM comparator minimum pulse width. Extra switch off−time reduces the minimum duty cycle to protect external components and the IC itself. As previously mentioned, this block also produces a ramp for the slope compensation to improve regulator stability. Error Amplifier LM5171 VC 120pF C1 0.01uF R1 5kΩ FB + 1.276V 1MΩ Voltage Clamp Error Amp Figure 21. Error Amplifier Equivalent Circuit The FB pin is directly connected to the inverting input of the positive error amplifier, whose non−inverting input is fed by the 1.276 V reference. The amplifier is transconductance amplifiers with a high output impedance of approximately 1 MΩ, as shown in Figure 21. The VC pin is connected to the output of the error amplifiers and is internally clamped between 0.5 V and 1.7 V. A typical connection at the VC pin includes a capacitor in series with a resistor to ground, forming a pole/zero for loop compensation. An external shunt can be connected between the VC pin and ground to reduce its clamp voltage. Consequently, the current limit of the internal power transistor current is reduced from its nominal value. Switch Driver and Power Switch The switch driver receives a control signal from the logic section to drive the output power switch. The switch is grounded through emitter resistors (63mΩ total) to the PGND pin. PGND is not connected to the IC substrate so that switching noise can be isolated from the analog ground. The peak switching current is clamped by an internal circuit. The clamp current is guaranteed to be greater than 1.5A and varies with duty cycle due to slope compensation. The power switch can withstand a maximum voltage of 40 V on the collector (VSW pin). The saturation voltage of the switch is typically less than 1V to minimize power dissipation. Dec. 2010 - Rev. 1.2.1 -9 - HTC 1.5A, 280kHz, Boost Regulator LM5171 Short Circuit Condition When a short circuit condition happens in a boost circuit, the inductor current will increase during the whole switching cycle, causing excessive current to be drawn from the input power supply. Since control ICs don’t have the means to limit load current, an external current limit circuit (such as a fuse or relay) has to be implemented to protect the load, power supply and ICs. In other topologies, the frequency shift built into the IC prevents damage to the chip and external components. This feature reduces the minimum duty cycle and allows the transformer secondary to absorb excess energy before the switch turns back on. Figure22. Startup Waveforms of Circuit Shown in the Application Circuit. Load = 400mA The LM5171 can be activated by either connecting the VCC pin to a voltage source or by enabling the SS pin. Startup waveforms shown in Figure 22 are measured in the boost converter demonstrated in the Application circuit on the page 4 of this document. Recorded after the input voltage is turned on, this waveform shows the various phases during the power up transition. When the VCC voltage is below the minimum supply voltage, the VSW pin is in high impedance. Therefore, current conducts directly from the input power source to the output through the inductor and diode. Once VCC reaches approximately 1.5V, the internal power switch briefly turns on. This is a part of the LM5171 normal operation. The turn−on of the power switch accounts for the initial current swing. When the VC pin voltage rises above the threshold, the internal power switch starts to switch and a voltage pulse can be seen at the VSW pin. Detecting a low output voltage at the FB pin, the built−in frequency shift feature reduces the switching frequency to a fraction of its nominal value, reducing the minimum duty cycle, which is otherwise limited by the minimum on−time of the switch. The peak current during this phase is clamped by the internal current limit. When the FB pin voltage rises above 0.4V, the frequency increases to its nominal value, and the peak current begins to decrease as the output approaches the regulation voltage. The overshoot of the output voltage is prevented by the active pull−on, by which the sink current of the error amplifier is increased once an overvoltage condition is detected. The overvoltage condition is defined as when the FB pin voltage is 50mV greater than the reference voltage. Dec. 2010 - Rev. 1.2.1 - 10 - HTC 1.5A, 280kHz, Boost Regulator COMPONENT SELECTION Frequency Compensation LM5171 The goal of frequency compensation is to achieve desirable transient response and DC regulation while ensuring the stability of the system. A typical compensation network, as shown in Figure 23, provides a frequency response of two poles and one zero. This frequency response is further illustrated in the Bode plot shown in Figure 24. VC R1 LM5171 C1 C2 AGND Figure 23. A Typical Compensation Network The high DC gain in Figure 24 is desirable for achieving DC accuracy over line and load variations. The DC gain of a transconductance error amplifier can be calculated as follows: Gain DC = Gm × RO where: GM = error amplifier transconductance; RO = error amplifier output resistance ≈ 1 MΩ. The low frequency pole, fP1, is determined by the error amplifier output resistance and C1 as: f P1 = The first zero generated by C1 and R1 is: 1 2 πC1RO 1 2πC1R1 f Z1 = The phase lead provided by this zero ensures that the loop has at least a 45° phase margin at the crossover frequency. Therefore, this zero should be placed close to the pole generated in the power stage which can be identified at frequency: fp = 1 2πCO R LOAD where: CO = equivalent output capacitance of the error amplifier≈120pF; RLOAD= load resistance. Dec. 2010 - Rev. 1.2.1 - 11 - HTC 1.5A, 280kHz, Boost Regulator LM5171 The high frequency pole, fP2, can be placed at the output filter’s ESR zero or at half the switching frequency. Placing the pole at this frequency will cut down on switching noise. The frequency of this pole is determined by the value of C2 and R1: f p2 = 1 2πC2R1 One simple method to ensure adequate phase margin is to design the frequency response with a −20dB per decade slope, until unity−gain crossover. The crossover frequency should be selected at the midpoint between fZ1 and fP2 where the phase margin is maximized. Gain (dB) Frequency (Log) Figure 24. Bode Plot of the Compensation Network shown in Figure 23. VSW Voltage Limit In the boost topology, VSW pin maximum voltage is set by the maximum output voltage plus the output diode forward voltage. The diode forward voltage is typically 0.5V for Schottky diodes and 0.8V for ultra fast recovery diodes VSW(MAX) = VOUT(MAX) + VF where: VF = output diode forward voltage. In the flyback topology, peak VSW voltage is governed by: VSW(MAX) = VCC(MAX) + (VOUT + VF) ⅹ N where: N = transformer turns ratio, primary over secondary. When the power switch turns off, there exists a voltage spike superimposed on top of the steady−state voltage. Usually this voltage spike is caused by transformer leakage inductance charging stray capacitance between the VSW and PGND pins. To prevent the voltage at the VSW pin from exceeding the maximum rating, a transient voltage suppressor in series with a diode is paralleled with the primary windings. Another method of clamping switch voltage is to connect a transient voltage suppressor between the VSW pin and ground. Dec. 2010 - Rev. 1.2.1 - 12 - HTC 1.5A, 280kHz, Boost Regulator Magnetic Component Selection LM5171 When choosing a magnetic component, one must consider factors such as peak current, core and ferrite material, output voltage ripple, EMI, temperature range, physical size and cost. In boost circuits, the average inductor current is the product of output current and voltage gain (VOUT/VCC), assuming 100% energy transfer efficiency. In continuous conduction mode, inductor ripple current is I RIPPLE = where: f = 280 kHz Vcc (VOUT - VCC ) (f)(L)(VOUT ) The peak inductor current is equal to average current plus half of the ripple current, which should not cause inductor saturation. The above equation can also be referenced when selecting the value of the inductor based on the tolerance of the ripple current in the circuits. Small ripple current provides the benefits of small input capacitors and greater output current capability. A core geometry like a rod or barrel is prone to generating high magnetic field radiation, but is relatively cheap and small. Other core geometries, such as toroids, provide a closed magnetic loop to prevent EMI. Input Capacitor Selection In boost circuits, the inductor becomes part of the input filter, as shown in Figure 26. In continuous mode, the input current waveform is triangular and does not contain a large pulsed current, as shown in Figure 25. This reduces the requirements imposed on the input capacitor selection. During continuous conduction mode, the peak to peak inductor ripple current is given in the previous section. As we can see from Figure 25, the product of the inductor current ripple and the input capacitor’s effective series resistance (ESR) determine the VCC ripple. In most applications, input capacitors in the range of 10µF to 100 µF with an ESR less than 0.3Ω work well up to a full 1.5A switch current. IIN IL CIN VIN + - RESR Figure 25. Boost Input Voltage and Current Ripple Waveforms Figure 26. Boost Circuit Effective Input Filter The situation is different in a flyback circuit. The input current is discontinuous and a significant pulsed current is seen by the input capacitors. Therefore, there are two requirements for capacitors in a flyback regulator: energy storage and filtering. To maintain a stable voltage supply to the chip, a storage capacitor larger than 20 µF with low ESR is required. To reduce the noise generated by the inductor, insert a 1.0µF ceramic capacitor between VCC and ground as close as possible to the chip. By examining the waveforms shown in Figure 27, we can see that the output voltage ripple comes from two Dec. 2010 - Rev. 1.2.1 - 13 - HTC 1.5A, 280kHz, Boost Regulator LM5171 major sources, namely capacitor ESR and the charging/discharging of the output capacitor. In boost circuits, when the power switch turns off, IL flows into the output capacitor causing an instant ΔV = IIN × ESR. At the same time, current IL − IOUT charges the capacitor and increases the output voltage gradually. VOUT Ripple IL Figure 27. Typical Output Voltage Ripple VOUT(RIPPLE)= (I IN - I OUT )(1 - D) I OUT D + + I × ESR (COUT )(f) (COUT )(f) IN The equation can be expressed more conveniently in terms of VCC, VOUT and IOUT for design purposes as follows : VOUT(RIPPLE) = The capacitor RMS ripple current is : I OUT (VOUT -V CC ) (I OUT )(VOUT )(ESR) 1 × + (COUT )(f) (COUT )(f) V CC I RIPPLE = (I IN - I OUT )2 (1 - D) + (I OUT ) 2 (D) = I OUT VOUT - VCC VCC Although the above equations apply only for boost circuits, similar equations can be derived for flyback circuits. Reducing the Current Limit In some applications, the designer may prefer a lower limit on the switch current than 1.5A. An external shunt can be connected between the VC pin and ground to reduce its clamp voltage. Consequently, the current limit of the internal power transistor current is reduced from its nominal value. The voltage on the VC pin can be evaluated with the equation VC = ISW RE AV where: RE=63mΩ, the value of the internal emitter resistor; AV=5V/V, the gain of the current sense amplifier. Since RE and AV cannot be changed by the end user, the only available method for limiting switch current below 1.5A is to clamp the VC pin at a lower voltage. If the maximum switch or inductor current is substituted into the equation above, the desired clamp voltage will result. A simple diode clamp, as shown in Figure 28 clamps the VC voltage to a diode drop above the voltage on resistor R3. Unfortunately, such a simple circuit is not generally acceptable if VIN is loosely regulated. Dec. 2010 - Rev. 1.2.1 - 14 - HTC 1.5A, 280kHz, Boost Regulator VIN VCC R2 LM5171 D1 VC R1 R3 C1 C2 Figure 28. Current Limiting using a Diode Clamp Another solution to the current limiting problem is to externally measure the current through the switch using a sense resistor. Such a circuit is illustrated in Figure 29. VCC PGND VIN + - AGND VC R1 R2 C1 C2 C3 RSENSE Q1 Output Ground Figure 29. Current Limiting using a Current Sense Resistor The switch current is limited to I SWITCH(PEAK) = VBE(Q1) RSENSE where: VBE(Q1) =the base-emitter voltage drop of Q1, typically 0.65V. The improved circuit does not require a regulated voltage to operate properly. Unfortunately, a price must be paid for this convenience in the overall efficiency of the circuit. The designer should note that the input and output grounds are no longer common. Also, the addition of the current sense resistor, RSENCE, results in a considerable power loss which increases with the duty cycle. Resistor R2 and capacitor C3 form a low-pass filter to remove noise. Dec. 2010 - Rev. 1.2.1 - 15 - HTC 1.5A, 280kHz, Boost Regulator Subharmonic Oscillation LM5171 Subharmonic oscillation (SHM) is a problem found in current-mode control systems, where instability results when duty cycle exceeds 50%. SHM only occurs in switching regulators with a continuous inductor current. This instability is not harmful to the converter and usually does not affect the output voltage regulation. SHM will increase the radiated EM noise from the converter and can cause, under certain circumstances, the inductor to emit high-frequency audible noise. SHM is an easily remedied problem. The rising slope of the inductor current is supplemented with internal “slope compensation” to prevent any duty cycle instability from carrying through to the next switching cycle. In the LM5171, slope compensation is added during the entire switch on-time, typically in the amount of 180mA/μs. In some cases, SHM can rear its ugly head despite the presence of the onboard slope compensation. The simple cure to this problem is more slope compensation to avoid the unwanted oscillation. In that case, an external circuit, shown in Figure 30, can be added to increase the amount of slope compensation used. This circuit requires only a few components and is “tacked on” to the compensation network. VSW VC VSW R1 C1 C2 R2 C3 R3 Figure 30. Technique for Increasing Slope Compensation The dashed box contains the normal compensation circuitry to limit the bandwidth of the error amplifier. Resistors R2 and R3 form a voltage divider off of the VSW pin. In normal operation, VSW looks similar to a square wave, and is dependent on the converter topology. Formulas for calculating VSW in the boost and flyback topologies are given in the section “VSW Voltage Limit.” The voltage on VSW charges capacitor C3 when the switch is off, causing the voltage at the VC pin to shift upwards. When the switch turns on, C3 discharges through R3, producing a negative slope at the VC pin. This negative slope provides the slope compensation. The amount of slope compensation added by this circuit is R3 f SW ΔI = VSW ( )(1 - e R3C3 f SW )( ) ΔT R 2 + R3 (1 - D)RE AV where: ΔI/ΔT = the amount of slope compensation added (A/s); VSW = the voltage at the switch node when the transistor is turned off (V); fSW = the switching frequency, typically 280 kHz; D = the duty cycle; RE = 63mΩ, the value of the internal emitter resistor; AV = 5V/V, the gain of the current sense amplifier. Dec. 2010 - Rev. 1.2.1 - 16 -(1 - D) - HTC 1.5A, 280kHz, Boost Regulator LM5171 In selecting appropriate values for the slope compensation network, the designer is advised to choose a convenient capacitor, then select values for R2 and R3 such that the amount of slope compensation added is 100 mA/μs. Then R2 may be increased or decreased as necessary. Of course, the series combination of R2 and R3 should be large enough to avoid drawing excessive current from VSW. Additionally, to ensure that the control loop stability is improved, the time constant formed by the additional components should be chosen such that R3 C 3 < 1- D f SW Finally, it is worth mentioning that the added slope compensation is a trade-off between duty cycle stability and transient response. The more slope compensation a designer adds, the slower the transient response will be, due to the external circuitry interfering with the proper operation of the error amplifier. Soft−Start Through the addition of an external circuit, a soft−start function can be added to the LM5171. Soft−start circuitry prevents the VC pin from slamming high during startup, thereby inhibiting the inductor current from rising at a high slope. This circuit, shown in Figure 31, requires a minimum number of components and allows the soft−start circuitry to activate any time the SS pin is used to restart the converter. VIN SS D1 4uA Test C3 Test Q VC R1 C1 C2 SS VCC Figure 31. Soft-Start Resistor R1 and capacitors C1 and C2 form the compensation network. At turn on, the voltage at the VC pin starts to come up, charging capacitor C3 through transistor Q, clamping the voltage at the VC pin such that switching begins when VC reaches the VC threshold, typically 1.05V Therefore, C3 slows the startup of the circuit by limiting the voltage on the VC pin. The soft−start time increases with the size of C3. Diode D1 discharges C3 when SS is low. If the shutdown function is not used with this part, the cathode of D1 should be connected to VIN. Calculating Junction Temperature To ensure safe operation of the LM5171, the designer must calculate the on−chip power dissipation and determine its expected junction temperature. Internal thermal protection circuitry will turn the part off once the Dec. 2010 - Rev. 1.2.1 - 17 - HTC 1.5A, 280kHz, Boost Regulator LM5171 junction temperature exceeds 180°C±30°. However, repeated operation at such high temperatures will ensure a reduced operating life. Calculation of the junction temperature is an imprecise but simple task. First, the power losses must be quantified. There are three major sources of power loss on the LM5171: • biasing of internal control circuitry, PBIAS • switch driver, PDRIVER • switch saturation, PSAT The internal control circuitry, including the oscillator and linear regulator, requires a small amount of power even when the switch is turned off. The specifications section of this datasheet reveals that the typical operating current, IQ, due to this circuitry is 5.5mA. Additional guidance can be found in the graph of operating current vs. temperature. This graph shows that IQ is strongly dependent on input voltage, VIN, and temperature. Then PBIAS = VIN IQ Since the onboard switch is an NPN transistor, the base drive current must be factored in as well. This current is drawn from the VIN pin, in addition to the control circuitry current. The base drive current is listed in the specifications as ΔICC/ΔISW, or switch transconductance. As before, the designer will find additional guidance in the graphs. With that information, the designer can calculate PDRIVER = VIN I SW × where: ISW = the current through the switch; D = the duty cycle or percentage of switch on−time. I CC ×D ΔI SW ISW and D are dependent on the type of converter. In a boost converter, I SW(AVG) ≈ I LOAD × D × D≈ In a flyback converter, 1 Efficiency VOUT - V IN VOUT I SW(AVG) ≈ D≈ VOUT I ILOAD 1 × V IN Efficiency VOUT NS V VOUT + N P IN The switch saturation voltage, V(CE)SAT, is the last major source of on−chip power loss. V(CE)SAT is the collector−emitter voltage of the internal NPN transistor when it is driven into saturation by its base drive current. The value for V(CE)SAT can be obtained from the specifications or from the graphs, as “Switch Saturation Voltage.” Thus, PSAT = V(CE)SAT ISW * D Dec. 2010 - Rev. 1.2.1 - 18 - HTC 1.5A, 280kHz, Boost Regulator Finally, the total on−chip power losses are LM5171 PD = PBIAS + PDRIVER + PSAT Power dissipation in a semiconductor device results in the generation of heat in the junctions at the surface of the chip. This heat is transferred to the surface of the IC package, but a thermal gradient exists due to the resistive properties of the package molding compound. The magnitude of the thermal gradient is expressed in manufacturers’ data sheets as θJA, or junction−to−ambient thermal resistance. The on−chip junction temperature can be calculated if θJA, the air temperature near the surface of the IC, and the on−chip power dissipation are known. TJ = TA + (PD • θJA) where: TJ = IC or FET junction temperature (°C); TA = ambient temperature (°C); PD = power dissipated by part in question (W); θJA = junction–to–ambient thermal resistance (°C/W). For the LM5171 θJA=165°C/W. Once the designer has calculated TJ, the question of whether the LM5171 can be used in an application is settled. If TJ exceeds 150°C, the absolute maximum allowable junction temperature, the LM5171 is not suitable for that application. If TJ approaches 150°C, the designer should consider possible means of reducing the junction temperature. Perhaps another converter topology could be selected to reduce the switch current. Increasing the airflow across the surface of the chip might be considered to reduce TA. Circuit Layout Guidelines In any switching power supply, circuit layout is very important for proper operation. Rapidly switching currents combined with trace inductance generates voltage transitions that can cause problems. Therefore the following guidelines should be followed in the layout. 1. In boost circuits, high AC current circulates within the loop composed of the diode, output capacitor, and on−chip power transistor. The length of associated traces and leads should be kept as short as possible. In the flyback circuit, high AC current loops exist on both sides of the transformer. On the primary side, the loop consists of the input capacitor, transformer, and on−chip power transistor, while the transformer, rectifier diodes, and output capacitors form another loop on the secondary side. Just as in the boost circuit, all traces and leads containing large AC currents should be kept short. 2. Separate the low current signal grounds from the power grounds. Use single point grounding or ground plane construction for the best results. 3. Locate the voltage feedback resistors as near the IC as possible to keep the sensitive feedback wiring short. Connect feedback resistors to the low current analog ground. Dec. 2010 - Rev. 1.2.1 - 19 - HTC