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74FCT807CTPYPI

74FCT807CTPYPI

  • 厂商:

    IDT

  • 封装:

  • 描述:

    74FCT807CTPYPI - FAST CMOS 1-TO-10 CLOCK DRIVER - Integrated Device Technology

  • 数据手册
  • 价格&库存
74FCT807CTPYPI 数据手册
IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 1-TO-10 CLOCK DRIVER IDT74FCT807BT/CT FEATURES: • • • • • • • • • • • • 0.5 MICRON CMOS Technology Guaranteed low skew < 250ps (max.) Very low duty cycle distortion < 350ps (max.) High speed: propagation delay < 2.5ns (max.) 100MHz operation TTL compatible inputs and outputs TTL level output voltage swings 1:10 fanout Output rise and fall time < 1.5ns (max) Low input capacitance: 4.5pF typical High drive: -32mA IOH, +48mA IOL Available in QSOP, SSOP, and SOIC packages DESCRIPTION: The FCT807T clock driver is built using advanced dual metal CMOS technology. This low skew clock driver features 1:10 fanout, providing minimal loading on the preceding drivers. The FCT807T offers low capacitance inputs with hysteresis for improved noise margins. TTL level outputs and multiple power and grounds reduce noise. The device also features -32/48mA drive capability for driving low impedance traces. FUNCTIONAL BLOCK DIAGRAM O1 PIN CONFIGURATION IN O2 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC O10 O9 GND O8 VCC O7 GND O6 O5 GND O1 O3 VCC O2 O4 GND O3 O5 VCC IN O4 O6 GND O7 O8 QSOP/ SOIC/ SSOP TOP VIEW O9 O 10 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 c 2006 Integrated Device Technology, Inc. The IDT logo is a registered trademark of Integrated Device Technology, Inc. MAY 2010 DSC-4242/4 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG IOUT Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max –0.5 to +7 –65 to +150 –60 to +120 Unit V °C mA CAPACITANCE (TA = +25OC, f = 1.0MHz) Symbol CIN C OUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. 6 8 Unit pF pF NOTE: 1. This parameter is measured at characterization but not tested. NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PIN DESCRIPTION Pin Names IN Ox Inputs Outputs Description DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0°C to +70°C, Industrial: TA = -40°C to +85°C, VCC = 5V ± 5% Symbol VIH VIL IIH IIL IOZH IOZL II VIK IOS VOH VOL I OFF VH ICCL ICCH ICCZ Parameter Input HIGH Level (Input pins) Input LOW Level Input HIGH Current (Input pins) Input LOW Current (Input pins) High Impedance Output Current (3-State Output pins) Input HIGH Current Clamp Diode Voltage Short Circuit Current(4) Output HIGH Voltage Output LOW Voltage Input/Output Power Off Leakage Input Hysteresis for all inputs Quiescent Power Supply Current VCC = Max., VI = VCC (Max.) VCC = Min., IIN = –18mA VCC = Max., VO = VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL VCC = 0V, VIN or VO ≤4.5V — VCC = Max., VIN = GND or VCC — — — — 150 5 ±1 — 500 µA mV µA GND(3) IOH = –15mA IOH = –32mA IOL = 48mA Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V Min. 2 — — — — — — — –60 2.4 2 — Typ.(2) — — — — — — — –0.7 –120 3.3 3 0.3 Max. — 0.8 ±1 ±1 ±1 ±1 ±1 –1.2 –225 — — 0.55 V µA V mA V Unit V V µA µA µA NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition should not exceed one second. 2 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ∆ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(3) VCC = Max. VIN = 3.4V VCC = Max. Input Toggling 50% Duty Cycle Outputs Open IC Total Power Supply Current(5) VCC = Max. Input Toggling 50% Duty Cycle Outputs Open fI = 50MHz NOTES: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 5V, +25°C ambient. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz. Test Conditions(1) Min. — Typ.(2) 0.5 0.4 Max. 2 0.6 Unit mA mA/MHz VIN = VCC VIN = GND — VIN = VCC VIN = GND VIN = 3.4V VIN = GND — 20 30.5(4) mA — 20.3 31.3(4) 3 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(3,4) Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) 50Ω to VCC/2, CL = 10pF (See figure 1) or 50Ω ac termination, CL = 10pF (See figure 2) f ≤ 100MHz Outputs connected in groups of two FCT807BT Min.(2) Max. 1.3 — — — — — 2.7 1.5 1.5 0.5 0.5 0.9 FCT807CT Min.(2) Max. 1.3 — — — — — 2.5 1.5 1.5 0.25 0.35 0.65 Unit ns ns ns ns ns ns Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) CL = 30pF f ≤ 67MHz (See figure 3) FCT807BT Min.(2) Max. 1.5 — — — — — 3.8 1.5 1.5 0.5 0.5 0.9 FCT807CT Min.(2) Max. 1.5 — — — — — 3.5 1.5 1.5 0.25 0.35 0.75 Unit ns ns ns ns ns ns FCT807BT Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade — 1 — Conditions(1) CL = 30pF f ≤ 40MHz (See figure 4) Min.(2) 1.5 — — — — Max. 3.8 1.5 1.5 0.5 0.6 FCT807CT Min.(2) 1.5 — — — — Max. 3.5 1.5 1.5 0.35 0.45 0.75 Unit ns ns ns ns ns ns NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 4 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL(3,4) FCT807BT Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) 50Ω to VCC/2, CL = 10pF (See figure 1) or 50Ω ac termination, CL = 10pF (See figure 2) f ≤ 100MHz Outputs connected in groups of two Min.(2) 1.3 — — — — — Max. 2.9 1.5 1.5 0.6 0.6 0.9 FCT807CT Min.(2) 1.3 — — — — — Max. 2.7 1.5 1.5 0.35 0.45 0.65 Unit ns ns ns ns ns ns Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) CL = 30pF f ≤ 67MHz (See figure 3) FCT807BT Min.(2) Max. 1.5 — — — — — 4 1.5 1.5 0.6 0.6 0.9 FCT807CT Min.(2) Max. 1.5 — — — — — 3.7 1.5 1.5 0.35 0.45 0.75 Unit ns ns ns ns ns ns Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) CL = 30pF f ≤ 40MHz (See figure 4) FCT807BT Min.(2) Max. 1.5 — — — — — 4 1.5 1.5 0.6 0.7 1 FCT807CT Min.(2) Max. 1.5 — — — — — 3.7 1.5 1.5 0.45 0.55 0.75 Unit ns ns ns ns ns ns NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 5 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES TEST CIRCUITS V CC V CC V CC 100 V IN Pulse Generator RT D.U.T. 100 1 0pF RT 220pF V OUT Pulse Generator V IN D.U.T. 50 10pF V OUT Fig. 1: 50Ω to VCC/2, CL = 10pF Fig. 2: 50Ω AC Termination, CL = 10pF The capacitor value for AC termination is determined by the operating frequency. For very low frequencies a higher capacitor value should be selected. V CC V CC V IN Pulse Generator RT D.U.T. V OUT Pulse Generator 30pF CL V IN D.U.T. V OUT 50pF RT CL Fig. 3: CL = 30pF Circuit Fig. 4: CL = 50pF Circuit V CC 500 V IN Pulse Generator RT D.U.T. 50pF CL 500 V OUT 7 .0V SWITCH POSITION Test Disable LOW Enable LOW Disable HIGH Enable HIGH Switch 6V GND DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Fig. 5: Enable and Disable Time Circuit 6 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES TEST WAVEFORMS 3V 1.5V INPUT tPLH tPHL VOH 2.0V OUTPUT tR tF 0.8V 1.5V VOL OUTPUT 2 tPLH2 tPHL2 tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| OUTPUT 1 tSK(o) tSK(o) 0V INPUT tPLH1 tPHL1 3V 1.5V 0V VOH 1.5V VOL VOH 1.5V VOL Package Delay Output Skew - tSK(O) INPUT tPLH tPHL 3V 1.5V 0V VOH 1.5V VOL INPUT tPLH1 tPHL1 3V 1.5V 0V VOH 1.5V VOL VOH 1.5V VOL PACKAGE 1 OUTPUT tSK(t) PACKAGE 2 OUTPUT tSK(t) OUTPUT tSK(p) = |tPHL tPLH| tPLH2 tPHL2 Pulse Skew - tSK(P) tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| Part-to-Part Skew - tSK(T) NOTE: 1. Package 1 and Package 2 are same device type and speed grade. ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY SWITCH LOW CLOSED t PZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 0V 3.5V 1.5V DISABLE 3V 1.5V 0V t PLZ 3.5V 0.3V t PHZ 0.3V VOH 0V VOL Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 7 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION IDT74FCT XXXX Device Type X Package X Temp. Range Blank I SO SOG PY PYG Q QG 807BT 807CT Commercial (0°C to +70°C) Industrial (-40°C to +85°C) Small Outline IC SOIC - Green Shrink Small Outline IC SSOP - Green Quarter-size Small Outline IC QSOP - Green 1-to-10 Clock Driver CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 8 for Tech Support: clockhelp@idt.com
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