9E4101YFILFT

DATASHEET Programmable Timing Control HubTM for Intel Systems Recommended Application: I-temp CK410 clock, Intel Yellow Cover part Output Features: • 2 - 0.7V current-mode differential CPU pairs • 6 - 0.7V current-mode differential SRC pair for SATA and PCI-E • 1 - 0.7V current-mode differential CPU/SRC selectable pair • 6 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - USB, 48MHz • 1 - DOT, 96MHz, 0.7V current differential pair • 1 - REF, 14.318MHz Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter = 2.0V to select TEST o Power-up w/ V < 2.0V to have pin function as FS_C. · When pin is FS_C, VIH_FS and VIL_FS levels apply. · FS_B/TEST_MODE is a low-threshold input o VIH_FS and VIL_FS levels apply. o TEST_MODE is a real time input · TEST_SEL can be invoked after power up through SMBus B6b6. o If TEST is selected by B6b6, only B6b7 controls TEST_MODE. The FS_B/TEST_Mode pin is not used. · Power must be cycled to exit TEST. 1 1 X 1 REF/N 0 X 1 0 HI-Z 0 X 1 1 REF/N B6b6: 1= ENTER TEST MODE, Default = 0 (NORMAL OPERATION) B6b7: 1= REF/N, Default = 0 (HI-Z) IDTTM Programmable Timing Control HubTM for Intel Systems 1408A—01/25/10 17 ICS9E4101 Programmable Timing Control HubTM for Intel Systems N c 56-Lead, 300 mil Body, 25 mil, SSOP SYMBOL A A1 b c D E E1 e h L N a VARIATIONS In Millimeters COMMON DIMENSIONS MIN MAX 2.41 2.80 0.20 0.40 0.20 0.34 0.13 0.25 SEE VARIATIONS 10.03 10.68 7.40 7.60 0.635 BASIC 0.38 0.64 0.50 1.02 SEE VARIATIONS 0° 8° In Inches COMMON DIMENSIONS MIN MAX .095 .110 .008 .016 .008 .0135 .005 .010 SEE VARIATIONS .395 .420 .291 .299 0.025 BASIC .015 .025 .020 .040 SEE VARIATIONS 0° 8° L INDEX AREA E1 E 12 D h x 45° α A A1 -Ce b SEATING PLANE .10 (.004) C N 56 D mm. MIN 18.31 MAX 18.55 MIN .720 D (inch) MAX .730 Reference Doc.: JEDEC Publication 95, MO-118 10-0034 Ordering Information 9E4101yFILFT Example: XXXX y F I LF T Designation for tape and reel packaging Lead Free, RoHS Compliant Industrial Temperature Range Package Type F = SSOP Revision Designator (will not correlate with datasheet revision) Device Type IDTTM Programmable Timing Control HubTM for Intel Systems 1408A—01/25/10 18 ICS9E4101 Programmable Timing Control HubTM for Intel Systems Revision History Rev. 0.1 0.2 0.3 0.4 0.5 A Issue Date 10/25/07 07/11/08 10/06/08 01/07/09 02/17/09 01/25/10 Description Initial Release Corrected operating temperature range on "Absolute Max" electrical characteristics table. Corrected ty po on ordering information. Removed "Advanced Information" from document header. Added thermal chars. Released to final. Updated document template. Page # 12 19 Various 12 Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 For Tech Support 408-284-6578 pcclockhelp@idt.com Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) Asia Pacific and Japan Integrated Device Technology Singapore (1997) Pte. Ltd. Reg. No. 199707558G 435 Orchard Road #20-03 Wisma Atria Singapore 238877 +65 6 887 5505 Europe IDT Europe, Limited Prime House Barnett Wood Lane Leatherhead, Surrey United Kingdom KT22 7DE +44 1372 363 339 TM © 2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA 19