BTS740S2_07

Smart High-Side Power Switch BTS740S2 6PDUW +LJK6LGH 3RZHU 6ZLWFK 7ZR &KDQQHOV  [ PΩ &XUUHQW 6HQVH 3URGXFW 6XPPDU\ 2SHUDWLQJ 9ROWDJH 9EERQ $FWLYH FKDQQHOV 2QVWDWH 5HVLVWDQFH 521 1RPLQDO ORDG FXUUHQW ,/120 &XUUHQW OLPLWDWLRQ ,/6&U RQH PΩ $ $ 9 WZR SDUDOOHO PΩ $ $ 3DFNDJH P-DSO-20-9 PG-DSO20 *HQHUDO 'HVFULSWLRQ • • 1 FKDQQHO YHUWLFDO SRZHU 026)(7 ZLWK FKDUJH SXPS JURXQG UHIHUHQFHG &026 FRPSDWLEOH LQSXW  GLDJQRVWLF IHHGEDFN DQG SURSRUWLRQDO ORDG FXUUHQW VHQVH PRQROLWKLFDOO\ LQWHJUDWHG LQ 6PDUW 6,3026 WHFKQRORJ\ 3URYLGLQJ HPEHGGHG SURWHFWLYH IXQFWLRQV $SSOLFDWLRQV • • • • —& FRPSDWLEOH KLJKVLGH SRZHU VZLWFK ZLWK GLDJQRVWLF IHHGEDFN IRU 9 DQG 9 JURXQGHG ORDGV $OO W\SHV RI UHVLVWLYH LQGXFWLYH DQG FDSDFLWYH ORDGV 0RVW VXLWDEOH IRU ORDGV ZLWK KLJK LQUXVK FXUUHQWV VR DV ODPSV 5HSODFHV HOHFWURPHFKDQLFDO UHOD\V IXVHV DQG GLVFUHWH FLUFXLWV %DVLF )XQFWLRQV • • • • &026 FRPSDWLEOH LQSXW 8QGHUYROWDJH DQG RYHUYROWDJH VKXWGRZQ ZLWK DXWRUHVWDUW DQG K\VWHUHVLV )DVW GHPDJQHWL]DWLRQ RI LQGXFWLYH ORDGV /RJLF JURXQG LQGHSHQGHQW IURP ORDG JURXQG 3URWHFWLRQ )XQFWLRQV • • • • • • • • 6KRUW FLUFXLW SURWHFWLRQ 2YHUORDG SURWHFWLRQ &XUUHQW OLPLWDWLRQ 7KHUPDO VKXWGRZQ 2YHUYROWDJH SURWHFWLRQ LQFOXGLQJ ORDG GXPS ZLWK H[WHUQDO UHVLVWRU 5HYHUVH EDWWHU\ SURWHFWLRQ ZLWK H[WHUQDO UHVLVWRU /RVV RI JURXQG DQG ORVV RI 9EE SURWHFWLRQ (OHFWURVWDWLF GLVFKDUJH SURWHFWLRQ (6' 9EE ,1 67 ,6 ,1 67 ,6 /RJLF &KDQQHO  /RJLF &KDQQHO  352)(7 *1' 287  /RDG  287  /RDG  'LDJQRVWLF )XQFWLRQV • • • • 3URSRUWLQDO ORDG FXUUHQW VHQVH 'LDJQRVWLF IHHGEDFN ZLWK RSHQ GUDLQ RXWSXW 2SHQ ORDG GHWHFWLRQ LQ 2))VWDWH ZLWK H[WHUQDO UHVLVWRU )HHGEDFN RI WKHUPDO VKXWGRZQ LQ 21VWDWH Data Sheet 1 V1.0, 2007-05-13 Smart High-Side Power Switch BTS740S2 )XQFWLRQDO GLDJUDP RYHUYROWDJH SURWHFWLRQ LQWHUQDO YROWDJH VXSSO\ ORJLF JDWH FRQWURO  FKDUJH SXPS WHPSHUDWXUH VHQVRU FXUUHQW OLPLW 9%% FODPS IRU LQGXFWLYH ORDG 287 ,1 67 ,6 *1' (6' 2SHQ ORDG GHWHFWLRQ &XUUHQW VHQVH 52 *1' Channel 1 /2$' ,1 67 ,6 *1' Control and protection circuit of channel 2 287 PROFET Pin Definitions and Functions Pin 1,10, 11,12, 15,16, 19,20 3 7 17,18 13,14 Symbol Function Vbb Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance IN1 Input 1,2, activates channel 1,2 in case of IN2 logic high signal OUT1 Output 1,2, protected high-side power output OUT2 of channel 1,2. Both pins of each output have to be connected in parallel for operation according ths spec (e.g. kilis). Design the wiring for the max. short circuit current ST1 Diagnostic feedback 1,2 of channel 1,2, ST2 open drain, invers to input level GND1 Ground 1 of chip 1 (channel 1) GND2 Ground 2 of chip 2 (channel 2) IS1 Sense current output 1,2; proportional to the load current, zero in the case of current IS2 limitation of the load current 2 Pin configuration (top view) 4 8 2 6 5 9 Vbb GND1 IN1 ST1 IS1 GND2 IN2 ST2 IS2 Vbb 1 2 3 4 5 6 7 8 9 10 • 20 19 18 17 16 15 14 13 12 11 Vbb Vbb OUT1 OUT1 Vbb Vbb OUT2 OUT2 Vbb Vbb Data Sheet V1.0, 2007-05-13 Smart High-Side Power Switch BTS740S2 Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 5) Supply voltage for full short circuit protection Tj,start = -40 ...+150°C Load current (Short-circuit current, see page 5) Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V RI2) = 2 Ω, td = 200 ms; IN = low or high, each channel loaded with RL = 7.0 Ω, Operating temperature range Storage temperature range Power dissipation (DC)4) Ta = 25°C: (all channels active) Ta = 85°C: Maximal switchable inductance, single pulse Vbb = 12V, Tj,start = 150°C4), IL = 5.5 A, EAS = 370 mJ, 0 Ω one channel: IL = 8.5 A, EAS = 790 mJ, 0 Ω two parallel channels: see diagrams on page 10 Symbol Values 43 34 self-limited 60 -40 ...+150 -55 ...+150 3.8 2.0 Unit V V A V °C W Vbb Vbb IL VLoad dump3) Tj Tstg Ptot ZL 18 16 1.0 4.0 8.0 -10 ... +16 ±2.0 ±5.0 ±14 mH Electrostatic discharge capability (ESD) IN: VESD (Human Body Model) ST, IS: out to all other pins shorted: acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 R=1.5kΩ; C=100pF kV nput voltage (DC) Current through input pin (DC) Current through status pin (DC) Current through current sense pin (DC) see internal circuit diagram page 9 VIN IIN IST IIS V mA Thermal Characteristics Parameter and Conditions Symbol min Thermal resistance junction - soldering point4),5) each channel: Rthjs 4) junction - ambient one channel active: Rthja all channels active: ---Values typ Max -40 33 12 --Unit K/W Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended. ) R = internal resistance of the load dump test pulse generator I )V Load dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 ) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for V bb connection PCB is vertical without blown air See page 15 Data Sheet 3 V1.0, 2007-05-13 ) Smart High-Side Power Switch BTS740S2 Parameter and Conditions, each of the two channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT); IL = 5 A each channel, Tj = 25°C: RON Tj = 150°C: two parallel channels, Tj = 25°C: Output voltage drop limitation at small load currents, see page 14 IL = 0.5 A Tj =-40...+150°C: -- 27 54 14 30 60 15 --- mΩ VON(NL) -4.9 7.8 -25 25 0.1 0.1 50 5.5 8.5 -70 80 --- mV A Nominal load current one channel active: IL(NOM) two parallel channels active: Device on PCB6), Ta = 85°C, Tj ≤ 150°C Output current while GND disconnected or pulled up7); IL(GNDhigh) Vbb = 30 V, VIN = 0, see diagram page 10 Turn-on time8) IN 8 150 200 1 1 mA µs Turn-off time IN RL = 12 Ω Slew rate on 8) 10 to 30% VOUT, RL = 12 Ω: Slew rate off 8) 70 to 40% VOUT, RL = 12 Ω: Operating Parameters Operating voltage9) Undervoltage shutdown Undervoltage restart to 90% VOUT: ton to 10% VOUT: toff dV/dton -dV/dtoff V/µs V/µs Vbb(on) Vbb(under) Tj =-40...+25°C: Vbb(u rst) Tj =+150°C: Undervoltage restart of charge pump see diagram page 13 Tj =-40...+25°C: Vbb(ucp) Tj =150°C: Undervoltage hysteresis ∆Vbb(under) ∆Vbb(under) = Vbb(u rst) - Vbb(under) 5.0 3.2 ----34 33 --4.5 4.7 -0.5 --- 34 5.0 5.5 6.0 6.5 7.0 -43 -- V V V V V V V Overvoltage shutdown Overvoltage restart 6) 7) 8) 9) Vbb(over) Vbb(o rst) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 15 not subject to production test, specified by design See timing diagram on page 11. At supply voltage increase up to Vbb= 4.7 V typ without charge pump, VOUT ≈Vbb - 2 V 4 V1.0, 2007-05-13 Data Sheet Smart High-Side Power Switch BTS740S2 Parameter and Conditions, each of the two channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max -41 43 ---1 -47 8 24 ---52 30 50 20 Unit ∆Vbb(over) Tj =-40: Vbb(AZ) Ibb=40 mA Tj =+25...+150°C: Standby current11) Tj =-40°C...25°C: Ibb(off) VIN = 0; Tj =150°C: Leakage output current (included in Ibb(off)) IL(off) VIN = 0 Operating current 12), VIN = 5V, IGND = IGND1 + IGND2, one channel on: IGND two channels on: Overvoltage hysteresis Overvoltage protection10) Protection Functions13) Current limit, (see timing diagrams, page 12) V V µA µA --- 1.2 2.4 3 6 mA Tj =-40°C: IL(lim) Tj =25°C: Tj =+150°C: Repetitive short circuit current limit, Tj = Tjt each channel IL(SCr) two parallel channels (see timing diagrams, page 12) 48 40 31 ---- 56 50 37 24 24 2.0 65 58 45 ---- A A Initial short circuit shutdown time Tj,start =25°C: toff(SC) ms (see timing diagrams on page 12) Output clamp (inductive load switch off)14) at VON(CL) = Vbb - VOUT, IL= 40 mA Tj =-40°C: VON(CL) Tj =25°C...150°C: Thermal overload trip temperature Tjt Thermal hysteresis ∆Tjt 41 43 150 -- -47 -10 -52 --- V °C K 10) 11) 12) 13 14) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω resistor in the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram page 9. Measured with load; for the whole device; all channels off Add IST, if IST > 0 Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL) 5 V1.0, 2007-05-13 Data Sheet Smart High-Side Power Switch BTS740S2 Parameter and Conditions, each of the two channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Reverse Battery Reverse battery voltage 15) Drain-source diode voltage (Vout > Vbb) IL = - 4.0 A, Tj = +150°C Diagnostic Characteristics Current sense ratio16), static on-condition, VIS = 0...5 V, Vbb(on) = 6.517)...27V, kILIS = IL / IIS Tj = -40°C, IL = 5 A: -Vbb -VON --- -600 32 -- V mV kILIS Tj= -40°C, IL= 0.5 A: Tj= 25...+150°C, IL= 5 A: Tj= 25...+150°C, IL = 0.5 A: Current sense output voltage limitation Tj = -40 ...+150°C IIS = 0, IL = 5 A: 4350 3100 4350 3800 4800 4800 4800 4800 6.1 ----30 10 3 15 5800 7800 5350 6300 6.9 1 15 10 300 100 -4 40 V µA VIS(lim) IIS(LL) IIS(LH) IIS(SH) 18) tson(IS) 5.4 0 0 0 ---2 5 Current sense leakage/offset current Tj = -40 ...+150°C VIN=0, VIS = 0, IL = 0: VIN=5 V, VIS = 0, IL = 0: VIN=5 V, VIS = 0, VOUT = 0 (short circuit) Current sense settling time to IIS static±10% after 5A positive input slope18), IL = 0 µs µs µs V kΩ Current sense settling time to 10% of IIS static after 0A tsoff(IS) negative input slope18), IL = 5 Current sense rise time (60% to 90%) after change 5A tslc(IS) of load current18) IL = 2.5 Open load detection voltage19) (off-condition) Internal output pull down (pin 17,18 to 2 resp. 13,14 to 6), VOUT=5 V VOUT(OL) RO Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 9). 16) This range for the current sense ratio refers to all devices. The accuracy of the k can be raised at least by ILIS a factor of two by matching the value of kILIS for every single device. In the case of current limitation the sense current IIS is zero and the diagnostic feedback potential VST is High. See figure 2c, page 12. 17) Valid if V bb(u rst) was exceeded before. 18) not subject to production test, specified by design 19) External pull up resistor required for open load detection in off state Data Sheet 6 V1.0, 2007-05-13 15) Smart High-Side Power Switch BTS740S2 Parameter and Conditions, each of the two channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Input and Status Feedback20) Input resistance (see circuit page 9) RI VIN(T+) VIN(T-) ∆ VIN(T) IIN(off) IIN(on) td(ST OL3) tdon(ST) tdoff(ST) 3.0 -1.5 -1 20 -- 4.5 --0.5 -50 400 7.0 3.5 --50 90 -- kΩ V V V µA µA µs µs µs V Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Off state input current VIN = 0.4 V: On state input current VIN = 5 V: Delay time for status with open load after Input neg. slope (see diagram page 13) Status delay after positive input slope (not subject to production test, specified by design) --5.4 ---- 13 1 6.1 ---- --6.9 0.4 0.7 2 Status delay after negative input slope (not subject to production test, specified by design) Status output (open drain) Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: VST(high) ST low voltage Tj =-40...+25°C, IST = +1.6 mA: VST(low) Tj = +150°C, IST = +1.6 mA: Status leakage current, VST = 5 V, Tj=25 ... +150°C: IST(high) µA 20) If ground resistors RGND are used, add the voltage drop across these resistors. Data Sheet 7 V1.0, 2007-05-13 Smart High-Side Power Switch BTS740S2 Truth Table Input 1 Input 2 level Normal operation Currentlimitation Short circuit to GND Overtemperature Short circuit to Vbb Open load Undervoltage Overvoltage L H L H L H L H L H L H L H L H L Output 1 Output 2 level L H L H L L21) L L H H L24) H L L L L L Status 1 Status 2 level H L H H H H H H L22) L H (L25)) L H L H L H Current Sense 1 Current Sense 2 IIS 0 nominal 0 0 0 0 0 0 0 P$@                   ,/  >$@  Figure 9a: Output voltage drop versus load current: 921 , ,6 >9@  521  9211/ ,/         >$@   26 This range for the current sense ratio refers to all devices. The accuracy of the kILIS can be raised at 14 V1.0, 2007-05-13 Data Sheet Smart High-Side Power Switch BTS740S2 Package Outlines 2.65 max 0.35 x 45˚ 2.45 -0.2 0.2 -0.1 1.27 0.35 +0.15 2) 0.4 +0.8 0.2 24x 20 11 0.1 10.3 ±0.3 GPS05094 1 12.8 1) 10 -0.2 Index Marking 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Figure 1 PG-DSO-20 (Plastic Dual Small Outline Package) (RoHS-compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pbfree finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Please specify the package needed (e.g. green package) when placing an order You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Data Sheet 17 0.23 +0.0 9 8˚ ma x 7.6 -0.2 1) Dimensions in mm V1.0, 2007-05-13 Smart High-Side Power Switch BTS740S2 Revision History Version 1.0 Date 2007-05-13 Changes Creation of the green datasheet. Data Sheet 18 V1.0, 2007-05-13 Edition 2007-05-13 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 5/13/07. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.