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CA1523E

CA1523E

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    CA1523E - Voltage Regulator Control Circuit for Variable Switching Regulator - Intersil Corporation

  • 数据手册
  • 价格&库存
CA1523E 数据手册
® November 2000 UCT MEN T RO D E TE P EPLAC nter at E S OL D E D R t Ce m/tsc or OB Supp M EN il.co COM chnical w.inters RE NO r Te or ww ct ou IL onta INTERS c 881-8 CA1523 Voltage Regulator Control Circuit for Variable Switching Regulator Features • Operates up to 200kHz • Pins ESD Protected • Remote ON/OFF • Slow Start with Reset • Overcurrent Sensing • Lower Peak Currents than PWM Regulator - Less Prone to Magnetic Saturation Description The CA1523 monolithic silicon integrated circuit is a variable interval pulse regulator designed to provide the control circuitry for use in switching regulator circuits. It operates from 11V to 15V. The regulator provides a single output drive capable of 300mA source/200mA sink. The maximum operating frequency is better than 200kHz. An attractive feature of the CA1523 is that the timing capacitor charge and discharge current is set up externally via a single resistor. The ratio of charge to discharge current is internally set at a maximum of 2 to 1 allowing simultaneous change in output pulse width with increased frequency at higher load. The pulse width variation at higher frequencies effectively compensates for the losses in magnetics and thereby increases the power supply efficiency at higher load end by as much as 20 percent. Part Number Information PART NUMBER CA1523E TEMPERATURE RANGE 0oC to +70oC PACKAGE 14 Lead Plastic DIP Pinout CA1523 (PDIP) TOP VIEW ERROR CURRENT SENSE GND RISE TIME OUTPUT GND OUTPUT VCC 1 2 3 4 5 6 7 14 TIMING 13 ZENER 12 ON/OFF 11 OVER CURRENT 10 SLOW START 9 8 LOGIC OUTPUT NC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved 1 File Number 1785.3 Specifications CA1523 Absolute Maximum Ratings DC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V Supply Current |6(MAX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50mA |6(MAX), 1µs,1800pF Load . . . . . . . . . . . . . . . . . . . . +300, -200mA Device Dissipation Up to TA = 70oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 530mW Above TA = 70oC . . . . . . . . . . . . . . Derate Linearly at 6.7mW/oC Thermal Information Thermal Resistance θJA Plastic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . 120oC/W Device Dissipation Up to TA = 70oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 665mW Ambient Temperature Range Operating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +150oC Lead Temperature (During Soldering) At distance 1/16 ± in. (1.59mm ±0.79mm) from case for 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications TA = +25oC, Refer to condition shown in test circuit; V7 = 13V, V1 = 5.9V Unless Otherwise Specified PARAMETERS POWER SUPPLY, VCC (PIN 7) Supply Voltage Supply Current Zener Voltage OUTPUT PULSE (PIN 6) Maximum Pulse Width Minimum Pulse Width Output High Voltage Output Low Voltage Rise Time Fall Time ERROR VOLTAGE RANGE (PIN 1) Error Voltage Reference 1 Adjust R T; Observe Pin 6 Min/Max Frequency Range 5.9 6.8 7.5 V 6 6 6 6 6 6 Measured at 6V Threshold Level Measured at 6V Threshold Level |6 = 0mA, V4 = 0V |6 = 50mA, V12 = 0V Measured at 1.8V and 10V Threshold Levels Measured at 1.8V and 10V Threshold Levels 5.5 2 11.1 0.6 250 50 6.5 3 12 1 600 200 7.5 4 12.6 1.3 1250 350 µs µs V V ns ns 7 7 13 VCC = +13V 9.5 20 7.8 13 27 8.4 34 8.9 V mA V PIN TEST CONDITIONS MIN TYP MAX UNITS CHARGE CURRENT (PIN 14) Charge Current Discharge Current Slow Start Discharge Current 14 14 14 Adjust RT , V1 = 7.5V; Set V14 = 0V, Then V14 = 2.5V Adjust R T = 5.9V; Set V14 = 5.5V, Then 5V Maintain V14 = 5V, V10 = 5.5V Set V10 = 5.5V, Measure I14 (Hi) Set V10 = 4V, Measure I14 (Lo) Limits = I14 (Hi) - I14 (Lo) 1.5 190 95 20 220 110 30 250 125 40 µA µA µA/V LOGIC TESTS Discharge Voltage Output Inhibit Voltage Overcurrent Trip Voltage 10 7 11 Pin 12 = 1kΩ to GND Increase V7 Until V9 ≥ 2V V12 = 5V; V10 = 0V; Increase V11 Until V9 ≤ 0.5V 1.7 7.9 1.1 2.4 8.4 1.25 3.2 9.1 1.4 V V V 2 CA1523 Other Desirable Features Other desirable features along with various circuit block function explanations are listed below. • The Oscillator is a sawtooth generator whose charge (rise) cycle determines the output pulse width and discharge which is continuously variable from very low to maximum of ICHARGE. • Charge ICHARGE = IO -IDISCHARGE giving 2 to 1 pulse-width control • Discharge IDISCHARGE = approximately 0 to 1/2 IO to frequency control. • Pulse Shaping: Applied to the oscillator output via RS Flip-Flop with parallel inhibit controlled by slow-start overcurrent sense, supply voltage monitor and ON/OFF functions. • Pulse Rise Time: Modified to meet RFI requirements by external slow-down capacitor. • Slow Start with Reset: Externally programmed against internal 3V reference. Reset is initiated upon Inhibit ensuring soft start at power up and restart. • Over Current Sense: Internal stable thresholds of 1.2V. • Supply Voltage Monitors: Locks out the drive until VSUPPLY has reached 8V-9V. • ON/OFF: Activates regulator independent of raw DC. • Error Amplifier: Compares output against a stable 6.8V internal reference and controls the discharge current sink on the timing capacitor. • Band-Gap: Reference voltage (internal) provides temperature compensated 1.2V and 6.8V references. • Separate GND: The power GND is separated from circuit ground for improved noise. • ESD Protection: Pins are protected against ESD. Block Diagram CURRENT SENSE 2 VCC 7 ZENER 13 CURRENT SETUP IC/2 S1 +6.8V REF. IC VCC REF. VOLTAGE SOURCES 5V REF. Q HIGH CLOSES S1 VL 2.5V ID ID ~ I C/2 FOR VI 8.4V R 11 OVER CURRENT OUTPUT GND 1 ERROR VOLTAGE 6.8V REF. + S2 OPEN WHEN VIO > 6 .8V 14 TIMING CAP 3V REF. - + 3 GND (CONTROL CIRCUIT GND) S3 3K 1.2V REF. + Q LOW CLOSES S3 10 SLOW START 12 ON/OFF 9 LOGIC OUT 3 CA1523 VCC 56K 0.0033µF 2 CHARGE CURRENT CURRENT SET UP IC VCC VCC 1 5K ERROR VOLTAGE 1 20K TRIM RES. I C/ 2 S1 +6.8V REF Q HIGH CLOSES S1 VL 2.5V 5V REF RISE/FALL + 7 + 13 ZENER REF. VOLT. SOURCES 8 NC - S Q 4 47pF PULSE OUTPUT 6 1800pF RT F/F 6.8V REF S2 S2 OPEN WHEN V10 > 6.8V 3V REF. ID IC/2 ˜ FOR VI
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