HIN211E

® HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Data Sheet November 4, 2005 FN4315.16 ±15kV, ESD-Protected, +5V Powered, RS-232 Transmitters/Receivers The HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E family of RS-232 transmitters/receivers interface circuits meet all ElA high-speed RS-232E and V.28 specifications, and are particularly suited for those applications where ±12V is not available. A redesigned transmitter circuit improves data rate and slew rate, which makes this suitable for ISDN and high speed modems. The transmitter outputs and receiver inputs are protected to ±15kV ESD (Electrostatic Discharge). They require a single +5V power supply and feature onboard charge pump voltage converters which generate +10V and -10V supplies from the 5V supply. The family of devices offers a wide variety of high-speed RS-232 transmitter/receiver combinations to accommodate various applications (see Selection Table). The HIN206E, HIN211E and HIN213E feature a low power shutdown mode to conserve energy in battery powered applications. In addition, the HIN213E provides two active receivers in shutdown mode allowing for easy “wakeup” capability. The drivers feature true TTL/CMOS input compatibility, slew rate-limited output, and 300Ω power-off source impedance. The receivers can handle up to ±30V input, and have a 3kΩ to 7kΩ input impedance. The receivers also feature hysteresis to greatly improve noise rejection. Features • Pb-Free Plus Anneal Available (RoHS Compliant) • High Speed ISDN Compatible . . . . . . . . . . . . . 230kbits/s • ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000) • Meets All RS-232E and V.28 Specifications • Requires Only 0.1µF or Greater External Capacitors • Two Receivers Active in Shutdown Mode (HIN213E) • Requires Only Single +5V Power Supply • Onboard Voltage Doubler/Inverter • Low Power Consumption (Typ) . . . . . . . . . . . . . . . . . 5mA • Low Power Shutdown Function (Typ) . . . . . . . . . . . . .1µA • Three-State TTL/CMOS Receiver Outputs • Multiple Drivers - ±10V Output Swing for +5V Input - 300Ω Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible • Multiple Receivers - ±30V Input Voltage Range - 3kΩ to 7kΩ Input Impedance - 0.5V Hysteresis to Improve Noise Rejection Applications • Any System Requiring High-Speed RS-232 Communications Port - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation, UPS - Modems, ISDN Terminal Adaptors Selection Table PART NUMBER HIN202E HIN206E HIN207E HIN208E HIN211E HIN213E HIN232E POWER SUPPLY VOLTAGE +5V +5V +5V +5V +5V +5V +5V NUMBER OF RS-232 DRIVERS 2 4 5 4 4 4 2 NUMBER OF RS-232 RECEIVERS 2 3 3 4 5 5 2 NUMBER OF 0.1µF EXTERNAL CAPACITORS 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors LOW POWER SHUTDOWN/TTL THREE-STATE No/No Yes/Yes No/No No/No Yes/Yes Yes/Yes No/No NUMBER OF RECEIVERS ACTIVE IN SHUTDOWN 0 0 0 0 0 2 0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Ordering Information PART NO. HIN202ECB HIN202ECB-T HIN202ECBZ (Note) HIN202ECBZ-T (Note) HIN202ECBN HIN202ECBN-T HIN202ECBNZ (Note) PART MARKING HIN202ECB HIN202ECB 202ECBZ 202ECBZ TEMP. RANGE (°C) PACKAGE PKG. DWG. # Ordering Information (Continued) PART NO. PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # M24.209 M24.209 M24.209 M24.209 M24.3 M24.3 M24.3 M24.3 M24.209 M24.209 M24.209 M24.3 M24.3 M24.3 M24.3 M24.209 M24.209 M24.209 M24.209 M24.209 M24.3 M24.3 M24.3 M24.3 M24.209 M24.209 0 to 70 16 Ld SOIC (W) M16.3 16 Ld SOIC (W) Tape and M16.3 Reel 0 to 70 16 Ld SOIC (W) M16.3 (Pb-free) 16 Ld SOIC (W) Tape and M16.3 Reel (Pb-free) HIN206EIAZA-T HIN206EIAZ (Note) HIN207ECA-T HIN207ECAZ (Note) HIN207ECAZ-T (Note) HIN207ECB HIN207ECB-T HIN207ECBZ (Note) HIN207ECBZ-T (Note) HIN207EIA HIN207EIAZ (Note) HIN207EIAZ-T (Note) HIN207EIB HIN207EIB-T HIN207EIBZ (Note) HIN207EIBZ-T (Note) HIN208ECA HIN208ECA-T HIN208ECAZ (Note) HIN208ECAZ-T (Note) HIN207ECA HIN207ECAZ 24 Ld SSOP Tape and Reel (Pb-free) 24 Ld SSOP Tape and Reel 0 to 70 24 Ld SSOP (Pb-free) HIN202ECBN 0 to 70 16 Ld SOIC (N) M16.15 HIN202ECBN 16 Ld SOIC (N) Tape and M16.15 Reel 202ECBNZ 0 to 70 16 Ld SOIC (N) M16.15 (Pb-free) 16 Ld SOIC (N) Tape and M16.15 Reel (Pb-free) 0 to 70 16 Ld PDIP 0 to 70 16 Ld PDIP* (Pb-free) E16.3 E16.3 HIN207ECAZ 24 Ld SSOP Tape and Reel (Pb-free) HIN207ECB HIN207ECB HIN207ECBZ 0 to 70 24 Ld SOIC 24 Ld SOIC Tape and Reel 0 to 70 24 Ld SOIC (Pb-free) HIN202ECBNZ-T 202ECBNZ (Note) HIN202ECP HIN202ECPZ (Note) HIN202EIB HIN202EIB-T HIN202EIBZ (Note) HIN202EIBZ-T (Note) HIN202EIBN HIN202EIBN-T HIN202EIBNZ (Note) HIN202ECP 202ECPZ HIN202EIB HIN202EIB 202EIBZ 202EIBZ HIN207ECBZ 24 Ld SOIC Tape and Reel (Pb-free) HIN207EIA HIN207EIAZ HIN207EIAZ HIN207EIB HIN207EIB HIN207EIBZ HIN207EIBZ HIN208ECA HIN208ECA HIN208ECAZ -40 to 85 24 Ld SSOP -40 to 85 24 Ld SSOP (Pb-free) 24 Ld SSOP Tape and Reel (Pb-free) -40 to 85 24 Ld SOIC 24 Ld SOIC Tape and Reel -40 to 85 24 Ld SOIC (Pb-free) 24 Ld SOIC Tape and Reel (Pb-free) 0 to 70 24 Ld SSOP 24 Ld SSOP Tape and Reel 0 to 70 24 Ld SSOP (Pb-free) -40 to 85 16 Ld SOIC (W) M16.3 16 Ld SOIC (W) Tape and M16.3 Reel -40 to 85 16 Ld SOIC (W) M16.3 (Pb-free) 16 Ld SOIC (W) Tape and M16.3 Reel (Pb-free) HIN202EIBN -40 to 85 16 Ld SOIC (N) M16.15 HIN202EIBN 16 Ld SOIC (N) Tape and M16.15 Reel 202EIBNZ -40 to 85 16 Ld SOIC (N) M16.15 (Pb-free) 16 Ld SOIC (N) Tape and M16.15 Reel (Pb-free) 0 to 70 24 Ld SOIC 24 Ld SOIC Tape and Reel 0 to 70 24 Ld SOIC (Pb-free) M24.3 M24.3 M24.3 M24.3 M24.209 M24.209 M24.209 M24.209 HIN202EIBNZ-T 202EIBNZ (Note) HIN206ECB HIN206ECB-T HIN206ECBZ (Note) HIN206ECBZ-T (Note) HIN206EIA HIN206EIAZ (Note) HIN206EIAZ-T (Note) HIN206EIAZA (Note) HIN206ECB HIN206ECB HIN206ECBZ HIN208ECAZ 24 Ld SSOP Tape and Reel (Pb-free) HIN208ECAZA-T HIN208ECAZ 24 Ld SSOP Tape and (Note) Reel (Pb-free) HIN208ECB HIN208ECB-T HIN208ECBZ (Note) HIN208ECBZ-T (Note) HIN208EIA HIN208EIA-T HIN208ECB HIN208ECB HIN208ECBZ 0 to 70 24 Ld SOIC 24 Ld SOIC Tape and Reel 0 to 70 24 Ld SOIC (Pb-free) HIN206ECBZ 24 Ld SOIC Tape and Reel (Pb-free) HIN206EIA HIN206EIAZ HIN206EIAZ HIN206EIAZ -40 to 85 24 Ld SSOP -40 to 85 24 Ld SSOP (Pb-free) 24 Ld SSOP Tape and Reel (Pb-free) -40 to 85 24 Ld SSOP (Pb-free) HIN208ECBZ 24 Ld SOIC Tape and Reel (Pb-free) HIN208EIA HIN208EIA -40 to 85 24 Ld SSOP 24 Ld SSOP Tape and Reel 2 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Ordering Information (Continued) PART NO. HIN208EIAZ (Note) HIN208EIAZ-T (Note) HIN208EIB HIN208EIBZ (Note) HIN211ECA HIN211ECA-T HIN211ECAZ (Note) HIN211ECAZ-T (Note) HIN211ECB HIN211ECBZ (Note) HIN211ECBZ-T (Note) HIN211EIA HIN211EIA-T HIN211EIAZ (Note) HIN211EIAZ-T (Note) HIN211EIB HIN211EIBZ (Note) HIN213ECA HIN213ECA-T HIN213ECAZ (Note) HIN213ECAZ-T (Note) HIN213EIA HIN213EIA-T HIN213EIAZ (Note) HIN213EIAZ-T (Note) HIN213EIB HIN213EIBZ (Note) PART MARKING HIN208EIAZ HIN208EIAZ HIN208EIB HIN208EIBZ HIN211ECA HIN211ECA HIN211ECAZ TEMP. RANGE (°C) PACKAGE PKG. DWG. # M24.209 M24.209 M24.3 M24.3 M28.209 M28.209 M28.209 M28.209 M28.3 M28.3 M28.3 M28.209 M28.209 M28.209 M28.209 M28.3 M28.3 M28.209 M28.209 M28.209 M28.209 M28.209 M28.209 M28.209 M28.209 M28.3 M28.3 HIN232EIBNZ (Note) HIN232ECBNZ (Note) HIN232ECBN HIN232ECBN-T HIN232ECAZ-T (Note) HIN232ECB HIN232ECB-T Ordering Information (Continued) PART NO. HIN232ECA HIN232ECA-T PART MARKING HIN232ECA HIN232ECA TEMP. RANGE (°C) PACKAGE PKG. DWG. # M16.209 M16.209 M16.209 -40 to 85 24 Ld SSOP (Pb-free) 24 Ld SSOP Tape and Reel (Pb-free) -40 to 85 24 Ld SOIC -40 to 85 24 Ld SOIC (Pb-free) 0 to 70 28 Ld SSOP 28 Ld SSOP Tape and Reel 0 to 70 28 Ld SSOP (Pb-free) 0 to 70 16 Ld SSOP 16 Ld SSOP Tape and Reel HIN232ECAZ 16 Ld SSOP Tape and Reel (Pb-free) HIN232ECB HIN232ECB 0 to 70 16 Ld SOIC (W) M16.3 16 Ld SOIC (W) Tape and M16.3 Reel HIN232ECBN 0 to 70 16 Ld SOIC (N) M16.15 HIN232ECBN 16 Ld SOIC (N) Tape and M16.15 Reel 232ECBNZ 0 to 70 16 Ld SOIC (N) M16.15 (Pb-free) 16 Ld SOIC (N) Tape and M16.15 Reel (Pb-free) 0 to 70 16 Ld SOIC (W) M16.3 (Pb-free) 16 Ld SOIC (W) Tape and M16.3 Reel (Pb-free) 0 to 70 16 Ld PDIP 0 to 70 16 Ld PDIP* (Pb-free) E16.3 E16.3 HIN211ECAZ 28 Ld SSOP Tape and Reel (Pb-free) HIN211ECB HIN211ECBZ 0 to 70 28 Ld SOIC 0 to 70 28 Ld SOIC (Pb-free) HIN232ECBNZ-T 232ECBNZ (Note) HIN232ECBZ (Note) HIN232ECBZ-T (Note) HIN232ECP HIN232ECPZ (Note) HIN232EIBN HIN232EIBN-T 232ECBZ 232ECBZ HIN232ECP HIN232ECPZ HIN211ECBZ 28 Ld SOIC Tape and Reel (Pb-free) HIN211EIA HIN211EIA HIN211EIAZ HIN211EIAZ HIN211EIB HIN211EIBZ HIN213ECA HIN213ECA HIN213ECAZ -40 to 85 28 Ld SSOP 28 Ld SSOP Tape and Reel -40 to 85 28 Ld SSOP (Pb-free) 28 Ld SSOP Tape and Reel (Pb-free) -40 to 85 28 Ld SOIC -40 to 85 28 Ld SOIC (Pb-free) 0 to 70 28 Ld SSOP 28 Ld SSOP Tape and Reel 0 to 70 28 Ld SSOP (Pb-free) HIN232EIBN -40 to 85 16 Ld SOIC (N) M16.15 HIN232EIBN 16 Ld SOIC (N) Tape and M16.15 Reel 232EIBNZ -40 to 85 16 Ld SOIC (N) M16.15 (Pb-free) 16 Ld SOIC (N) Tape and M16.15 Reel (Pb-free) -40 to 85 16 Ld TSSOP 16 Ld TSSOP Tape and Reel -40 to 85 16 Ld TSSOP (Pb-free) 16 Ld TSSOP Tape and Reel (Pb-free) M16.173 M16.173 M16.173 M16.173 HIN232EIBNZ-T 232EIBNZ (Note) HIN232EIV HIN232EIV-T HIN232EIVZ (Note) HIN232EIVZ-T (Note) HIN232EIV HIN232EIV 232EIVZ 232EIVZ HIN213ECAZ 28 Ld SSOP Tape and Reel (Pb-free) HIN213EIA HIN213EIA HIN213EIAZ HIN213EIAZ HIN213EIB HIN213EIBZ -40 to 85 28 Ld SSOP 28 Ld SSOP Tape and Reel -40 to 85 28 Ld SSOP (Pb-free) 28 Ld SSOP Tape and Reel (Pb-free) -40 to 85 28 Ld SOIC -40 to 85 28 Ld SOIC (Pb-free) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts HIN202E (PDIP, SOIC) TOP VIEW C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V6 16 VCC 15 GND 14 T1OUT 13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT HIN206E (SOIC, SSOP) TOP VIEW T3OUT T1OUT T2OUT R1IN R1OUT T2IN T1IN GND VCC 1 2 3 4 5 6 7 8 9 24 T4OUT 23 R2IN 22 R2OUT 21 SD 20 EN 19 T4IN 18 T3IN 17 R3OUT 16 R3IN 15 V14 C213 C2+ T2OUT 7 R2IN 8 C1+ 10 V+ 11 C1- 12 +5V +5V 16 1 0.1µF + 3 4 0.1µF + 5 C1+ C1C2+ C2VCC +5V TO 10V VOLTAGE INVERTER V+ 2 + 0.1µF 0.1µF 0.1µF 10 C1+ + 12 C113 C2+ + 14 C29 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 11 + 0.1µF V- 15 + 2 0.1µF T1OUT +10V TO -10V VOLTAGE INVERTER V- 6 + 0.1µF T1IN +5V 400kΩ 7 +5V 400kΩ +5V 400kΩ +5V 400kΩ T1IN 11 +5V 400kΩ T1 T2 3 T3 T2OUT 14 T1OUT T2IN 6 T2IN 10 12 +5V 400kΩ T2 7 13 R1IN R1 5kΩ 8 R2 GND 15 5kΩ T2OUT T3IN T4IN R1OUT 18 1 T3OUT T4OUT R1IN T4 24 4 R1 5kΩ 23 R2IN R2 5kΩ 16 R3IN R3 5kΩ 21 SD GND 8 19 5 R1OUT R2OUT 9 R2IN R2OUT 22 17 R3OUT 20 EN 4 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN207E (SOIC, SSOP) TOP VIEW T3OUT T1OUT T2OUT 1 2 3 24 T4OUT 23 R2IN 22 R2OUT 21 T5IN 20 T5OUT 19 T4IN 18 T3IN 17 R3OUT 16 R3IN 15 V14 C213 C2+ HIN208E (SOIC, SSOP) TOP VIEW T2OUT T1OUT R2IN R2OUT T1IN R1OUT R1IN GND VCC 1 2 3 4 5 6 7 8 9 24 T3OUT 23 R3IN 22 R3OUT 21 T4IN 20 T4OUT 19 T3IN 18 T2IN 17 R4OUT 16 R4IN 15 V14 C213 C2+ R1IN 4 R1OUT 5 T2IN 6 T1IN 7 GND VCC 8 9 C1+ 10 V+ 11 C1- 12 C1+ 10 V+ 11 C1- 12 +5V +5V 9 0.1µF 10 C1+ + 12 C113 C2+ + 14 C27 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 11 + 0.1µF 0.1µF 10 C1+ + 12 C113 C2+ + 14 C29 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 11 + 0.1µF 0.1µF 0.1µF V- 15 + 2 0.1µF T1OUT T1IN V- 15 + 2 0.1µF T1OUT T1IN +5V 400kΩ +5V 400kΩ 5 +5V 400kΩ +5V 400kΩ +5V 400kΩ T2 1 T3 T2OUT T2IN +5V 400kΩ 6 +5V 400kΩ 18 +5V 400kΩ 19 +5V 400kΩ 21 5 T2 3 T3 T2OUT T2IN 18 T3IN T4IN T5IN R1OUT 1 T3OUT T4OUT T5OUT R1IN T3IN T4IN R1OUT 19 24 T3OUT T4OUT R1IN T4 20 7 R1 5kΩ 3 R2IN R2 5kΩ 23 R3IN R3 5kΩ 16 R4IN R4 GND 5kΩ T4 24 T5 20 4 R1 5kΩ 23 R2IN R2 5kΩ 16 R3IN R3 GND 8 5kΩ 21 6 4 R2OUT 22 R2OUT 22 R3OUT 17 R3OUT 17 R4OUT 8 5 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN211E (SOIC, SSOP) TOP VIEW T3OUT 1 T1OUT 2 T2OUT 3 R2IN 4 R2OUT 5 T2IN 6 T1IN 7 R1OUT 8 R1IN 9 GND 10 VCC 11 C1+ 12 V+ 13 C1- 14 28 T4OUT 27 R3IN 26 R3OUT 25 SD 24 EN 23 R4IN 22 R4OUT 21 T4IN 20 T3IN 19 R5OUT 18 R5IN 17 V16 C215 C2+ HIN213E (SOIC, SSOP) TOP VIEW T3OUT 1 T1OUT 2 T2OUT 3 R2IN 4 R2OUT 5 T2IN 6 T1IN 7 R1OUT 8 R1IN 9 GND 10 VCC 11 C1+ 12 V+ 13 C1- 14 28 T4OUT 27 R3IN 26 R3OUT 25 SD 24 EN 23 R4IN 22 R4OUT 21 T4IN 20 T3IN 19 R5OUT 18 R5IN 17 V16 C215 C2+ NOTE: R4 and R5 active in shutdown. +5V 11 0.1µF 12 C1+ + 14 C115 C2+ + 16 C2VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 13 + 0.1µF 0.1µF 12 C1+ + 14 C115 C2+ + 16 C2+5V 11 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 13 + 0.1µF 0.1µF V- 17 + 2 0.1µF T1OUT 0.1µF V- 17 + 2 0.1µF T1OUT T1IN +5V 400kΩ 7 +5V 400kΩ +5V 400kΩ +5V 400kΩ T1IN +5V 400kΩ 7 +5V 400kΩ +5V 400kΩ +5V 400kΩ T2 3 T3 T2OUT T2IN 6 T2 3 T3 T2OUT T2IN 6 T3IN 20 1 T3OUT T3IN 20 1 T3OUT T4IN R1OUT 21 8 T4 28 9 T4OUT R1IN T4IN R1OUT 21 8 T4 28 9 T4OUT R1IN R1 5 R2OUT R2 26 R3OUT R3 22 R4OUT R4 19 R5OUT 24 EN GND 10 R5 5kΩ 4 R2IN 5kΩ 27 R3IN 5kΩ 23 R4IN 5kΩ 18 R5IN 5kΩ 25 SD EN 24 R5OUT 19 R4OUT 22 R3OUT 26 R2OUT 5 R1 5kΩ 4 R2IN R2 5kΩ 27 R3IN R3 5kΩ 23 R4IN R4 5kΩ 18 R5IN R5 GND 10 5kΩ 25 SD 6 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN232E (PDIP, SOIC, SSOP, TSSOP) TOP VIEW +5V 16 C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V6 16 VCC 15 GND 14 T1OUT 13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT T2IN 10 12 R1OUT R1 R2OUT 9 R2 GND 15 5kΩ 5kΩ 8 +5V 400kΩ T2 7 13 R1IN T2OUT T1IN 11 0.1µF + 5 0.1µF + 3 4 1 C1+ C1C2+ C2VCC +5V TO 10V VOLTAGE INVERTER V+ 2 + 0.1µF +10V TO -10V VOLTAGE INVERTER V- 6 + 0.1µF T2OUT 7 R2IN 8 +5V 400kΩ T1 14 T1OUT R2IN Pin Descriptions PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT EN, EN SD, SD NC Power Supply Input 5V ±10%, (5V ±5% HIN207E). Internally generated positive supply (+10V nominal). Internally generated negative supply (-10V nominal). Ground Lead. Connect to 0V. External capacitor (+ terminal) is connected to this lead. External capacitor (- terminal) is connected to this lead. External capacitor (+ terminal) is connected to this lead. External capacitor (- terminal) is connected to this lead. Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to VCC is connected to each lead. Transmitter Outputs. These are RS-232 levels (nominally ±10V). Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kΩ pull-down resistor to GND is connected to each input. Receiver Outputs. These are TTL/CMOS levels. Receiver Enable Input. With EN = 5V (HIN213E EN=0V), the receiver outputs are placed in a high impedance state. Shutdown Input. With SD = 5V (HIN213E SD = 0V), the charge pump is disabled, the receiver outputs are in a high impedance state (except R4 and R5 of HIN213E) and the transmitters are shut off. No Connect. No connections are made to these leads. FUNCTION 7 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Absolute Maximum Ratings VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 12V V- to Ground . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V) Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V) ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table Thermal Information Thermal Resistance (Typical, Note 1) θJA (°C/W) 16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . . 110 16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100 16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 155 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 145 16 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . 90 24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 135 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (SOIC and SSOP - Lead Tips Only) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Operating Conditions Temperature Range HIN2XXECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C HIN2XXEIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER SUPPLY CURRENTS Power Supply Current, ICC Test Conditions: VCC = +5V ±10%, (VCC = +5V ±5% HIN207E); C1-C4 = 0.1µF; TA = Operating Temperature Range TEST CONDITIONS MIN TYP MAX UNITS No Load, TA = 25°C HIN202E HIN206E - HIN208E, HIN211E, HIN213E HIN232E - 8 11 5 1 15 15 20 10 10 50 mA mA mA µA µA Shutdown Supply Current, ICC(SD) TA = 25°C HIN206E, HIN211E HIN213E LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL Input Logic High, VlH TIN , EN, SD, EN, SD TIN EN, SD, EN, SD Transmitter Input Pullup Current, IP TTL/CMOS Receiver Output Voltage Low, VOL TTL/CMOS Receiver Output Voltage High, VOH TTL/CMOS Receiver Output Leakage RECEIVER INPUTS RS-232 Input Voltage Range, VIN Receiver Input Impedance, RIN Receiver Input Low Threshold, VIN (H-L) TA = 25°C, VIN = ±3V VCC = 5V, TA = 25°C VCC = 5V, TA = 25°C Active Mode Shutdown Mode HIN213E R4 and R5 Active Mode Shutdown Mode HIN213E R4 and R5 -30 3.0 0.2 5.0 1.2 1.5 1.7 1.5 0.5 +30 7.0 2.4 2.4 1.0 V kΩ V V V V V TIN = 0V IOUT = 1.6mA (HIN202E, HIN232E, IOUT = 3.2mA) IOUT = -1mA EN = VCC , EN = 0, 0V < ROUT < VCC 2.0 2.4 3.5 15 0.1 4.6 0.5 0.8 200 0.4 ±10 V V V µA V V µA Receiver Input High Threshold, VIN (L-H) Receiver Input Hysteresis, VHYST VCC = 5V, No Hysteresis in Shutdown Mode 8 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Electrical Specifications PARAMETER TIMING CHARACTERISTICS Output Enable Time, tEN Output Disable Time, tDIS Transmitter, Receiver Propagation Delay, tPD HIN206E, HIN211E, HIN213E HIN206E, HIN211E, HIN213E HIN213E SD = 0V, R4, R5 HIN213E SD = VCC , R1 - R5 All except HIN213E Transition Region Slew Rate, SRT TRANSMITTER OUTPUTS Output Voltage Swing, TOUT Output Resistance, TOUT RS-232 Output Short Circuit Current, ISC ESD PERFORMANCE RS-232 Pins (TOUT, RIN) Human Body Model IEC61000-4-2 Contact Discharge IEC61000-4-2 Air Gap (Note 3) All Other Pins NOTES: 2. Guaranteed by design. 3. Meets Level 4. Human Body Model ±15 ±8 ±15 ±2 kV kV kV kV Transmitter Outputs, 3kΩ to Ground VCC = V+ = V- = 0V, VOUT = ±2V TOUT Shorted to GND ±5 300 ±9 ±10 ±10 V Ω mA RL = 3kΩ , CL = 1000pF Measured from +3V to -3V or -3V to +3V, 1 Transmitter Switching (Note 2) 3 600 200 4.0 0.5 0.5 20 40 10 10 45 ns ns µs µs µs V/µs Test Conditions: VCC = +5V ±10%, (VCC = +5V ±5% HIN207E); C1-C4 = 0.1µF; TA = Operating Temperature Range (Continued) TEST CONDITIONS MIN TYP MAX UNITS Test Circuits (HIN232E) +4.5V TO +5.5V INPUT 0.1µF C3 0.1µF C1 + 1 C1+ 2 V+ 3 C11 C1+ VCC 16 GND 15 T1OUT 14 R1IN 13 R1OUT 12 T1IN 11 T2IN 10 R2OUT 9 3kΩ T1 OUTPUT RS-232 ±30V INPUT TTL/CMOS OUTPUT TTL/CMOS INPUT TTL/CMOS INPUT TTL/CMOS OUTPUT ROUT = VIN /I T2OUT T1OUT VIN = ±2V A 4 C2+ 5 C26 V7 T2OUT 8 R2IN 2 V+ 3 C10.1µF + C2 0.1µF C4 4 C2+ 5 C2VCC 16 GND 15 T1OUT 14 R1IN 13 R1OUT 12 T1IN 11 T2IN 10 R2OUT 9 + - 3kΩ T2 OUTPUT RS-232 ±30V INPUT FIGURE 1. GENERAL TEST CIRCUIT - + 6 V7 T2OUT 8 R2IN FIGURE 2. POWER-OFF SOURCE RESISTANCE CONFIGURATION 9 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E VOLTAGE DOUBLER S1 VCC + + C1 C3 VCC S4 GND S7 C2S8 + C2 + C4 V- = - (V+) C1+ S2 V+ = 2VCC S5 VOLTAGE INVERTER C2+ S6 GND GND S3 RC OSCILLATOR C1- - - - FIGURE 3. CHARGE PUMP Detailed Description The HIN2XXE family of high-speed RS-232 transmitters/receivers are powered by a single +5V power supply, feature low power consumption, and meet all ElA RS232C and V.28 specifications. The circuit is divided into three sections: the charge pump, transmitter, and receiver. Charge Pump An equivalent circuit of the charge pump is illustrated in Figure 3. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 125kHz. During phase one of the clock, capacitor C1 is charged to VCC . During phase two, the voltage on C1 is added to VCC , producing a signal across C3 equal to twice VCC . During phase two, C2 is also charged to 2VCC , and then during phase one, it is inverted with respect to ground to produce a signal across C4 equal to -2VCC . The charge pump accepts input voltages up to 5.5V. The output impedance of the voltage doubler section (V+) is approximately 200Ω , and the output impedance of the voltage inverter section (V-) is approximately 450Ω . A typical application uses 0.1µF capacitors for C1-C4, however, the value is not critical. Increasing the values of C1 and C2 will lower the output impedance of the voltage doubler and inverter, increasing the values of the reservoir capacitors, C3 and C4, lowers the ripple on the V+ and V- supplies. During shutdown mode (HIN206E, HIN211E and HIN213E) the charge pump is turned off, V+ is pulled down to VCC , Vis pulled up to GND, and the supply current is reduced to less than 10µA. The transmitter outputs are disabled and the receiver outputs (except for HIN213E, R4 and R5) are placed in the high impedance state. and (V+ -0.6V). Each transmitter input has an internal 400kΩ pullup resistor so any unused input can be left unconnected and its output remains in its low state. The output voltage swing meets the RS-232C specifications of ±5V minimum with the worst case conditions of: all transmitters driving 3kΩ minimum load impedance, VCC = 4.5V, and maximum allowable operating temperature. The transmitters have an internally limited output slew rate which is less than 30V/µs. The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300Ω with ± 2V applied to the outputs and VCC = 0V. Receivers The receiver inputs accept up to ±30V while presenting the required 3kΩ to 7kΩ input impedance even if the power is off (VCC = 0V). The receivers have a typical input threshold of 1.3V which is within the ±3V limits, known as the transition region, of the RS-232 specifications. The receiver output is 0V to VCC . The output will be low whenever the input is greater than 2.4V and high whenever the input is floating or driven between +0.8V and -30V. The receivers feature 0.5V hysteresis (except during shutdown) to improve noise rejection. The receiver Enable line EN, (EN on HIN213E) when unasserted, disables the receiver outputs, placing them in the high impedance mode. The receiver outputs are also placed in the high impedance state when in shutdown mode (except HIN213E R4 and R5). V+ VCC 400kΩ TXIN GND < TXIN < VCC V300Ω TOUT V- < VTOUT < V+ Transmitters The transmitters are TTL/CMOS compatible inverters which translate the inputs to RS-232 outputs. The input logic threshold is about 26% of VCC , or 1.3V for VCC = 5V. A logic 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V 10 FIGURE 4. TRANSMITTER FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E VCC RXIN -30V < RXIN < +30V GND 5kΩ ROUT GND < VROUT < VCC Application Information The HIN2XXE may be used for all RS-232 data terminal and communication links. It is particularly useful in applications where ±12V power supplies are not available for conventional RS-232 interface circuits. The applications presented represent typical interface configurations. A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 7. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select) is generated by driving them through a 5kΩ resistor connected to V+. In applications requiring four RS-232 inputs and outputs (Figure 8), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters. FIGURE 5. RECEIVER TIN OR RIN TOUT OR ROUT VOL VOL tPHL tPLH tPHL + tPLH 2 AVERAGE PROPAGATION DELAY = FIGURE 6. PROPAGATION DELAY DEFINITION +5V HIN213E Operation in Shutdown The HIN213E features two receivers, R4 and R5, which remain active in shutdown mode. During normal operation the receivers propagation delay is typically 0.5µs. This propagation delay may increase slightly during shutdown. When entering shut down mode, receivers R4 and R5 are not valid for 80µs after SD = VIL. When exiting shutdown mode, all receiver outputs will be invalid until the charge pump circuitry reaches normal operating voltage. This is typically less than 2ms when using 0.1µF capacitors. 1 C1 + 0.1µF C2 + 0.1µF TD INPUTS OUTPUTS TTL/CMOS RTS RD CTS 9 R2 3 16 + CTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT RS-232 INPUTS AND OUTPUTS TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND SIGNAL GROUND (7) HIN232E 4 5 11 10 12 R1 T1 T2 14 7 13 8 6 + 15 FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING 11 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E 1 C1 + 0.1µF TD INPUTS OUTPUTS TTL/CMOS RTS RD CTS 9 R2 R1 8 15 16 + + C4 6 2 V- V+ 6 2 16 HIN232E 1 C1 + 0.1µF DTR INPUTS OUTPUTS TTL/CMOS DSRS DCD R1 9 R2 R1 8 3 11 10 12 T1 T2 4 5 14 7 13 + C2 0.1µF DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT DCD (8) DATA CARRIER DETECT R1 (22) RING INDICATOR SIGNAL GROUND (7) VCC C3 3 11 10 12 HIN232E T1 T2 4 5 14 7 13 - + C2 0.1µF TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND - - +5V RS-232 INPUTS AND OUTPUTS 0.2µF 0.2µF VCC - 15 FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS Typical Performance Curves 12 V- SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (|V|) 0.1µF 10 8 6 4 2 0 3.0 12 10 8 6 4 2 0 V- (VCC = 4V) TA = 25°C TRANSMITTER OUTPUTS OPEN CIRCUIT 0 5 10 15 20 25 V+ (VCC = 5V) V+ (VCC = 4V) V- (VCC = 5V) 3.5 4.0 4.5 VCC 5.0 5.5 6.0 30 35 |ILOAD| (mA) FIGURE 9. V- SUPPLY VOLTAGE vs VCC FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD 12 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Die Characteristics METALLIZATION: Type: Al Thickness: 10kÅ ±1kÅ SUBSTRATE POTENTIAL GND PASSIVATION: Type: Nitride over Silox Nitride Thickness: 8kÅ Silox Thickness: 7kÅ TRANSISTOR COUNT: 185 PROCESS: CMOS Metal Gate Metallization Mask Layout HIN232E VPIN 6 C2PIN 5 C2+ PIN 4 C1PIN 3 PIN 2 V+ T2OUT PIN 7 PIN 1 C1+ R2IN PIN 8 T3OUT PIN 9 PIN 17 VCC R2OUT PIN 10 PIN 11 T2IN PIN 12 T1IN PIN 13 R1OUT PIN 14 R1IN PIN 15 T1OUT PIN 16 GND 13 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Dual-In-Line Plastic Packages (PDIP) N E1 INDEX AREA 12 3 N/2 E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL -B- MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93 MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 A E A2 L A C L -AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A1 A2 -C- B B1 C D D1 E eA eC C e C A BS eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). E1 e eA eB L N 0.100 BSC 0.300 BSC 0.115 16 0.430 0.150 2.54 BSC 7.62 BSC 2.93 16 10.92 3.81 14 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45° 0.25(0.010) M BM M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 1.35 0.10 0.33 0.19 9.80 3.80 5.80 0.25 0.40 16 8° 0° 8° MAX 1.75 0.25 0.51 0.25 10.00 4.00 6.20 0.50 1.27 NOTES 9 3 4 5 6 7 Rev. 1 6/05 MIN 0.0532 0.0040 0.013 0.0075 0.3859 0.1497 0.2284 0.0099 0.016 16 0° MAX 0.0688 0.0098 0.020 0.0098 0.3937 0.1574 0.2440 0.0196 0.050 A1 B C D E e H C α A1 0.10(0.004) 0.050 BSC 1.27 BSC e B 0.25(0.010) M C AM BS h L N NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α 15 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Thin Shrink Small Outline Plastic Packages (TSSOP) N INDEX AREA E E1 -B1 2 3 L 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 GAUGE PLANE 0.25(0.010) M BM M16.173 16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D MIN 0.002 0.033 0.0075 0.0035 0.193 0.169 MAX 0.043 0.006 0.037 0.012 0.008 0.201 0.177 MILLIMETERS MIN 0.05 0.85 0.19 0.09 4.90 4.30 MAX 1.10 0.15 0.95 0.30 0.20 5.10 4.50 NOTES 9 3 4 6 7 8o Rev. 1 2/02 α A1 0.10(0.004) A2 c E1 e E L N e b 0.10(0.004) M C AM BS 0.026 BSC 0.246 0.020 16 0o 8o 0.256 0.028 0.65 BSC 6.25 0.50 16 0o 6.50 0.70 NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) α 16 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SSOP) N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA 0.25 0.010 L GAUGE PLANE 0.25(0.010) M BM M16.209 (JEDEC MO-150-AC ISSUE B) 16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D E A2 C 0.10(0.004) C AM BS MILLIMETERS MIN 0.05 1.65 0.22 0.09 5.90 5.00 7.40 0.55 16 8° 0° 8° Rev. 3 MAX 2.00 1.85 0.38 0.25 6.50 5.60 8.20 0.95 NOTES 9 3 4 6 7 6/05 MIN 0.002 0.065 0.009 0.004 0.233 0.197 0.292 0.022 16 0° MAX 0.078 0.072 0.014 0.009 0.255 0.220 0.322 0.037 α A1 e B 0.25(0.010) M e H L N 0.026 BSC 0.65 BSC NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α 17 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45° 0.25(0.010) M BM M16.3 (JEDEC MS-013-AA ISSUE C) 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 2.35 0.10 0.33 0.23 10.10 7.40 10.00 0.25 0.40 16 8° 0° 8° MAX 2.65 0.30 0.51 0.32 10.50 7.60 10.65 0.75 1.27 NOTES 9 3 4 5 6 7 Rev. 1 6/05 MIN 0.0926 0.0040 0.013 0.0091 0.3977 0.2914 0.394 0.010 0.016 16 0° MAX 0.1043 0.0118 0.0200 0.0125 0.4133 0.2992 0.419 0.029 0.050 A1 B C D E e H C α A1 0.10(0.004) 0.050 BSC 1.27 BSC e B 0.25(0.010) M C AM BS h L N NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α 18 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M BM M24.209 (JEDEC MO-150-AG ISSUE B) 24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.312 0.197 0.072 0.014 0.009 0.334 0.220 MAX 0.078 MILLIMETERS MIN 0.05 1.65 0.22 0.09 7.90 5.00 MAX 2.00 1.85 0.38 0.25 8.50 5.60 NOTES 9 3 4 6 7 8o Rev. 1 3/95 α µ A1 0.10(0.004) A2 C E e H L N e B 0.25(0.010) M C AM BS 0.026 BSC 0.292 0.022 24 0o 8o 0.322 0.037 0.65 BSC 7.40 0.55 24 0o 8.20 0.95 α NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 19 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM M24.3 (JEDEC MS-013-AD ISSUE C) 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 2.35 0.10 0.33 0.23 15.20 7.40 MAX 2.65 0.30 0.51 0.32 15.60 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93 MIN 0.0926 0.0040 0.013 0.0091 0.5985 0.2914 MAX 0.1043 0.0118 0.020 0.0125 0.6141 0.2992 A1 B C D E α µ A1 0.10(0.004) C e H h L N 0.05 BSC 0.394 0.010 0.016 24 0o 8o 0.419 0.029 0.050 1.27 BSC 10.00 0.25 0.40 24 0o 10.65 0.75 1.27 e B 0.25(0.010) M C AM BS NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α 20 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA 0.25 0.010 L GAUGE PLANE 0.25(0.010) M BM M28.209 (JEDEC MO-150-AH ISSUE B) 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D E A2 C 0.10(0.004) C AM BS MILLIMETERS MIN 0.05 1.65 0.22 0.09 9.90 5.00 7.40 0.55 28 8° 0° 8° MAX 2.00 1.85 0.38 0.25 10.50 5.60 8.20 0.95 NOTES 9 3 4 6 7 Rev. 2 6/05 MIN 0.002 0.065 0.009 0.004 0.390 0.197 0.292 0.022 28 0° MAX 0.078 0.072 0.014 0.009 0.413 0.220 0.322 0.037 α A1 e B 0.25(0.010) M e H L N 0.026 BSC 0.65 BSC NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α 21 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM M28.3 (JEDEC MS-013-AE ISSUE C) 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 L MILLIMETERS MIN 2.35 0.10 0.33 0.23 17.70 7.40 MAX 2.65 0.30 0.51 0.32 18.10 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93 MIN 0.0926 0.0040 0.013 0.0091 0.6969 0.2914 MAX 0.1043 0.0118 0.0200 0.0125 0.7125 0.2992 B C D E α µ A1 0.10(0.004) C e H h L N 0.05 BSC 0.394 0.01 0.016 28 0o 8o 0.419 0.029 0.050 1.27 BSC 10.00 0.25 0.40 28 0o 10.65 0.75 1.27 e B 0.25(0.010) M C AM BS NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 22 FN4315.16 November 4, 2005