ISL28168

® ISL28168, ISL28268 Data Sheet September 13, 2007 FN6378.2 34µA Micro-power Single and Dual Rail-toRail Input-Output (RRIO) Low Input Bias Current Op Amps The ISL28168 and ISL28268 are micro-power operational amplifiers optimized for single supply operation over a power supply range of 2.4VDC to 5.5VDC. These devices draw minimal supply current and operate rail-to-rail at the input and output, while providing excellent DC-accuracy, noise and output drive specifications. Competing devices seriously degrade these parameters to achieve micro-power supply current. The parts feature an Input Range Enhancement Circuit (IREC) which enables them to maintain CMRR performance for input voltages greater than the positive supply. The input signal is capable of swinging 0.25V above the positive supply and to 100mV below the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The 1/f corner of the voltage noise spectrum is at 100Hz. This results in low frequency noise performance which can only be found on devices with an order of magnitude higher supply current. ISL28168 and ISL28268 can be operated from one lithium cell or two Ni-Cd batteries. The ISL28168 contains an enable pin feature that allows the device to be shutdown when not in use. Features • 34µA typical supply current • 10pA typical input bias current • 200kHz gain bandwidth product • 2.4V to 5.5V single supply voltage range • Rail-to-rail input and output • Enable pin (ISL28168 only) • Pb-free (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 20mA current loops • Handheld consumer products • Medical devices • Sensor amplifiers • ADC buffers • DAC output amplifiers Pinouts ISL28168 (6 LD SOT-23) TOP VIEW OUT 1 6 V+ 5 EN 4 IN- Ordering Information PART NUMBER (Note) ISL28168FHZ-T7* ISL28168FHZ-T7A* Coming Soon ISL28268FBZ-T7* Coming Soon ISL28268FUZ-T7* PART MARKING GACA GACA PACKAGE (Pb-free) 6 Ld SOT-23 6 Ld SOT-23 8 Ld SOIC 8 Ld MSOP PKG. DWG. # MDP0038 MDP0038 MDP0027 MDP0043 OUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ V- 2 IN+ 3 +- ISL28268 (8 LD SOIC) TOP VIEW 8 V+ 7 OUT_B +6 IN-_B 5 IN+_B OUT_A 1 IN-_A 2 IN+_A 3 V- 4 ISL28268 (8 LD MSOP) TOP VIEW 8 V+ -+ +7 OUT_B 6 IN-_B 5 IN+_B * “-T7” and “-T7A” suffix are for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL28168, ISL28268 Absolute Maximum Ratings (TA = +25°C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Information Thermal Resistance θJA (°C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 110 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 115 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. DESCRIPTION CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT PARAMETER DC SPECIFICATIONS VOS Δ V OS --------------ΔT IOS IB CMIR CMRR PSRR AVOL Input Offset Voltage Input Offset Voltage vs Temperature Input Offset Current 6 Ld SOT-23 -1.6 -1.8 ±0.09 0.3 1.6 1.8 mV µV/°C TA = -40°C to +85°C Input Bias Current TA = -40°C to +85°C Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Guaranteed by CMRR VCM = 0V to 5V V+ = 2.4V to 5.5V VO = 0.5V to 4.5V, RL = 100kΩ to VCM VO = 0.5V to 4.5V, RL = 1kΩ to VCM VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ to VCM Output low, RL = 1kΩ to VCM Output high, RL = 100kΩ to VCM Output high, RL = 1kΩ to VCM IS,ON IS,OFF IO+ Quiescent Supply Current, Enabled Quiescent Supply Current, Disabled (ISL28168) Short-Circuit Output Source Current RL = 10Ω to VCM Per Amp -35 -80 -30 -80 0 75 70 80 75 100 75 ±5 ±10 35 80 30 80 5 pA pA V dB dB V/mV V/mV 98 98 220 45 5.5 135 6 20 150 250 mV mV V V 4.995 4.993 4.84 4.77 26 10 4.996 4.874 34 10 43 55 14 19 µA µA mA 27 15 30 2 FN6378.2 September 13, 2007 ISL28168, ISL28268 Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) DESCRIPTION Short-Circuit Output Sink Current Supply Operating Range EN Pin High Level (ISL28168) EN Pin Low Level (ISL28168) EN Pin Input High Current (ISL28168) EN Pin Input Low Current (ISL28168) V EN = V+ V EN = V1 12 CONDITIONS RL = 10Ω to VCM V+ to VMIN (Note 1) 22 15 2.4 2 0.8 1.5 1.6 25 30 TYP 25 5.5 MAX (Note 1) UNIT mA V V V µA nA PARAMETER IOVSUPPLY VINH VINL IENH IENL AC SPECIFICATONS GBW Unity Gain Bandwidth eN Gain Bandwidth Product -3dB Bandwidth Input Noise Voltage Peak-to-Peak Input Noise Voltage Density iN CMRR @ 60Hz PSRR+ @ 120Hz PSRR- @ 120Hz Input Noise Current Density Input Common Mode Rejection Ratio Power Supply Rejection Ratio - +V Power Supply Rejection Ratio - -V AV = 100, RF = 100kΩ, RG = 1kΩ, RL = 10kΩ to VCM AV =1, RF = 0Ω, VOUT = 10mVP-P, RL = 10kΩ to VCM f = 0.1Hz to 10Hz fO = 1kHz fO = 10kHz VCM = 1VP-P, RL = 10kΩ to VCM V+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P, RL = 10kΩ to VCM V+, V- = ±1.2V and ±2.5V VSOURCE = 1VP-P, RL = 10kΩ to VCM 200 420 1.4 64 0.19 -70 -64 -85 kHz kHz µVP-P nV/√Hz pA/√Hz dB dB dB TRANSIENT RESPONSE SR tr, tf, Large Signal Slew Rate Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT tr, tf, Small Signal Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT tEN 0.1 V/µs µs µs ns ns µs µs AV = +2, VOUT = 1VP-P, Rg = Rf = 10kΩ RL = 10kΩ to VCM AV = +2, VOUT = 1VP-P, Rg = Rf = 10kΩ RL = 10kΩ to VCM AV = +2, VOUT = 10mVP-P, Rg = Rf = RL = 10kΩ to VCM AV = +2, VOUT = 10mVP-P, Rg = Rf = RL = 10kΩ to VCM 10 9 650 640 15 0.5 Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = +2, EN to 10% VOUT, (ISL28168) Rg = Rf = RL = 1k to VCM Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = +2, EN to 10% VOUT, (ISL28168) Rg = Rf = RL = 1k to VCM NOTE: 1. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested. 3 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 1 0 NORMALIZED GAIN (dB) Rf = Rg = 499 Rf = Rg = 1 k NORMALIZED GAIN (dB) 1M -1 -2 -3 -4 -5 -6 -7 -8 -9 10 V + = 5V R L = 1k CL = 16.3pF AV = +2 VOUT = 10mVP-P 100 4 VOUT = 10mV 3 2 VOUT = 50mV 1 0 -1 VOUT = 100mV -2 -3 V+ = 5V VOUT = 1V -4 R = 1k L -5 C = 16.3pF L -6 AV = +1 -7 VOUT = 10mVP-P -8 1k 10k 100k FREQUENCY (Hz) Rf = Rg = 10k Rf = Rg = 4.99k 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES Rf/Rg FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k 1 0 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 1k 10k 100k FREQUENCY (Hz) 1M VOUT = 10mV VOUT = 50mV VOUT = 100mV VOUT = 1V V + = 5V RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P 1 0 -1 -2 -3 -4 VOUT = 10mV VOUT = 50mV VOUT = 100mV VOUT = 1V -5 V+ = 5V -6 RL = 100k CL = 16.3pF -7 AV = +1 -8 V OUT = 10mVP-P -9 1k 10k 100k FREQUENCY (Hz) 1M FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k 4 3 NORMALIZED GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 -6 1k V+ = 5V CL = 16.3pF AV = +1 VOUT = 10mVP-P RL = 100k RL = 1 k RL = 10k GAIN (dB) 70 60 50 40 30 20 10 0 1M -10 10 AV = 1 AV = 10 AV = 101 AV = 1001 AV = 1, Rg = INF, Rf = 0 AV = 10, Rg= 1k, Rf = 9.09k AV = 101, Rg = 1k, Rf = 100k AV = 1001, Rg = 1k, Rf = 1M V+ = 5V CL = 16.3pF RL = 10k VOUT = 10mVP-P 10k 100k FREQUENCY (Hz) 100 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 5. GAIN vs FREQUENCY vs RL FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN 4 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 1k RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P 10k 100k FREQUENCY (Hz) 1M V+ = 2.4V V+ = 5V NORMALIZED GAIN (dB) (Continued) CL = 98.3pF CL = 72.3pF CL = 55.3pF 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 V+ = 5V -6 RL = 10k -7 AV = +1 -8 V OUT = 10mVP-P -9 -10 1k 10k CL = 43.3pF CL = 34.3pF CL = 16.3pF 100k 1M FREQUENCY (Hz) FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE FIGURE 8. GAIN vs FREQUENCY vs CL 10 0 -10 -20 CMRR (dB) -30 -40 -50 -60 -70 -80 -90 10 100 1k 10k V+ = 2.4V, 5V RL = 10k CL = 16.3pF AV = +1 VCM = 1VP-P 100k 1M FREQUENCY (Hz) PSRR (dB) 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 10 100 1k 10k V+ = 2.4V RL = 10k CL = 16.3pF AV = +1 VCM = 1VP-P 100k 1M PSRRPSRR+ FREQUENCY (Hz) FIGURE 9. CMRR vs FREQUENCY, V+ = 2.4V AND 5V FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V 10 0 -10 -20 PSRR (dB) -30 -40 -50 -60 -70 -80 -90 -100 10 100 1k 10k V + = 5V RL = 10k CL = 16.3pF AV = +1 VCM = 1VP-P 100k 1M FREQUENCY (Hz) PSRRPSRR+ INPUT VOLTAGE NOISE (nV√Hz) 1000 V + = 5V RL = 10k CL = 16.3pF AV = +1 100 10 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 11. PSRR vs FREQUENCY, V+, V- = ±1.2V FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY 5 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 10 INPUT CURRENT NOISE (pA√Hz) V + = 5V RL = 10k CL = 16.3pF AV = +1 1 0 -0.2 INPUT NOISE (µV) -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k -1.6 0 1 2 3 4 5 6 TIME (s) 7 8 9 10 (Continued) RL = 10k V + = 5V CL = 16.3pF AV=1000 Rg = 100, Rf = 100k FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz 0.6 0.4 LARGE SIGNAL (V) SMALL SIGNAL (V) 0.2 0 -0.2 -0.4 -0.6 0 50 100 150 200 TIME (µs) 250 300 350 400 0.020 0.018 0.016 0.014 0.012 0.010 0.008 0.006 V+, V- = ±2.5V RL = 10k CL = 16.3pF Rg= Rf = 10k AV = 2 VOUT = 10mVP-P 0 50 100 150 200 TIME (µs) 250 300 350 400 V+, V- = ±2.5V RL = 10k CL = 16.3pF Rg = Rf = 10k AV = 2 VOUT = 1VP-P FIGURE 15. LARGE SIGNAL STEP RESPONSE FIGURE 16. SMALL SIGNAL STEP RESPONSE 6 V-ENABLE 5 4 V-ENABLE (V) 3 2 1 0 -1 0 50 100 150 200 250 TIME (µs) 300 350 V+ = 5V Rg = Rf = 10k CL = 16.3pF AV = +2 VOUT = 1VP-P RL = 10k V-OUT 1.2 1.0 0.8 OUTPUT (V) 0.6 0.4 0.2 0 -0.2 400 VOS (µV) 500 400 300 200 100 0 -100 -200 -300 -400 -500 -1 0 1 V + = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 2 3 VCM (V) 4 5 6 FIGURE 17. ISL28168 ENABLE TO OUTPUT RESPONSE FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT VOLTAGE 6 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 100 80 60 CURRENT (µA) 40 IBIAS (pA) 20 0 -20 -40 -60 -80 -100 -1 0 1 V + = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 45 MAX 40 35 30 25 4 5 6 20 -40 MEDIAN 50 N = 1000 (Continued) MIN 2 3 VCM (V) -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 19. INPUT BIAS CURRENT vs COMMON MODE INPUT VOLTAGE FIGURE 20. SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = ±2.5V 14 N = 1000 13 12 CURRENT (µA) 11 10 9 8 7 6 5 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN VOS (µV) MAX 1.5 1.0 0.5 0 MEDIAN -0.5 -1.0 MIN -1.5 -40 -20 0 20 40 60 80 MAX N = 1000 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 21. SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = ±2.5V FIGURE 22. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.75V 1.5 1.0 0.5 VOS (µV) 0 MEDIAN -0.5 -1.0 MIN -1.5 -40 -20 0 20 40 60 80 MAX N = 1000 1.5 1.0 0.5 VOS (µV) 0 MEDIAN -0.5 -1.0 MIN -1.5 -40 MAX N = 1000 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 23. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V FIGURE 24. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±1.2V 7 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 250 N = 1000 200 MEDIAN IBIAS+ (pA) IBIAS- (pA) 150 100 50 0 -50 -40 MIN MAX (Continued) N = 1000 MAX 500 450 400 350 300 250 200 150 100 50 0 -20 0 20 40 60 80 100 120 -50 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 25. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V FIGURE 26. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V 350 N = 1000 300 250 IBIAS+ (pA) 200 150 100 50 0 -50 -40 -20 0 20 40 60 80 100 120 MIN MAX MEDIAN IBIAS- (pA) 450 400 350 300 250 200 150 100 50 0 -50 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN N = 1000 MAX TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 27. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V FIGURE 28. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V 20 N = 1000 0 -20 -40 IOS (pA) -60 -80 -100 -120 MIN -140 -160 -40 -20 0 20 40 60 80 100 120 MEDIAN IOS (pA) MAX 30 10 -10 -30 N = 1000 MAX -50 -70 -90 -110 -130 -150 -40 -20 0 20 40 60 80 100 120 MEDIAN MIN TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 29. IOS vs TEMPERATURE, V+, V- = ±2.5 FIGURE 30. IOS vs TEMPERATURE, V+, V- = ±1.2V 8 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 140 130 120 CMRR (dB) 110 100 90 MIN 80 70 -40 90 MIN -20 0 20 40 60 80 100 120 80 -40 -20 0 20 40 60 80 100 120 MEDIAN PSRR (dB) MAX N = 1000 140 N = 1000 130 120 110 100 MEDIAN MAX (Continued) TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 31. CMRR vs TEMPERATURE, VCM = -2.5V TO +2.5V, V+, V- = ±2.5V FIGURE 32. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V 450 N = 1000 400 350 AVOL (V/mV) AVOL (V/mV) 300 250 200 150 100 -40 MIN MEDIAN MAX 70 65 60 55 50 45 40 35 30 25 -20 0 20 40 60 80 100 120 20 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN MAX N = 1000 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 33. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V to +2V, RL = 100k FIGURE 34. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V to +2V, RL = 1k 4.92 N = 1000 4.91 4.90 VOUT (V) 4.89 4.88 4.87 4.86 4.85 4.84 -40 -20 0 20 MEDIAN MAX VOUT (V) 4.9980 N = 1000 MAX 4.9975 MEDIAN 4.9970 4.9965 4.9960 MIN 40 60 80 100 120 4.9955 -40 -20 0 MIN 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 35. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k FIGURE 36. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k 9 FN6378.2 September 13, 2007 ISL28168, ISL28268 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open 190 180 170 VOUT (mV) 160 150 140 130 120 110 100 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN N = 1000 7.0 MAX 6.5 VOUT (mV) 6.0 5.5 5.0 4.5 4.0 -40 MIN MEDIAN MAX 7.5 N = 1000 (Continued) -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 37. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k FIGURE 38. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k IO+ SHORT CIRCUIT CURRENT (mA) IO- SHORT CIRCUIT CURRENT (mA) 45 N = 1000 40 MAX -20 N = 1000 -22 -24 MEDIAN -26 MIN -28 -30 -32 -40 MAX 35 MEDIAN 30 25 MIN 20 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 39. IO+ SHORT CIRCUIT OUTPUT CURRENT vs TEMPERATURE, VIN = -2.55V, RL = 10k, V+, V- = ±2.5V FIGURE 40. IO- SHORT CIRCUIT OUTPUT CURRENT vs TEMPERATURE, VIN = +2.55V, RL = 10k, V+, V- = ±2.5V 10 FN6378.2 September 13, 2007 ISL28168, ISL28268 Pin Descriptions ISL28168 (6 Ld SOT-23) ISL28268 (8 Ld SOIC) (8 Ld MSOP) PIN NAME NC 4 2 (A) 6 (B) ININ- (A) IN- (B) FUNCTION Not connected inverting input V+ EQUIVALENT CIRCUIT IN- IN+ VCircuit 1 3 3 (A) 5 (B) 2 4 IN+ IN+ (A) IN+ (B) V- Non-inverting input See Circuit 1 Negative supply V+ CAPACITIVELY COUPLED ESD CLAMP VCircuit 2 1 1 (A) 7 (B) OUT OUT (A) OUT (B) Output V+ OUT VCircuit 3 6 5 8 V+ EN Positive supply Chip enable See Circuit 2 V+ LOGIC PIN VCircuit 3 Applications Information Introduction The ISL28168 is a single CMOS rail-to-rail input, output (RRIO) operational amplifier with an enable feature. The ISL28268 is a dual version without the enable feature. Both devices are designed to operate from single supply (2.4V to 5.5V) or dual supplies (±1.2V to ±2.75V). other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The ISL28168 and ISL28268 achieve input rail-to-rail operation without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current versus the common-mode voltage range gives us an undistorted behavior from typically 100mV below the negative rail and 0.25V higher than the V+ rail. The CMOS output stage features excellent drive capability, typically swinging to within 6mV of either rail with a 100kΩ load. Rail-to-Rail Input/Output Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the 11 FN6378.2 September 13, 2007 ISL28168, ISL28268 Results of Over-Driving the Output Caution should be used when over-driving the output for long periods of time. Over-driving the output can occur in two ways. 1) the input voltage times the gain of the amplifier exceeds the supply voltage by a large value, or 2) The output current required is higher than the output stage can deliver. These conditions can result in a shift in the Input Offset Voltage (VOS) as much as 1µV/hr. of exposure under these condition. input current never exceeds 5mA. For non inverting unity gain applications, the current limiting can be via a series IN+ resistor, or via a feedback resistor of appropriate value. For other gain configurations, the series IN+ resistor is the best choice, unless the feedback (RF) and gain setting (RG) resistors are both sufficiently large to limit the input current to 5mA. Large differential input voltages can arise from several sources: 1) During open loop (comparator) operation. Used this way, the IN+ and IN- voltages don’t track, so differentials arise. 2) When the amplifier is disabled but an input signal is still present. An RL or RG to GND keeps the IN- at GND, while the varying IN+ signal creates a differential voltage. Mux Amp applications are similar, except that the active channel VOUT determines the voltage on the IN- terminal. 3) When the slew rate of the input pulse is considerably faster than the op amp’s slew rate. If the VOUT can’t keep up with the IN+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. To avoid this issue, keep the input slew rate below 0.1V/μs, or use appropriate current limiting resistors. Large (>2V) differential input voltages can also cause an increase in disabled ICC. FIGURE 41. INPUT CURRENT LIMITING IN+ and IN- Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. They also contain back-to-back diodes across the input terminals (Pin Description Table - Circuit 1). For applications where the input differential voltage is expected to exceed 0.5V, an external series resistor must be used to ensure the input currents never exceed 5mA (Figure 41). VIN RIN + RL VOUT Using Only One Channel The ISL28268 is a dual op amp. If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 42). + Enable/Disable Feature The ISL28168 offers an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 10µA at room temperature. By disabling the part, multiple ISL28168 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. Note that feed through from the IN+ to IN- pins occurs on any Mux Amp disabled channel where the input differential voltage exceeds 0.5V (e.g., active channel VOUT = 1V, while disabled channel VIN = GND), so the mux implementation is best suited for small signal applications. If large signals are required, use series IN+ resistors, or large value RF, to keep the feed through current low enough to minimize the impact on the active channel. See “Limitations of the Differential Input Protection” on page 12 for more details.The EN pin also has an internal pull down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. The EN pin should never be left floating. The EN pin should be connected directly to the -V pin when not used. FIGURE 42. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance and low offset voltage, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 43 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the FN6378.2 September 13, 2007 Limitations of the Differential Input Protection If the input differential voltage is expected to exceed 0.5V, an external current limiting resistor must be used to ensure the 12 ISL28168, ISL28268 same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. For further reduction of leakage currents, components can be mounted to the PC board using Teflon standoff insulators. HIGH IMPEDANCE INPUT IN V+ Power Dissipation It is possible to exceed the +125°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) where: FIGURE 43. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as follows: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × --------------------------R L Current Limiting These devices have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. (EQ. 2) where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance 13 FN6378.2 September 13, 2007 ISL28168, ISL28268 SOT-23 Package Family e1 A N 6 4 MDP0038 D SOT-23 PACKAGE FAMILY MILLIMETERS SYMBOL A A1 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX ±0.05 ±0.15 ±0.05 ±0.06 Basic Basic Basic Basic Basic ±0.10 Reference Reference Rev. F 2/07 NOTES: E1 2 3 E A2 b c 0.20 C 0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D D E E1 e e1 L L1 N 0.15 C A-B 2X C D 1 3 A2 SEATING PLANE 0.10 C NX A1 1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). (L1) H 6. SOT23-5 version has no center lead (shown as a dashed line). A GAUGE PLANE c L 0° +3° -0° 0.25 14 FN6378.2 September 13, 2007 ISL28168, ISL28268 Small Outline Package Family (SO) A D N (N/2)+1 h X 45° A E E1 PIN #1 I.D. MARK c SEE DETAIL “X” 1 B (N/2) L1 0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X SEATING PLANE L 4° ±4° 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150”) 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300”) (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX ±0.003 ±0.002 ±0.003 ±0.001 ±0.004 ±0.008 ±0.004 Basic ±0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07 15 FN6378.2 September 13, 2007 ISL28168, ISL28268 Mini SO Package Family (MSOP) 0.25 M C A B D N A (N/2)+1 MDP0043 MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. ±0.05 ±0.09 +0.07/-0.08 ±0.05 ±0.10 ±0.15 ±0.10 Basic ±0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. E E1 PIN #1 I.D. A2 b c B 1 (N/2) D E E1 e C SEATING PLANE 0.10 C N LEADS b H e L L1 N 0.08 M C A B L1 A c SEE DETAIL "X" 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. A2 GAUGE PLANE L DETAIL X 0.25 A1 3° ±3° All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 FN6378.2 September 13, 2007