ISL28286

® ISL28286, ISL28486 Data Sheet September 22, 2006 FN6312.0 Dual Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op-Amp The ISL28286 and ISL28486 are Dual and Quad channel micropower precision operational amplifiers optimized for single supply operation at 5V down to 2.4V. For equivalent performance in a single channel op-amp reference EL8186. The ISL28286 and ISL28486 feature an Input Range Enhancement Circuit (IREC) which enables both parts to maintain CMRR performance for input voltages equal to the positive and negative supply rails. The input signal is capable of swinging 10% above the positive supply rail and to ground with only a slight degradation of the CMRR performance. The output operation is rail to rail. Both parts draw minimal supply current while meeting excellent DC-accuracy, AC-performance, noise and output drive specifications. The ISL28286 and ISL28486 can be operated from a single lithium cell or two Ni-Cd batteries. The input range includes both positive and negative rail. Features • 120µA typ supply current for both channels • 600µV max offset voltage • 500pA typ input bias current • 400kHz gain-bandwidth product • 115dB PSRR and CMRR • Single supply operation down to 2.4V • Input is capable of swinging above V+ and to V- (ground sensing) • Rail-to-rail input and output (RRIO) • Pb-free plus anneal available (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 25mA current loops • Handheld consumer products • Medical devices • Thermocouple amplifiers Ordering Information PART NUMBER ISL28286FUZ (See Note) PART MARKING 8286Z TAPE & REEL 50/Tube PACKAGE PKG. DWG. # • Photodiode pre-amps • pH probe amplifiers 10 Ld MSOP MDPOO43 (Pb-free) ISL28286FUZ-T7 8286Z (See Note) Coming Soon ISL28486FAZ (Note) 28486FAZ 7” 10 Ld MSOP MDP0043 (1500 pcs) (Pb-free) 97/Tube 16 Ld QSOP MDP0040 (Pb-free) 28486FAZ Coming Soon ISL28486FAZ-T7 (Note) 7” 16 Ld QSOP MDP0040 (1000 pcs) (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL28286, ISL28486 Pinouts ISL28286 (10 LD MSOP) TOP VIEW IN+_A 1 EN_A 2 V- 3 EN_B 4 IN+_B 5 + + 10 IN-_A 9 OUT_A 8 V+ 7 OUT_B 6 IN-_B OUT_A 1 IN-_A 2 + IN+_A 3 V+ 4 IN+_B 5 IN-_B 6 OUT_B 7 NC 8 + + + ISL28486 (16 LD QSOP) TOP VIEW 16 OUT_D 15 IN-_D 14 IN+_D 13 V12 IN+_C 11 IN-_C 10 OUT_C 9 NC 2 FN6312.0 September 22, 2006 ISL28286, ISL28486 Absolute Maximum Ratings (TA = +25°C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Operating Junction Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data guaranteed by characterization CONDITIONS MIN -600 -650 TYP ±20 PARAMETER VOS Δ V OS -----------------Δ Time Δ V OS --------------ΔT IOS IB eN DESCRIPTION Input Offset Voltage Long Term Input Offset Voltage Stability Input Offset Drift vs Temperature Input Offset Current Input Bias Current Input Noise Voltage Peak-to-Peak Input Noise Voltage Density MAX 600 650 UNIT µV µV/Mo µV/°C 1.2 0.3 -1.5 -1.5 -2 -2.5 f = 0.1Hz to 10Hz fO = 1kHz fO = 1kHz Guaranteed by CMRR test VCM = 0V to 5V V+ = 2.4V to 5V VO = 0.5V to 4.5V, RL = 100kΩ VO = 0.5V to 4.5V, RL = 1kΩ 0 90 80 90 80 275 275 115 115 500 25 3 130 4.990 4.97 4.800 4.750 0.13 0.10 0.10 0.09 4.996 4.880 0.17 0.13 0.20 0.25 0.17 0.19 6 30 175 225 ±0.25 2.5 2.5 2 2.5 nA nA µVPP nV/√Hz pA/√Hz ±0.5 4.5 48 0.18 5 iN CMIR CMRR PSRR AVOL Input Noise Current Density Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain V dB dB V/mV V/mV mV mV V V V/µs V/µs VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ Output low, RL = 1kΩ Output high, RL = 100kΩ Output high, RL = 1kΩ SR+ SR- Positive Slew Rate Negative Slew Rate 3 FN6312.0 September 22, 2006 ISL28286, ISL28486 Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data guaranteed by characterization (Continued) CONDITIONS MIN TYP 400 All channels enabled. All channels disabled. R L = 1 0Ω R L = 1 0Ω 29 23 24 19 2.4 2 0.8 VEN = 5V VEN = 0V -0.1 0.7 0 1.3 1.5 +0.1 120 4 31 26 156 175 7 9 MAX UNIT kHz µA µA mA mA V V V µA µA PARAMETER GBW IS,ON IS,OFF ISC+ ISCVS VINH VINL IENH IENL DESCRIPTION Gain Bandwidth Product Supply Current, Enabled Supply Current, Disabled Short Circuit Sourcing Capability Short Circuit Sinking Capability Minimum Supply Voltage Enable Pin High Level Enable Pin Low Level Enable Pin Input Current Enable Pin Input Current Typical Performance Curves +1 0 -1 -2 GAIN (dB) -3 -4 -5 -6 -7 8 1k 10k 100k FREQUENCY (Hz) 1M 5M Vout = 50mVp-p AV = 1 CL = 3pF RF = 0/RG = INF VS = ±2.5V RL = 1k VS = ±2.5V RL = 10k VS = ±1.2V RL = 1k VS = ±1.2V RL = 10k 45 40 35 30 GAIN (dB) 25 VS = ±1.25V AV = 100 VS = ±2.5V 15 RL = 10kΩ CL = 2.7pF 10 R /R = 99.02 VS = ±1.0V FG RF = 221kΩ 5 RG = 2.23kΩ 0 100 1k 10k 100k 20 FREQUENCY (Hz) 1M FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE 200 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) VCM = VDD/2 150 AV = -1 100 50 0 -50 -100 -150 -200 0 1 2 3 4 5 OUTPUT VOLTAGE (V) VDD = 2.5V VDD = 5V 0 -20 VOS, µV -40 -60 -80 -100 0 1 2 3 4 5 COMMON-MODE INPUT VOLTAGE (V) FIGURE 3. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE FIGURE 4. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 4 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 120 80 GAIN (dB) 40 0 -40 -80 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) (Continued) 80 40 PHASE (°) 0 -40 -80 -120 10M GAIN (dB) 100 80 PHASE 60 40 0 20 0 -20 10 GAIN -50 -100 -150 1M 200 150 100 50 PHASE (°) 100 1k 10k 100k FREQUENCY (Hz) FIGURE 5. AVOL vs FREQUENCY @ 100kΩ LOAD FIGURE 6. AVOL vs FREQUENCY @ 1kΩ LOAD 120 110 100 90 PSRR (dB) 80 70 60 50 40 30 20 10 0 10 PSRR VS = 5VDC VSOURCE = 1Vp-p RL = 100kΩ AV = +1 100 1k 10k 100k 1M PSRR + CMRR(dB) 100 90 80 70 60 50 40 30 20 10 10 100 1k VS = 5VDC VSOURCE = 1Vp-p RL = 100kΩ AV = +1 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 7. PSRR vs FREQUENCY FIGURE 8. CMRR vs FREQUENCY 2.56 2.54 2.52 VOLTS (V) 2.50 2.48 2.46 2.44 2.42 0 2 4 6 8 10 12 TIME (µs) 14 16 18 20 VS = 5VDC VOUT = 0.1Vp-p RL = 500Ω AV = +1 VOLTS (V) VOUT VIN 5.0 VIN 4.0 3.0 2.0 1.0 VOUT 0 0 100 200 300 TIME (µs) 400 VIN 500 VS = 5VDC VOUT = 0.1Vp-p RL = 500Ω AV = -2 VOUT FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSE FIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE 5 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 10.00 CURRENT NOISE (pA/√Hz) VOLTAGE NOISE (nV/√Hz) (Continued) 1k 1.00 100 0.10 10 0.01 1 10 100 1k 10k 100k FREQUENCY (Hz) 1 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 11. CURRENT NOISE vs FREQUENCY FIGURE 12. VOLTAGE NOISE vs FREQUENCY 6 V+ = 5V 5 VOLTAGE NOISE (1µV/DIV) 4 VOLTS (V) 100K VS + VIN 3 2 1 100K DUT + VS - 1K Function Generator 33140A VOUT 4.5µVP-P 0 0 TIME (1s/DIV) 50 100 TIME (ms) 150 200 FIGURE 13. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE FIGURE 14. INPUT VOLTAGE SWING ABOVE THE V+ SUPPLY 155 135 115 95 75 0.1V/DIV 55 35 2 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE (V) 0 VOUT 1V/DIV EN Input AV = -1 VIN = 200mVp-p V+ = 5V V- = 0V SUPPLY CURRENT (µA) 0 10µs/DIV FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 16. ENABLE TO OUTPUT DELAY TIME 6 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 150 n = 12 140 CURRENT (µA) 130 120 110 100 90 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN CURRENT (µA) MAX (Continued) 4.8 4.6 4.4 4.2 4 3.8 3.6 MIN MEDIAN MAX n = 12 MIN 3.4 3.2 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 17. SUPPLY CURRENT vs TEMPERATURE VS = ±2.5V ENABLED. RL = INF FIGURE 18. SUPPLY CURRENT vs TEMPERATURE VS = ±2.5V DISABLED. RL = INF 1.6 1.4 1.2 CURRENT (nA) 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -40 1 1.6 n = 12 MAX CURRENT (nA) 1.4 1.2 1 0.8 0.6 0.4 0.2 0 MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 -0.2 -0.4 -40 n = 12 MAX MEDIAN MEDIAN MIN -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 19. I BIAS(+) vs TEMPERATURE VS = ±2.5V FIGURE 20. I BIAS(+) vs TEMPERATURE VS = ±1.2V 1.5 1 CURRENT (nA) 0.5 0 -0.5 -1 -1.5 1.5 n = 12 MAX CURRENT (nA) 1 0.5 0 -0.5 -1 MIN MIN -1.5 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 n = 12 MAX MEDIAN MEDIAN -2 FIGURE 21. I BIAS(-) vs TEMPERATURE VS = ±2.5V FIGURE 22. I BIAS(-) vs TEMPERATURE VS = ±1.2V 7 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 2.5 2 1.5 CURRENT (nA) 1 0.5 0 -0.5 -1 -1.5 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN MEDIAN CURRENT (pA) n = 12 MAX 2 1.5 1 0.5 0 -0.5 MIN -1 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN (Continued) 2.5 n = 12 MAX FIGURE 23. INPUT OFFSET CURRENT vs TEMPERATURE VS = ±2.5V FIGURE 24. INPUT OFFSET CURRENT vs TEMPERATURE VS = ±1.2V 300 200 100 VOS (µV) 0 MEDIAN -100 -200 -300 -400 -500 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN n = 12 MAX 400 n = 12 300 200 VOS (µV) 100 0 -100 -200 -300 MIN -400 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MAX MEDIAN FIGURE 25. INPUT OFFSET VOLTAGE vs TEMPERATURE VS = ±2.5V FIGURE 26. INPUT OFFSET VOLTAGE vs TEMPERATURE\ VS = ±1.2V 130 n = 12 125 120 PSRR (dB) CMRR (dB) MAX 140 n = 12 130 MAX 120 110 100 MEDIAN MIN 90 80 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN 115 110 105 100 95 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN FIGURE 27. CMRR vs TEMPERATURE VCM = +2.5V TO -2.5V FIGURE 28. PSRR vs TEMPERATURE VS = ±2.5V 8 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 4.91 n = 12 4.9 4.89 VOUT (V) 4.88 4.87 MEDIAN 4.86 4.85 4.84 -40 MIN 100 80 -20 0 20 40 60 80 100 120 -40 -20 0 TEMPERATURE (°C) 20 40 60 80 100 TEMPERATURE (°C) 120 MIN VOUT (mV) MAX 180 MAX 160 140 120 MEDIAN (Continued) 200 n = 12 FIGURE 29. POSITIVE VOUT vs TEMPERATURE RL = 1k VS = ±2.5V FIGURE 30. NEGATIVE VOUT vs TEMPERATURE RL = 1k VS = ±2.5V 4.9985 4.998 4.9975 VOUT (V) n = 12 MAX 6 5.5 5 n = 12 MAX MEDIAN 4.997 4.9965 4.996 4.9955 -40 MIN VOUT (mV) 4.5 4 3.5 3 2.5 MEDIAN MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 31. POSITIVE VOUT vs TEMPERATURE RL = 100k VS = ±2.5V FIGURE 32. NEGATIVE VOUT vs TEMPERATURE RL = 100k VS = ±2.5V 0.032 0.031 0.03 IIL (µA) 0.029 0.028 0.027 0.026 -40 0.95 n = 12 0.9 0.85 MAX IIH (µA) 0.8 0.75 0.7 MEDIAN MIN 0.65 0.6 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) MEDIAN MIN n = 12 MAX FIGURE 33. IIL (EN) vs TEMPERATURE VS = ±2.5V FIGURE 34. IIH (EN) vs TEMPERATURE VS = ±2.5V 9 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 0.23 n = 12 0.21 SLEW RATE (V/µs) 0.19 0.17 0.15 0.13 0.11 0.09 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN 0.11 0.1 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN MAX CURRENT (pA) (Continued) 0.17 n = 12 0.16 0.15 0.14 0.13 0.12 MIN MEDIAN MAX FIGURE 35. + SLEW RATE vs TEMPERATURE VS = ±2.5V INPUT = ±0.75V AV = 2 FIGURE 36. - SLEW RATE vs TEMPERATURE VS = ±2.5V INPUT = ±0.75V AV = 2 800 n = 12 700 600 AVOL (V/mV) 500 MEDIAN 400 300 200 100 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN AVOL (V/mV) MAX 750 n = 12 MAX 600 450 MEDIAN 300 MIN 150 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 37. AVOL CH A vs TEMPERATURE RL = 100K VO = ±2V VS = ±2.5V FIGURE 38. AVOL CH B vs TEMPERATURE RL = 100K VO = ±2V VS = ±2.5V JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 POWER DISSIPATION (W) POWER DISSIPATION (W) 1.2 1 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) 893mW QS OP θ JA 16 =1 12 °C /W JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.2 1 0.8 633mW 0.6 θJ QS O A =1 P1 0.4 0.2 0 0 25 58 6 °C /W 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 40. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 10 FN6312.0 September 22, 2006 ISL28286, ISL28486 Typical Performance Curves 1 POWER DISSIPATION (W) (Continued) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD POWER DISSIPATION (W) 0.6 0.5 0.9 0.8 870mW 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 θ M JA = 11 8/10 5° C/ W SO P 486mW 0.4 0.3 0.2 0.1 0 θ M JA = SO P 20 8/10 6° C/ W 50 75 85 100 125 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) FIGURE 41. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 42. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Pin Descriptions ISL28286 ISL28486 (10 LD MSOP) (16 LD QSOP) 1 2 3 4 5 6 7 8 9 10 5 6 7 4 1 2 10 11 12 14 15 16 8, 9 13 3 PIN NAME IN+_A EN_A VEN_B IN+_B IN-_B OUT_B V+ OUT_A IN-_A OUT_C IN-_C IN+_C IN+_D IN-_D OUT_D NC EQUIVALENT CIRCUIT Circuit 1 Circuit 2 Circuit 4 Circuit 2 Circuit 1 Circuit 1 Circuit 3 Circuit 4 Circuit 3 Circuit 1 Circuit 3 Circuit 1 Circuit 1 Circuit 1 Circuit 1 Circuit 3 Amplifier A non-inverting input Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. Negative power supply Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. Amplifier B non-inverting input Amplifier B inverting input Amplifier B output Positive power supply Amplifier A output Amplifier A inverting input Amplifier C output Amplifier C inverting input Amplifier C non-inverting input Amplifier D non-inverting input Amplifier D inverting input Amplifier D output No internal connection V+ V+ LOGIC PIN VCIRCUIT 2 CIRCUIT 3 OUT VVCIRCUIT 4 DESCRIPTION V+ IN- V+ CAPACITIVELY COUPLED ESD CLAMP IN+ V- CIRCUIT 1 11 FN6312.0 September 22, 2006 ISL28286, ISL28486 Applications Information Introduction The ISL28286 and ISL28486 are enhanced rail-to-rail input micropower precision operational amplifiers with an enable feature. The part is designed to operate from single supply (2.4V to 5.0V) or dual supply (±1.2V to ±2.5V). The device is capable of swinging 10% above the positive supply rail and to ground. The parts maintains CMRR performance for input voltages equal to the positive supply. The output operation can swing within about 4mV of the supply rails with a 100kΩ load (reference Figures 29 through 32). Rail-to-Rail Output A pair of complementary MOSFET devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. Both parts with a 100kΩ load will swing to within 4mV of the supply rails. Enable/Disable Feature The ISL28286 and ISL28486 offer an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 4µA. By disabling the part, multiple parts can be connected together as a MUX. The outputs are tied together in parallel and a channel can be selected by the EN pin. The EN pin also has an internal pull down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. Rail-to-Rail Input The input common-mode voltage range of both parts goes from 10mV above the negative supply to the positive supply without introducing additional offset errors or degrading performance associated with a conventional rail-to-rail input operational amplifier. Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The ISL28286 and ISL28486 achieves input rail-to-rail without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current versus the common-mode voltage range gives us an undistorted behavior from the negative rail and 10% higher than the V+ rail (0.5V higher than V+ when V+ equals 5V). Using Only One Channel The ISL28286 and ISL28486 are Dual and Quad channel op-amps. If the application only requires one channel when using the ISL28286 or less than 4 channels when using the ISL28486, the user must configure the unused channel (s) to prevent them from oscillating. The unused channel (s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 43). + 1/2 ISL28286 1/4 ISL28486 Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Both parts have additional back-to-back diodes across the input terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. External series resistors may be used as an external protection to limit excessive external voltage and current from damaging the inputs. FIGURE 43. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Proper Layout Maximizes Performance To achieve the maximum performance of the high input impedance and low offset voltage of the ISL28286 and ISL28486, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 44 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. For further reduction of leakage currents, components can be mounted Input Bias Current Compensation The input bias currents are decimated down to a typical of 500pA while maintaining an excellent bandwidth for a micropower operational amplifier. Inside the ISL28286 and ISL28478 is an input bias canceling circuit. The input stage transistors are still biased with an adequate current for speed but the canceling circuit sinks most of the base current, leaving a small fraction as input bias current. 12 FN6312.0 September 22, 2006 ISL28286, ISL28486 to the PC board using Teflon standoff insulators. HIGH IMPEDANCE INPUT IN V+ 1/2 ISL28286 Current Limiting The ISL28286 and ISL28486 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation FIGURE 44. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER Example Application Thermocouples are the most popular temperature-sensing device because of their low cost, interchangeability, and ability to measure a wide range of temperatures. The ISL28286 (Figure 45) is used to convert the differential thermocouple voltage into single-ended signal with 10X gain. The ISL28286's rail-to-rail input characteristic allows the thermocouple to be biased at ground and the converter to run from a single 5V supply. R4 100kΩ R3 R2 K TYPE THERMOCOUPLE 10kΩ 10kΩ V+ + ISL28286 V- It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as follows: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × --------------------------R (EQ. 2) L 410µV/°C + 5V where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package R1 100kΩ • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance FIGURE 45. THERMOCOUPLE AMPLIFIER 13 FN6312.0 September 22, 2006 ISL28286, ISL28486 Mini SO Package Family (MSOP) 0.25 M C A B D N A (N/2)+1 MDP0043 MINI SO PACKAGE FAMILY SYMBOL A A1 A2 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. ±0.05 ±0.09 +0.07/-0.08 ±0.05 ±0.10 ±0.15 ±0.10 Basic ±0.15 Basic Reference NOTES 1, 3 2, 3 Rev. C 6/99 E E1 PIN #1 I.D. b c D B 1 (N/2) E E1 e e C SEATING PLANE 0.10 C N LEADS b H L L1 N 0.08 M C A B NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. L1 A c SEE DETAIL "X" 4. Dimensioning and tolerancing per ASME Y14.5M-1994. A2 GAUGE PLANE L DETAIL X 0.25 A1 3° ±3° 14 FN6312.0 September 22, 2006 ISL28286, ISL28486 Quarter Size Outline Plastic Packages Family (QSOP) A D N (N/2)+1 MDP0040 QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES A PIN #1 I.D. MARK 0.068 0.006 0.056 0.010 0.008 0.193 0.236 0.154 0.025 0.025 0.041 16 0.068 0.006 0.056 0.010 0.008 0.341 0.236 0.154 0.025 0.025 0.041 24 0.068 0.006 0.056 0.010 0.008 0.390 0.236 0.154 0.025 0.025 0.041 28 Max. ±0.002 ±0.004 ±0.002 ±0.001 ±0.004 ±0.008 ±0.004 Basic ±0.009 Basic Reference 1, 3 2, 3 Rev. E 3/01 A1 A2 b c E E1 1 B 0.010 CAB (N/2) D E E1 e C SEATING PLANE 0.004 C 0.007 CAB b H e L L1 N NOTES: L1 A c SEE DETAIL "X" 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L 4°±4° DETAIL X A1 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 FN6312.0 September 22, 2006