ISL3282EMRTEP-TK

±16.5kV ESD Protected, +125°C, 3.0V to 5.5V, TDFN Packaged, 16Mbps, Full Fail-safe, Low Power, RS-485/RS-422 Receiver ISL3282EMRTEP The Intersil ISL3282EMRTEP is a ±16.5kV IEC61000 ESD protected, 3.0V to 5.5V powered, single receiver that meets both the RS-485 and RS-422 standards for balanced communication. This receiver has very low bus currents (+125µA/-100µA), so it presents a true “1/8 unit load” to the RS-485 bus. This allows up to 256 receivers on the network without violating the RS-485 specification’s 32 unit load maximum and without using repeaters. Receiver inputs feature a “Full Fail-Safe” design, which ensures a logic high Rx output if Rx inputs are floating, shorted, or terminated but undriven. The ISL3282EMRTEP includes an active low enable pin and is offered in the Military Temperature range (-55°C to +125°C). A 26% smaller footprint is available with the TDFN package. This device also features a logic supply pin (VL) that sets the VOH level of the RO output (and the switching points of the RE/RE input) to be compatible with another supply voltage in mixed voltage systems. Features • Specifications per DSCC VID V62/10601-01XB • Full Mil-Temp Electrical Performance from -55°C to +125°C • Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site • Full Homogeneous Lot Processing in Wafer Fab • No Combination of Wafer Fabrication Lots in Assembly • Full Traceability Through Assembly and Test by Date/Trace Code Assignment • Enhanced Process Change Notification • Enhanced Obsolescence Management • Eliminates Need for Up-Screening a COTS Component • ±16.5kV IEC61000 ESD Protection on RS-485 Inputs • Class 3 ESD Level on all Other Pins . . . . . . . . . . . . .>5kV HBM • Pb-Free (RoHS Compliant) • Wide Supply Range . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V • Specified for +125°C Operation • Logic Supply Pin (VL) Eases Operation in Mixed Supply Systems • Full Fail-safe (Open, Short, Terminated/Undriven) • True 1/8 Unit Load Allows up to 256 Devices on the Bus • High Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . up to 16Mbps • Low Quiescent Supply Current . . . . . . . . . . . . . . 500µA (Max) • Very Low Shutdown Supply Current . . . . . . . . . . . 20µA (Max) • -7V to +12V Common Mode Input Voltage Range • Tri-statable Rx Available (Active Low or High EN Input) • 5V Tolerant Logic Inputs When VCC ≤ 5V Device Information The specifications for an Enhanced Product (EP) device are defined in a Vendor Item Drawing (VID), which is controlled by the Defense Supply Center in Columbus (DSCC). “Hot-links” to the applicable VID and other supporting application information are provided on our website. Applications • Clock Distribution • High Node Count Systems • Space Constrained Systems • Security Camera Networks • Building Environmental Control/Lighting Systems • Industrial/Process Control Networks TABLE 1. SUMMARY OF FEATURES PART NUMBER ISL3282EMRTEP FUNCTION 1 Rx DATA RATE (Mbps) 16 # DEVICES ON BUS 256 RX ENABLE? ACTIVE LOW VL PIN? YES QUIESCENT ICC (µA) 350 LOW POWER SHUTDOWN? YES LEAD COUNT 8-TDFN February 15, 2011 FN7595.1 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2010, 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL3282EMRTEP Ordering Information PART NUMBER (Notes 1, 2) ISL3282EMRTEP-T ISL3282EMRTEP-TK NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Please refer to TB347 for details on reel specifications. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL3282EMRTEP. For more information on MSL please see techbrief TB363. VENDOR ITEM DRAWING V62/10601-01XB V62/10601-01XB 282 282 PART MARKING TEMP. RANGE (°C) -55 to +125 -55 to +125 PACKAGE (Tape and Reel) (Pb-Free) 8 Ld TDFN 8 Ld TDFN Truth Table RECEIVING INPUTS RE 0 0 0 1 A-B ≥ -0.05V ≤ -0.2V Inputs Open/Shorted X OUTPUT RO 1 0 1 High-Z* Pin Configurations ISL3282EMRTEP (8 LD TDFN) TOP VIEW RO GND NC VCC 1 2 3 4 R 8 7 6 5 B RE VL A Pin Descriptions PIN NAME RO RE GND A B VCC VL NC FUNCTION Receiver output: If A - B ≥ -50mV, RO is high; If A - B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted. Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t used, connect RE directly to GND. RE is internally pulled high. Ground connection. This is also the potential of the TDFN thermal pad. ±16.5kV IEC61000 ESD Protected RS-485, RS-422 level, noninverting receiver input. ±16.5kV IEC61000 ESD Protected RS-485, RS-422 level, inverting receiver input. System power supply input (3.0V to 5.5V). On devices with a VL pin, power-up VCC first. Logic-Level Supply which sets the VIL/VIH levels for the RE pin, and sets the VOH level of the RO output. Power-up this supply after VCC, and keep VL ≤ VCC. No Connection. 2 FN7595.1 February 15, 2011 ISL3282EMRTEP Typical Operating Circuits NETWORK WITH VL PIN FOR INTERFACE TO LOWER VOLTAGE LOGIC DEVICES 1.8V 6 VCC VL +3.3V TO 5V + 4 VCC RT 0.1µF 0.1µF + 8 VCC 1 VL VCC +3.3V 2.5V ISL3282EMRTEP LOGIC DEVICE (µP, ASIC, UART) ISL3298EMRTEP 5 8 6 7 Y Z D DI 3 DE 2 LOGIC DEVICE (mP, ASIC, UART) 1 RO 7 RE A R B GND 2 GND 4, 5 Test Circuits and Waveforms VCC GND B A R RE RE RO 15pF B 0V A tPLH SIGNAL GENERATORS RO 50% tPHL VCC OR VL 50% 0V 0V -1V +1V FIGURE 1A. TEST CIRCUIT FIGURE 1B. MEASUREMENT POINTS FIGURE 1. RECEIVER PROPAGATION DELAY AND DATA RATE RE GND SIGNAL GENERATOR B A R RO 1kΩ VCC OR VL SW 15pF RO GND tZH OUTPUT HIGH 50% tHZ RE 1.5V 1.5V 3V 0V VOH - 0.25V VOH 0V PARAMETER tHZ tLZ tZH tZL A +1.5V -1.5V +1.5V -1.5V SW GND VCC OR VL GND VCC OR VL RO tZL 50% OUTPUT LOW tLZ VCC OR VL VOL + 0.25V V OL FIGURE 2A. TEST CIRCUIT FIGURE 2B. MEASUREMENT POINTS FIGURE 2. RECEIVER ENABLE AND DISABLE TIMES 3 FN7595.1 February 15, 2011 ISL3282EMRTEP Application Information RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000’, so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. GND VCC = +3.3V TO 5V VCC = +2V VL RO VOH = 2V RXD ESD DIODE RE VIH = 1V VOH ≤ 2V RXEN GND ISL3282E UART/PROCESSOR FIGURE 3. USING VL PIN TO ADJUST LOGIC LEVELS Wide Supply Range The ISL3282EMRTEP is designed to operate with a wide range of supply voltages from 3.0V to 5.5V. This device meets the RS-422 and RS-485 specifications over this full range. Receiver Features This device utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is better than ±200mV, as required by the RS-422 and RS-485 specifications. Receiver input resistance of 96kΩ surpasses the RS-422 specification of 4kΩ and is eight times the RS-485 “Unit Load (UL)” requirement of 12kΩ minimum. Thus, these products are known as “one-eighth UL” transceivers and there can be up to 256 of these devices on a network while still complying with the RS-485 loading specification. Receiver inputs function with common mode voltages as great as +9V/-7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks where induced voltages, and ground potential differences are realistic concerns. The ISL3282EMRTEP includes a “full fail-safe” function that guarantees a high level receiver output if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated but undriven bus. Fail-safe with shorted inputs is achieved by setting the Rx upper switching point to -50mV, thereby ensuring that the Rx sees 0V differential as a high input level. The receiver can easily support a 16Mbps data rate, and its output is tri-statable via the active low RE input. TABLE 2. VIH, VIL AND DATA RATE vs VL FOR VCC = 3.3V OR 5V VL (V) 1.35 1.6 1.8 2.3 2.7 3.3 5.5 (i.e., VCC) VIH (V) 0.55 0.7 0.8 1 1.1 1.3 2 VIL (V) 0.5 0.6 0.7 0.9 1 1.2 1.8 DATA RATE (Mbps) 11 16 23 27 30 30 24 Logic Supply (VL Pin) Note: Power-up VCC before powering up the VL supply. The ISL3282EMRTEP includes a VL pin that powers the logic input (RE) and/or the Rx output. These pins interface with “logic” devices such as UARTs, ASICs, and microcontrollers. Today, most of these devices use power supplies significantly lower than 3.3V, thus, a 3.3V output level from a 3.3V powered RS-485 IC might seriously overdrive and damage the logic device input. Similarly, the logic device’s low VOH might not exceed the VIH of a 3.3V or 5V powered RE input. Connecting the VL pin to the power supply of the logic device (as shown in Figure 3) limits the ISL3282EMRTEP’s Rx output VOH to VL (see Figures 6 through 10), and reduces the RE input switching point to a value compatible with the logic device’s output levels. Tailoring the logic pin input switching point and output levels to the supply voltage of the UART, ASIC, or microcontroller eliminates the need for a level shifter/translator between the two ICs. VL can be anywhere from VCC down to 1.35V, but the input switching points may not provide enough noise margin when VL < 1.6V. Table 2 indicates typical VIH, VIL, and data rate values for various VL settings so the user can ascertain whether or not a particular VL voltage meets his/her needs. The quiescent, RO unloaded, VL supply current (IL) is typically less than 60µA for VL ≤ 3.3V, as shown in Figure 5. ESD Protection All pins on the device include class 3 (>4kV) Human Body Model (HBM) ESD protection structures, but the RS-485 pins (receiver inputs) incorporate advanced structures allowing them to survive ESD events in excess of ±16.5kV HBM and ±16.5kV IEC61000. The RS-485 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, and without degrading the RS-485 common mode range of -7V to +12V. This built-in 4 FN7595.1 February 15, 2011 ISL3282EMRTEP ESD protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. Data Rate, Cables, and Terminations RS-485, RS-422 are intended for network lengths up to 4000’, but the maximum system data rate decreases as the transmission length increases. Networks operating at 16Mbps are limited to lengths less than 100’, while a 250kbps network that uses slew rate limited transmitters can operate at that data rate over lengths of several thousand feet. Twisted pair is the cable of choice for RS-485, RS-422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receiver in these ICs. To minimize reflections, proper termination is imperative for high data rate networks. Short networks using slew rate limited transmitters need not be terminated, but terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transmitter or receiver to the main cable should be kept as short as possible. IEC61000-4-2 Testing The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-485 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device’s RS-485 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-485 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The A and B RS-485 pins withstand ±16.5kV air-gap discharges. CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than ±9kV. The ISL3282EMRTEP can survive ±9kV contact discharges on the RS485 pins. Low Power Shutdown Mode This BiCMOS receiver uses a fraction of the power required by its bipolar counterparts, and include a shutdown feature that reduces the already low quiescent ICC to a 20µA trickle. They enter shutdown whenever the receiver is disabled (RE = VCC ). 5 FN7595.1 February 15, 2011 ISL3282EMRTEP Typical Performance Curves 440 430 420 ICC (µA) IL (mA) 410 400 390 380 370 -55 VCC = VL = 3.3V 50 150 VL = 5V, VCC = 5V ONLY VL ≤ 1.8V VL = 3.3V -35 -15 5 25 45 65 85 105 125 0 VL = 2.5V 0 1 2 3 4 5 6 7 7.5 RE VOLTAGE (V) VCC = VL = 5.5V 200 CL = 15pF, TA = +25°C; Unless Otherwise Specified. 250 VCC = 5V OR 3.3V 100 TEMPERATURE (°C) FIGURE 4. SUPPLY CURRENT vs TEMPERATURE FIGURE 5. VL SUPPLY CURRENT vs ENABLE PIN VOLTAGE 60 RECEIVER OUTPUT CURRENT (mA) 50 40 30 20 10 0 VOH, +25°C RECEIVER OUTPUT CURRENT (mA) VCC = VL = 5V 30 VOL, +25°C VOL, +85°C VOL, +125°C VOL, +25°C 25 VOH, +25°C 20 15 VOH, +125°C 10 5 VCC = 5V OR 3.3V, VL = 3.3V 0 VOL, +85°C VOL, +125°C VOH, +125°C VOH, +85°C VOH, +85°C 0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.3 RECEIVER OUTPUT VOLTAGE (V) RECEIVER OUTPUT VOLTAGE (V) FIGURE 6. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE FIGURE 7. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE 20 RECEIVER OUTPUT CURRENT (mA) 18 16 14 RECEIVER OUTPUT CURRENT (mA) VCC = 5V OR 3.3V, VL = 2.5V 9 VOL, +25°C VOL, +85°C VOL, +125°C 8 7 6 5 4 3 2 1 0 0 VCC = 5V OR 3.3V, VL = 1.8V VOL, +25°C VOL, +85°C VOL, +125°C 12 VOH, +25°C 10 8 6 4 2 0 0 0.5 1.0 1.5 VOH, +125°C VOH, +85°C VOH, +25°C VOH, +125°C VOH, +85°C 2.0 2.5 0.5 1.0 1.5 1.8 RECEIVER OUTPUT VOLTAGE (V) RECEIVER OUTPUT VOLTAGE (V) FIGURE 8. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE FIGURE 9. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE 6 FN7595.1 February 15, 2011 ISL3282EMRTEP Typical Performance Curves 5.0 RECEIVER OUTPUT CURRENT (mA) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.5 20 -55 -35 -15 5 25 45 65 TEMPERATURE (°C) 85 105 125 VOH, +125°C VOH, +25°C VOH, +85°C VCC = 5V or 3.3V, VL = 1.5V VOL, +85°C CL = 15pF, TA = +25°C; Unless Otherwise Specified. (Continued) 45 VOL, +25°C VOL, +125°C PROPAGATION DELAY (ns) 40 35 VCC = 5.5V, TPLH VCC = 5.5V, TPHL 30 25 RECEIVER OUTPUT VOLTAGE (V) FIGURE 10. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE FIGURE 11. RECEIVER PROPAGATION DELAY vs TEMPERATURE 2.5 50 45 40 VCC = 3.3V, TPLH 35 30 25 20 VCC = 3.3V, TPHL PROPAGATION DELAY (ns) 1.5 VCC = 3.3V, SKEW 1.0 0.5 0.0 -55 -35 -15 5 25 45 65 TEMPERATURE (°C) 85 105 125 PROPAGATION DELAY (ns) 2.0 -55 -35 -15 5 25 45 65 TEMPERATURE (°C) 85 105 125 FIGURE 12. RECEIVER SKEW vs TEMPERATURE FIGURE 13. RECEIVER PROPAGATION DELAY vs TEMPERATURE RECEIVER INPUT (V) 4.00 3.50 PROPAGATION DELAY (ns) 3.00 VCC = 5.0V, SKEW 2.50 2.00 1.50 1.00 0.50 0.00 -55 -35 -15 5 25 45 65 TEMPERATURE (°C) 85 105 125 VCC = 5V 2.0 0 -2.0 A-B RECEIVER OUTPUT (V) 5.0 4.0 3.0 2.0 1.0 0 VL = 5V VL = 2.5V VL = 1.5V TIME (20ns/DIV) FIGURE 14. RECEIVER SKEW vs TEMPERATURE FIGURE 15. RECEIVER WAVEFORMS 7 FN7595.1 February 15, 2011 ISL3282EMRTEP Typical Performance Curves RECEIVER INPUT (V) 2.0 0 -2.0 A-B CL = 15pF, TA = +25°C; Unless Otherwise Specified. (Continued) VCC = 3.3V Die Characteristics SUBSTRATE AND TDFN THERMAL PAD POTENTIAL (POWERED UP): GND VL = 3.3V VL = 2.5V VL = 1.5V RECEIVER OUTPUT (V) 4.0 3.0 2.0 1.0 0 TRANSISTOR COUNT: 140 PROCESS: Si Gate BiCMOS TIME (20ns/DIV) FIGURE 16. RECEIVER WAVEFORMS Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE 1/27/11 2/26/10 REVISION FN7595.1 FN7595.0 CHANGE In Figure 4 on page 6, corrected units of y axis from mA to µA. Initial Release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL3282EMRTEP To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at: http://rel.intersil.com/reports/sear For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 8 FN7595.1 February 15, 2011