ISL43112

® ISL43112, ISL43113 Data Sheet July 2004 FN6029.2 Low-Voltage, Dual Supply, SPST, High Performance Analog Switches The Intersil ISL43112 and ISL43113 are precision, high performance analog switches designed to operate from ±1.5V to ±6V supplies. These devices are fully specified for 10% tolerance ±5V and ±3.3V supplies, and feature supply and leakage currents much lower than those of other single SPST switches. Turn-on and turn-off times are also improved. Targeted applications include battery powered equipment that benefit from the devices’ low power consumption (250µW), sub-nanoamp leakage currents, and fast switching speeds (tON = 40ns, tOFF = 25ns). The small SOT-23 packages, and timing that delivers break-before-make operation, make this family ideal for custom multiplexer applications. Additionally, excellent RON flatness maintains signal fidelity over the whole input range, while micro packaging alleviates board space limitations. All these benefits combine to make Intersil’s newest line of low-voltage switches ideal solutions for “Next Generation” designs. The ISL4311X are single-pole/single-throw (SPST) switches, with the ISL43112 being normally open (NO), and the ISL43113 being normally closed (NC). Table 1 summarizes the performance of this family. For single supply versions, see the ISL43110/11 datasheet.. TABLE 1. FEATURES AT A GLANCE ISL43112 Number of Switches Configuration 1 NO 15Ω 42ns / 25ns 20Ω 58ns / 37ns ISL43113 1 NC 15Ω 42ns / 25ns 20Ω 58ns / 37ns Features • Fully Specified at VS = ±5V and ±3.3V for 10% Tolerances • Available in SOT-23 Packaging • Dual Supply Operation . . . . . . . . . . . . . . . . . . . ±1.5V to ±6V • ON Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Ω • RON Flatness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Ω • Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7pC • Low Leakage Current (Max at 85°C) . . 5nA (Off Leakage) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20nA (On Leakage) • Fast Switching Action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns • Break-Before-Make Operation at VS = ±5V • Minimum 2000V ESD Protection per Method 3015.7 • CMOS Logic Compatible • Pb-free Available Applications • Battery Powered, Handheld, and Portable Equipment - Cellular/Mobile Phones, Pagers - Laptops, Notebooks, Palmtops, PDA’s • Communications Systems - Radios - PBX, PABX • Test Equipment - Logic and Spectrum Analyzers - Portable Meters, DVM, DMM • Medical Equipment - Ultrasound, MRI, CAT SCAN - Electrocardiograph, Blood Analyzer • Audio and Video Switching • General Purpose Circuits - Low Voltage DACs and ADCs - Sample and Hold Circuits - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing - Integrator Reset Circuits ±4.5V RON ±4.5V tON / tOFF ±3V RON ±3V tON / tOFF Packages 8 Ld SOIC, 5 Ld SOT-23 Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL43112, ISL43113 Pinouts (Note 1) ISL43112 (SOIC) TOP VIEW COM 1 N.C. N.C. V+ 2 3 4 8 NO 7 V6 IN 5 N.C. ISL43112 (SOT-23) TOP VIEW COM 1 NO 2 4 IN 5 V+ V- 3 ISL43113 (SOIC) TOP VIEW COM 1 N.C. N.C. V+ 2 3 4 8 NC 7 V6 IN 5 N.C. ISL43113 (SOT-23) TOP VIEW COM 1 NC 2 4 IN 5 V+ V- 3 NOTE: 1. Switches Shown for Logic “0” Input. Truth Table LOGIC 0 1 NOTE: ISL43112 OFF ON ISL43113 ON OFF Ordering Information PART NUMBER ISL43112IB ISL43112IB-T ISL43112IBZ (Note) FUNCTION ISL43112IBZ-T (Note) ISL43112IH-T (112I) ISL43112IHZ-T (112I) (Note) ISL43113IB TEMP. RANGE (°C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 8 Ld SOIC Tape and Reel 8 Ld SOIC (Pb-free) PKG. DWG. # M8.15 M8.15 M8.15 Logic “0” ≤ 1.5V; Logic “1” ≥ 3.5V at VS = ±5V Pin Descriptions PIN V+ VIN COM NO NC N.C. System Positive Power Supply Input (+1.5V to +6V) System Negative Power Supply Input (-1.5V to -6V) CMOS Compatible Digital Control Input Analog Switch Common Pin Tape and Reel (Pb-free) M8.15 5 Ld SOT-23, Tape and Reel P5.064 5 Ld SOT-23, P5.064 Tape and Reel (Pb-free) 8 Ld SOIC Tape and Reel 8 Ld SOIC (Pb-free) M8.15 M8.15 M8.15 Analog Switch Normally Open Pin ISL43113IB-T Analog Switch Normally Closed Pin No Internal Connection ISL43113IBZ (Note) ISL43113IBZ-T (Note) ISL43113IH-T (113I) ISL43113IHZ-T (113I) (Note) Tape and Reel (Pb-free) M8.15 5 Ld SOT-23, Tape and Reel 5 Ld SOT-23, Tape and Reel (Pb-free) P5.064 P5.064 2 ISL43112, ISL43113 Absolute Maximum Ratings V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V Input Voltages IN (Note 2). . . . . . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) NO, NC (Note 2) . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Output Voltages COM (Note 2) . . . . . . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 30mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . >2kV Thermal Information Thermal Resistance (Typical, Note 3) θJA (°C/W) 5 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 225 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C Moisture Sensitivity (See Technical Brief TB363) All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range. . . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (Lead Tips Only) Operating Conditions Temperature Range ISL4311XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 2. Signals on NO, NC, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications - ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, VINH = 3.5V, VINL = 1.5V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) Full (NOTE 5) MIN V-1 -5 -1 -5 -2 -20 (V+) - 1.5 V-0.5 TYP 15 5 0.01 0.01 0.01 42 46 25 27 7 >90 58 13 13 30 (NOTE 5) MAX UNITS V+ 20 25 6 8 1 5 1 5 2 20 V+ (V+) - 3.5 0.5 70 85 45 50 20 V Ω Ω Ω Ω nA nA nA nA nA nA V V µA ns ns ns ns pC dB dB pF pF pF PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) VS = ±4.5V, ICOM = 1.0mA, VCOM = 3V, See Figure 4 VS = ±4.5V, ICOM = 1.0mA, VCOM = -3V, 0V, 3V VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V, Note 6 VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V, Note 6 VS = ±5.5V, VCOM = VNO or VNC = ±4.5V, Note 6 25 Full 25 Full 25 Full 25 Full 25 Full Full Full DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q OFF Isolation Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) VNO or VNC = 3V, RL = 300Ω , CL = 35pF, VIN = 0 to V+, See Figure 1 VNO or VNC = 3V, RL = 300Ω , CL = 35pF, VIN = 0 to V+, See Figure 1 CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2 RL = 50Ω , CL = 15pF, f = 100kHz, See Figure 3 RL = 50Ω, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5 25 Full 25 Full 25 25 25 25 25 25 VS = ±5.5V, VIN = 0V or V+ Full NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5 3 ISL43112, ISL43113 Electrical Specifications - ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, VINH = 3.5V, VINL = 1.5V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (°C) Full VS = ±5.5V, VIN = 0V or V+, Switch On or Off VS = ±5.5V, VIN = 0V or V+, Switch On or Off 25 Full Negative Supply Current, I25 Full (NOTE 5) MIN ±1.5 -25 -50 TYP 15 22 -15 -22 (NOTE 5) MAX UNITS ±6 25 50 V µA µA µA µA PARAMETER POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ NOTES: 4. VIN = Input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C. Electrical Specifications - ±3.3V Supply Test Conditions: VSUPPLY = ±3.0V to ±3.6V, VINH = V+, VINL = 0V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) Full (NOTE 5) MIN V-1 -5 -1 -5 -2 -20 2.0 -0.5 -25 -50 TYP 20 25 4 5 1.6 0.9 58 62 37 40 5 >90 55 13 13 30 10 15 -10 -15 (NOTE 5) MAX UNITS V+ 30 40 8 10 1 5 1 5 2 20 0.6 0.5 100 110 65 75 12 25 50 V Ω Ω Ω Ω nA nA nA nA nA nA V V µA ns ns ns ns pC dB dB pF pF pF µA µA µA µA PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) VS = ±3V, ICOM = 1.0mA, VCOM = 2V VS = ±3V, ICOM = 1.0mA, VCOM = -1.5V, 0V, 1.5V VS = ±3.3V, VCOM = ±2V, VNO or VNC = +2V, Note 6 VS = ±3.3V, VCOM = ±2V, VNO or VNC = +2V, Note 6 VS = ±3.3V, VCOM = VNO or VNC = ±2V, Note 6 25 Full 25 Full 25 Full 25 Full 25 Full Full Full DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q OFF Isolation Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) Positive Supply Current, I+ Negative Supply Current, IVNO or VNC = 2V, RL = 300Ω , CL = 35pF, VIN = 0.4V to 2.4V VNO or VNC = 2V, RL = 300Ω , CL = 35pF, VIN = 0.4V to 2.4V CL = 1.0nF, VG = 0V, RG = 0Ω RL = 50Ω , CL = 15pF, f = 100kHz RL = 50Ω, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V f = 1MHz, VNO or VNC = VCOM = 0V VS = ±3.6V, VIN = V- or V+, Switch On or Off VS = ±3.6V, VIN = V- or V+, Switch On or Off 25 Full 25 Full 25 25 25 25 25 25 25 Full 25 Full VS = ±3.6V, VIN = V- or V+ Full NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V POWER SUPPLY CHARACTERISTICS 4 ISL43112, ISL43113 Test Circuits and Waveforms V+ LOGIC INPUT 50% 0V tOFF SWITCH INPUT VOUT 90% SWITCH OUTPUT 0V tON 90% LOGIC INPUT C VNO or NC COM IN RL 300Ω CL 35pF VOUT tr < 20ns tf < 20ns V+ C SWITCH INPUT Logic input waveform is inverted for switches that have the opposite logic sense. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) -----------------------------R L + R ( ON ) FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES FIGURE 1B. TEST CIRCUIT V+ C SWITCH OUTPUT VOUT ∆VOUT RG NO or NC COM VOUT LOGIC INPUT ON OFF ON VG IN CL Q = ∆VOUT x CL C V- LOGIC INPUT FIGURE 2A. MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION FIGURE 2B. TEST CIRCUIT V+ C SIGNAL GENERATOR RON = V1/1mA NO or NC COM V+ C VCOM V- or V+ 1mA V1 IN VINL or VINH IN ANALYZER RL COM NO or NC C V- C V- FIGURE 3. OFF ISOLATION TEST CIRCUIT FIGURE 4. RON TEST CIRCUIT 5 ISL43112, ISL43113 Test Circuits and Waveforms (Continued) V+ NO or NC IN IMPEDANCE ANALYZER COM V- or V+ V- FIGURE 5. CAPACITANCE TEST CIRCUIT Detailed Description The ISL43112 and ISL43113 analog switches offer precise switching capability from ±1.5V to ±6V supplies with low onresistance (15Ω) and high speed operation (tON = 40ns, tOFF = 25ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (±1.5V), low power consumption (250µW), low leakage currents (2nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation. The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 6). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. Supply Sequencing And Overvoltage Protection As with any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see Figure 6). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1kΩ resistor in series with the input (see Figure 6). Power-Supply Considerations The ISL4311X construction is typical of most CMOS analog switches, except that there are only two supply pins: V+ and V-. The power supplies need not be symmetrical for useful operation. As long as the total supply voltage (V+ to V-, including supply tolerances, overshoot, and noise spikes) is less than the 15V maximum supply rating, and the digital input switching point remains reasonable (see “Logic-Level Thresholds” section), the ISL43112/13 function well. The 15V maximum supply rating provides the designer of 12V systems much greater flexibility than switches with a 13V maximum supply voltage. The minimum recommended supply voltage is ±1.5V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages, and the digital input VIL becomes negative at VS ≤ ±2V. Refer to the “Typical Performance” curves for details. V+ and V- power the internal CMOS switches and set their analog voltage limits. These supplies also power the internal logic and level shifters. The level shifters convert the input logic levels to switched V+ and V- signals to drive the analog switch gate terminals. This family of switches is not recommended for single supply applications. For single supply, similar performance, pin OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR IN VNO or NC VCOM VOPTIONAL PROTECTION DIODE FIGURE 6. OVERVOLTAGE PROTECTION 6 ISL43112, ISL43113 compatible, TTL compatible versions of these switches, see the ISL43110/11 data sheet. Leakage Considerations Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog-signal paths and V+ or V-. Logic-Level Thresholds Due to the lack of a GND pin, the switching point of the digital input is referenced predominantly to V+. The digital input is CMOS compatible at ±5V supplies, and is TTL compatible for ±3.3V supplies. For other supply combinations refer to Figures 13 and 14. The switching point has a very low temperature sensitivity, and changes by only 100mV from 85°C to -40°C, regardless of supply voltage. High-Frequency Performance In 50Ω systems, signal response is reasonably flat to 30MHz, with a -3dB bandwidth of nearly 400MHz (see Figure 15). Figure 15 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch’s input to its output. OFF Isolation is the resistance to this feedthrough. Figure 16 details the high OFF Isolation provided by this family. At 10MHz, OFF Isolation is about 50dB in 50Ω systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease OFF Isolation due to the voltage divider action of the switch OFF Impedance and the load impedance. 7 ISL43112, ISL43113 Typical Performance Curves TA = 25°C, VIH = V+, VIL = 0V, Unless Otherwise Specified 150 -40°C 125 VCOM = (V+) -1V ICOM = 1mA 100 50 25°C 85°C -40°C RON (Ω) 75 25 0 1 2 3 4 5 6 VS (±V) 50 I = 1mA 45 COM 40 35 30 25 20 30 85°C 25 25°C 20 -40°C 15 10 30 25 85°C 20 15 -40°C 10 5 -5 -4 -3 VS = ±1.5V 85°C 25°C -40°C VS = ±3.3V RON (Ω) 25°C VS = ±5V -2 -1 0 1 VCOM (V) 2 3 4 5 FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE 40 30 20 20 10 Q (pC) 0 -10 -20 -30 80 -40 -5 -4 -3 -2 -1 0 1 2 3 4 5 0.3 VS = ±3.3V PSRR (dB) 30 40 50 60 70 VS = ±5V 0 10 RL = 50 Ω VS = ±1.5V to ±5.5V, SWITCH OFF VS = ±1.5V VS = ±5.5V, SWITCH ON VS = ±1.5V, SWITCH ON 1 10 FREQUENCY (MHz) 100 1000 VCOM (V) FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE FIGURE 10. PSRR vs FREQUENCY 120 VCOM = (V+) -1V 100 85°C 100 90 tOFF (ns) tON (ns) 80 70 60 -40°C 50 40 30 1 2 3 VS (±V) 4 5 6 25°C VIN = 0 to V+ RL = 300Ω 80 VCOM = (V+) -1V 70 85°C 60 50 40 30 -40°C 20 10 1 2 3 VS (±V) 4 5 6 25°C VIN = 0 to V+ RL = 300Ω FIGURE 11. TURN - ON TIME vs SUPPLY VOLTAGE FIGURE 12. TURN - OFF TIME vs SUPPLY VOLTAGE 8 ISL43112, ISL43113 Typical Performance Curves TA = 25°C, VIH = V+, VIL = 0V, Unless Otherwise Specified (Continued) 3.5 -40°C to 85°C 4 VINH V+ = 5V 3 VINH AND VINL (V) V+ = 5V VINL 2 V+ = 3.3V VINH V+ = 3.3V 1 VINL 3 2.5 VINH AND VINL (V) VINH 2 1.5 VINH 1 0.5 0 -0.5 VINL 1 2 3 VS (±V) 4 5 6 0 -5 -4 -3 V- (V) -2 -1 0 FIGURE 13. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE FIGURE 14. DIGITAL SWITCHING POINT vs NEGATIVE SUPPLY VOLTAGE 10 VS = ±1.5V to ±5.5V 20 RL = 50Ω 30 OFF ISOLATION (dB) 40 50 60 70 80 90 100 110 1k NORMALIZED GAIN (dB) VS = ±1.5V to ±5.5V 0 -3 -6 PHASE 0 45 90 R L = 50 Ω VIN = 0.2VP-P to 2VP-P (VS = ±1.5V) VIN = 0.2VP-P to 4VP-P (VS = ±3.3V) VIN = 0.2VP-P to 5VP-P (VS = ±5.5V) 1 10 100 FREQUENCY (MHz) 135 180 600 PHASE (DEGREES) GAIN 10k 100k 1M 10M 100M 500M FREQUENCY (Hz) FIGURE 15. FREQUENCY RESPONSE 25 FIGURE 16. OFF ISOLATION Die Characteristics 20 SUBSTRATE POTENTIAL (POWERED UP): V-40°C 25°C 15 ICC (µA) TRANSISTOR COUNT: ISL43112: 55 ISL43113: 55 10 85°C 5 PROCESS: Si Gate CMOS 0 1 2 3 VS (±V) 4 5 6 FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE 9 ISL43112, ISL43113 Small Outline Plastic Packages (SOIC) D INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93 MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497 MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574 A1 B C D E α µ A1 0.10(0.004) C e H h L N 0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050 1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27 e B 0.25(0.010) M C AM BS NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α 10 ISL43112, ISL43113 Small Outline Transistor Plastic Packages (SOT23-5) D P5.064 VIEW C e1 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES MILLIMETERS MIN 0.90 0.00 0.90 0.30 0.30 0.08 0.08 2.80 2.60 1.50 MAX 1.45 0.15 1.30 0.50 0.45 0.22 0.20 3.00 3.00 1.70 6 6 3 3 4 NOTES - 5 E 1 2 3 4 C L C L E1 SYMBOL A A1 A2 b b1 MIN 0.036 0.000 0.036 0.012 0.012 0.003 0.003 0.111 0.103 0.060 MAX 0.057 0.0059 0.051 0.020 0.018 0.009 0.008 0.118 0.118 0.067 e C L 0.20 (0.008) M C L C b α C c c1 D E E1 A A2 A1 SEATING PLANE -C- e e1 L L1 0.0374 Ref 0.0748 Ref 0.014 0.022 0.95 Ref 1.90 Ref 0.35 0.55 0.024 Ref. 0.010 Ref. 5 0.004 0.004 0o 0.010 8o 0.60 Ref. 0.25 Ref. 5 0.10 0.10 0o 0.25 8o Rev. 2 9/03 5 0.10 (0.004) C L2 N WITH PLATING c b b1 c1 R R1 α NOTES: BASE METAL 1. Dimensioning and tolerance per ASME Y14.5M-1994. 4X θ1 R1 R GAUGE PLANE SEATING PLANE C L1 4X θ1 VIEW C L 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength L measured at reference to gauge plane. 5. “N” is the number of terminal positions. 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. α L2 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11