ISL5571AIB-T

IGNS EW DES N R O F NDED EMENT COMME REPL AC D E NO T RE D N ter at E M Data COMSheet port Cen /tsc p u S l NO RE a m nic tersil.co our Tech contact ERSIL or www.in T 1-888-IN ISL5571A July 2004 FN4920.5 Access High Voltage Switch Features The ISL5571A is a solid state device designed to replace the electromechanical relay used on Subscriber Line Cards. The device contains two Line Break MOSFET switches, one Ring Return MOSFET switch and one Ring Access SCR switch. • Small Size/Surface-Mount Packaging The ISL5571A is pin-for-pin compatible with the Lucent L7581AAE LCAS and Clare CPCL7581A Products. Improvements include: line break switches rON match (0.5 Max) higher dV/dt sensitivity (5000V/s), protection SCR hold current set to 110mA. • Low Impulse Noise, Low EMI • Clean, Bounce-Free Switching • Line Break Switches - 0.5Max rON Match - 28 Max rON • Built-In Current Limiting, Thermal Shutdown and Secondary Protection for the SLIC The line break MOSFETs have very low on resistance (330V. The Ringing Access switch is implemented with a SCR device with a blocking voltage >480V. The SCR switch inherently offers low EMI connect and disconnect circuitry. All control I/Os use TTL thresholds making the device compatible with 3V logic. • Optimized for Short Loop High REN Applications The ISL5571A also includes on-chip protection in the form of an over-voltage clamping circuit, current-limited MOSFET switches, and thermal shutdown circuitry. The over-voltage clamping circuit consists of a diode bridge and SCR. • DLC • Pb-free Available Applications • Central Office • PBX • HFC • FITL • DAML Ordering Information PART NUMBER • 3V/5V Logic-Capable I/O PROT SCR TEMP RANGE (°C) PACKAGE TYPE PKG. DWG. # ISL5571AIB Yes -40 to 85 16 Ld SOIC M16.3 ISL5571AIBZ (Note) Yes -40 to 85 16 Ld SOIC (Pb-free) M16.3 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Technical Brief TB379 “Thermal Characterization of Packages for ICs” • Texas Instruments TISPL758LF3D Data Sheet • Teccor Electronics Document DO-214AA Pinout Add “-T” for tape and reel. ISL5571A TOP VIEW FGND 1 16 VBAT TBAT 2 15 RBAT TLINE 3 14 RLINE NC 4 13 NC NC 5 12 RRING TRING 6 1 11 LATCH VDD 7 10 INPUT TSD 8 9 DGND CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas LLC 2001, 2002, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL5571A Block Diagram ISL5571A - 16 LEAD SOIC VBAT TRING 16 6 LINE BREAK SW1 TLINE 3 2 TBAT RING RETURN SW3 D1 D3 SCR RLINE 14 RING ACCESS SW4 D2 1 FGND D4 15 RBAT LINE BREAK SW2 7 VDD CONTROL LOGIC 12 RRING 2 11 10 9 8 LATCH INPUT DGND TSD ISL5571A Absolute Maximum Ratings TA = 25°C Thermal Information Maximum Supply Voltages (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V (VBAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -19V to -100V ESD Rating (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . .500V Thermal Resistance (Typical, Note 1) Die Characteristics JA (°C/W) SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature Plastic . . . . . . . . . . . . . . . . .150°C Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300°C (SOIC - Lead Tips Only) Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VBAT Process . . . . . . . . . . . . . . . . . . . . . . . .6-inch BIMOS Bonded Wafer CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications TA = -40°C to 85°C, Unless Otherwise Specified TABLE 1. BREAK SWITCHES - ISL5571A - SW1, SW2 PARAMETER OFF-State Leakage Current: -40°C 25°C 85°C ON-Resistance: -40°C 25°C 85°C TEST CONDITION VSWITCH (DIFFERENTIAL) = -310V to GND VSWITCH (DIFFERENTIAL) = -60V to +250V VSWITCH (DIFFERENTIAL) = -320V to GND VSWITCH (DIFFERENTIAL) = -60V to +260V VSWITCH (DIFFERENTIAL) = -330V to GND VSWITCH (DIFFERENTIAL) = -60V to +270V TLINE = 10mA, 40mA, TBAT = -2V TLINE = 10mA, 40mA, TBAT = -2V TLINE = 10mA, 40mA, TBAT = -2V MEASURE MIN TYP MAX UNITS ISWITCH - - 1 A ISWITCH - - 1 A ISWITCH - - 1 A VON VON VON - 12 16 - 28    0.05 0.5  - - 220 VPeak ON-Resistance Match Per ON-resistance Test Condition of SW1, SW2 Magnitude rON SW1 - rON SW2 ON-State Voltage (Note 2) Break Switches in ON-State; Iswitch = ILIMIT at 50/60Hz VON VSWITCH (ON) = 10V VSWITCH (ON) = 10V VSWITCH (ON) = 10V ISWITCH ISWITCH ISWITCH 80 125 - 250 - mA mA mA Break Switches in ON-state; Ringing Access Switches OFF; Apply 1000V at 10/1000s Pulse; Appropriate External Secondary Protection in Place ISWITCH - 1.5 2.0 A VSWITCH (Both Poles) = 310V Logic Inputs = GND VSWITCH (Both Poles) = 320V Logic Inputs = GND VSWITCH (Both Poles) = 330V Logic Inputs = GND ISWITCH - - 1 A ISWITCH - - 1 A ISWITCH - - 1 A - 5000 - V/s DC Current Limit: -40°C 25°C 85°C Dynamic Current Limit (t =