X93155_08

® X93155 Data Sheet February 19, 2008 FN8181.2 Digitally Controlled Potentiometer (XDCP™) The Intersil X93155 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon during a subsequent power-up operation. The device is connected as a two-terminal variable resistor and can be used in a wide variety of applications including: - Bias and Gain Control - LCD Contrast Adjustment Features • Solid-state potentiometer • Up/Down interface • 32 wiper tap points per potentiometer - Wiper position stored in nonvolatile memory and recalled on power-up • 31 resistive elements per potentiometer - Temperature compensated - Maximum resistance tolerance ±25% - Terminal voltage, 0 to VCC • Low power CMOS - VCC = 5V ±10% - Active current, 200µA typ. - Standby current, 2.0µA max • High reliability - Endurance 200,000 data changes per bit - Register data retention, 100 years • RTOTAL value = 50kΩ • Packages - 8 Ld MSOP Pinout X93155 (8 LD MSOP) TOP VIEW 8 7 6 5 INC U/D RH VSS 1 2 3 4 VCC CS RL NC* • Pb-free available (RoHS compliant) *NC can be left unconnected, or connected to any voltage between VSS and VCC. Ordering Information PART NUMBER X93155UM8I* X93155UM8IZ* (Note) PART MARKING VCC LIMITS (V) AGM DCH 5 ±10% RTOTAL (kΩ) 50 TEMP RANGE (°C) -40 to +85 -40 to +85 PACKAGE 8 Ld MSOP 8 Ld MSOP (Pb-free) PKG DWG. # M8.118 M8.118 *Add "T1" suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X93155 Block Diagram VCC (SUPPLY VOLTAGE) U/D INC CS 5-BIT UP/DOWN COUNTER 31 30 29 5-BIT NONVOLATILE MEMORY 28 ONE OF THIRTY TWO DECODER 2 1 VCC VSS (Ground) VSS 0 RL RH 30kΩ UP/DOWN (U/D) INCREMENT (INC) DEVICE SELECT (CS) CONTROL AND MEMORY RH TRANSFER GATES RESISTOR ARRAY RL STORE AND CONTROL RECALL CIRCUITRY GENERAL DETAILED Pin Descriptions MSOP 1 2 3 4 5 6 7 SYMBOL INC U/D RH VSS NC RL CS BRIEF DESCRIPTION Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Up/Down (U/D). The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. RH. The RH and RL pins of the X93155 are equivalent to the end terminals of a variable resistor. Ground. No Connection (or can be connected to any voltage between VSS and VCC.) RL. The RH and RL pins of the X93155 are equivalent to the end terminals of a variable resistor. Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete, the X93155 will be placed in the low power standby mode until the device is selected once again. Supply Voltage. 8 VCC 2 FN8181.2 February 19, 2008 X93155 Absolute Maximum Ratings Voltage on CS, INC, U/D, RH, RL and VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to +6.5V Maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA Thermal Information Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Maximum reflow temperature (40s) . . . . . . . . . . . . . . . . . . . . +240°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature Range Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Supply Voltage VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10% (Note 6) CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. Absolute linearity is utilized to determine actual wiper resistance versus expected resistance = (RH(n)(actual)-RH(n)(expected)) = ±1 Ml Maximum. n = 1 .. 29 only 2. Relative linearity is a measure of the error in step size between taps = RH(n+1)—[RH(n) + Ml] = ±0.5 Ml, n = 1 .. 29 only. 3. 1 Ml = Minimum Increment = RTOT/31. 4. Typical values are for TA = +25°C and nominal supply voltage. 5. Limits established by characterization and are not production tested. 6. When performing multiple write operations, VCC must not decrease by more than 150mV from its initial value. 7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. Potentiometer Specifications SYMBOL RTOT VR Over recommended operating conditions, unless otherwise stated. TEST CONDITIONS/NOTES MIN (Note 7) 37.5 0 RTOTAL =50kΩ Ref: 1kHz (Note 5) 3 RH(n)(actual)-RH(n)(expected) RH(n+1)-[RH(n)+MI] (Note 5) See “Circuit #2 SPICE Macro Model” on page 4 ±35 10/10/25 ±1 ±0.5 -120 0.6 TYP (Note 4) 50 MAX (Note 7) 62.5 VCC 1 UNIT kΩ V mW (Note 5) dBV (Note 5) mA % MI (Note 3) MI (Note 3) ppm/°C pF (Note 5) PARAMETER End-to-end Resistance RH, RL Terminal Voltages Power Rating Noise IR Potentiometer Current Resolution Absolute linearity (Note 1) Relative linearity (Note 2) RTOTAL Temperature Coefficient CH/CL/CW Potentiometer Capacitances DC Electrical Specifications SYMBOL ICC1 ICC2 ISB ILI Over recommended operating conditions unless otherwise specified. TEST CONDITIONS CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VCS = VCC MIN (Note 7) TYP (Note 4) 200 MAX (Note 7) 300 1400 2.0 ±1 UNIT µA µA µA µA PARAMETER VCC Active Current (Increment) VCC Active Current (Store) (EEPROM Store) Standby Supply Current CS 3 FN8181.2 February 19, 2008 X93155 DC Electrical Specifications SYMBOL ILI ILI VIH VIL CIN (Note 5) CS INC, U/D Input Leakage Current CS, INC, U/D Input HIGH Voltage CS, INC, U/D Input LOW Voltage CS, INC, U/D Input Capacitance VCC = 5V, VIN = VSS, TA = +25°C, f = 1MHz Over recommended operating conditions unless otherwise specified. (Continued) TEST CONDITIONS VCC = 5V, CS = 0 VIN = VSS to VCC VCC x 0.7 -0.5 MIN (Note 7) 120 TYP (Note 4) 200 MAX (Note 7) 250 ±1 VCC + 0.5 VCC x 0.1 10 UNIT µA µA V V pF PARAMETER Endurance and Data Retention PARAMETER Minimum endurance Data retention MIN 200,000 100 UNIT Data changes per bit Years Circuit #2 SPICE Macro Model RTOTAL RH CH CW 25pF CL 10pF RL Test Circuit #1 TEST POINT VH/RH 10pF AC Conditions of Test VL Input pulse levels Input rise and fall times Input reference levels 0V to 5V 10ns 1.5V AC Electrical Specifications SYMBOL tCl tlD tDI tlL tlH tlC tCPH tCPH tCYC tR , tF (Note 5) tR VCC (Note 5) tWR CS to INC Setup Over recommended operating conditions, unless otherwise specified. PARAMETER MIN (Note 7) 100 100 100 1 1 1 250 10 2 500 1 5 50 10 TYP (Note 4) MAX (Note 7) UNIT ns ns ns µs µs µs ns ms µs µs V/ms ms INC HIGH to U/D Change U/D to INC Setup INC LOW Period INC HIGH Period INC Inactive to CS Inactive CS Deselect Time (No Store) CS Deselect Time (Store) INC Cycle Time INC Input Rise and Fall time VCC Power-up Rate Store Cycle 4 FN8181.2 February 19, 2008 X93155 AC Timing CS tCYC tCI INC tIL tIH tIC (STORE) tCPH 90% 10% 90% tID tDI tF tR U/D Power-up and Power-down Requirements There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH and VL, i.e., VCC ≥ VH,VL. The VCC ramp rate specification is always in effect. Pin Descriptions RH and RL The RH and RL pins of the X93155 are equivalent to the end terminals of a variable resistor. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the U/D input. resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper. The wiper is connected to the RL terminal, forming a variable resistor from RH to RL. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. If the wiper is moved several positions, multiple taps are connected to the wiper for up to 10µs. The 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Instructions and Programming The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW, the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. In order to avoid an accidental store during power-up, CS must go HIGH with VCC during initial power-up. When left open, the CS pin is internally pulled up to VCC by an internal 30kΩ resistor. The system may select the X93155, move the wiper and deselect the device without having to store the latest wiper Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete, the X93155 will be placed in the low power standby mode until the device is selected once again. Principles of Operation There are three sections of the X93155: the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the 5 FN8181.2 February 19, 2008 X93155 position in nonvolatile memory. After the wiper movement is performed as previously described and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. In order to recall the stored position of the wiper on power-up, the CS pin must be held HIGH. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation, minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. Symbol Table WAVEFORM INPUTS Must be steady May change from Low to High May change from High to Low Don’t Care: Changes Allowed N/A OUTPUTS Will be steady Will change from Low to High Will change from High to Low Changing: State Not Known Center Line is High Impedance Mode Selection CS L L H H X L L L INC U/D H L X X X H L Wiper Up Wiper Down Store Wiper Position Standby Current No Store, Return to Standby Wiper Up (not recommended) Wiper Down (not recommended) I VR Applications Information MODE Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages: 1. The variability and reliability of a solid-state potentiometer 2. The flexibility of computer-based digital controls 3. The retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data Two terminal variable resistor. 6 FN8181.2 February 19, 2008 X93155 Low Voltage High Impedance Instrumentation Amplifier 5V 10k + + U1A 50k VIN X93155 (RTOTAL) + 50k 10k + U1B 50k 10k GAIN = 50k 50k ) ( 1+ 10k RTOTAL U1C VOUT 10k 50k U1 = LT1467 Micro-Power LCD Contrast Control 5V 300k 240k + 100k + 50k 100k -15V U1A 5V 100k U1B VOUT = -4.41 ( 1 + 100k ) 50k + RTOTAL VOUT = -8.82V TO -13.23V U1 = LMC6042 X93155 (RTOTAL) Single Supply Variable Gain Amplifier 5V 5V + 20k VIN 10k X93155 (RTOTAL) U1 VOUT GAIN = RTOTAL 10k 20k U1 = LMC6042 7 FN8181.2 February 19, 2008 X93155 Mini Small Outline Plastic Packages (MSOP) N M8.118 (JEDEC MO-187AA) 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE E1 -BE INCHES SYMBOL A ABC MILLIMETERS MIN 0.94 0.05 0.75 0.25 0.09 2.95 2.95 4.75 0.40 8 0.07 0.07 5o 0o 15o 6o MAX 1.10 0.15 0.95 0.36 0.20 3.05 3.05 5.05 0.70 NOTES 9 3 4 6 7 Rev. 2 01/03 MIN 0.037 0.002 0.030 0.010 0.004 0.116 0.116 0.187 0.016 8 0.003 0.003 5o 0o MAX 0.043 0.006 0.037 0.014 0.008 0.120 0.120 0.199 0.028 INDEX AREA 12 TOP VIEW 0.20 (0.008) A1 A2 4X θ 0.25 (0.010) GAUGE PLANE SEATING PLANE -C- R1 R b c D E1 A A2 4X θ L L1 e E L L1 N R 0.026 BSC 0.65 BSC A1 -He D b 0.10 (0.004) -A0.20 (0.008) C SEATING PLANE 0.037 REF 0.95 REF C a C L E1 C R1 0 SIDE VIEW 15o 6o α -B- 0.20 (0.008) CD END VIEW NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension “D” does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (0.004) at seating Plane. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane 11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 8 FN8181.2 February 19, 2008