Logic-Level Gate Drive Advanced Process Technology l Surface Mount (IRL3303S) l Low-profile through-hole (IRL3303L) l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l l
HEXFET® Power MOSFET
D
IRL3303LPbF IRL3303SPbF
VDSS = 30V RDS(on) = 0.026Ω
PD - 95578
G
ID = 38A
S
Absolute Maximum Ratings
ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C V GS EAS IAR EAR dv/dt TJ TSTG
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL3303L) is available for lowprofile applications.
D 2 Pak
TO-262
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy
Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt
Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
38 27 140 3.8 68 0.45 ±16 130 20 6.8 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W W/°C V mJ A mJ V/ns °C
Thermal Resistance
Parameter
RθJC RθJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
2.2 40
Units
°C/W 07/20/04
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1
IRL3303S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient V (BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 30 1.0 12 Typ. 0.035 7.4 200 14 36 Max. Units Conditions V V GS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA
0.026 V GS = 10V, ID = 20A Ω 0.040 V GS = 4.5V, ID = 17A TJ = 150°C V V DS = V GS, ID = 250µA S V DS = 25V, I D = 20A
25 V DS = 30V, V GS = 0V µA 250 V DS = 24V, VGS = 0V, TJ = 150°C 100 V GS = 16V nA -100 V GS = -16V 26 I D = 20A 8.8 nC V DS = 24V 15 V GS = 4.5V, See Fig. 6 and 13
V DD = 15V I D = 20A R G = 6.5Ω R D = 0.7Ω, See Fig. 10
Between lead, 7.5 nH and center of die contact 870 V GS = 0V 340 pF V DS = 25V 170 = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD trr Q rr ton
P arameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 38 showing the A G integral reverse 140 p-n junction diode. S 1.3 V TJ = 25°C, IS = 20A, VGS = 0V 72 110 ns TJ = 25°C, IF = 20A 180 280 nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 20A, di/dt ≤ 140A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
VDD = 15V, starting TJ = 25°C, L = 470µH
RG = 25Ω, I AS = 20A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL3303 data and test conditions. ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
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IRL3303S/LPbF
1000
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
1000
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
100
100
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
10
10
2.5V
1
1
2.5V
0.1 0.1
20µs PULSE WIDTH T J = 25°C
1 10
A
100
0.1 0.1
20µs PULSE WIDTH T J = 175°C
1 10
A
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
100
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = 34A
I D , Drain-to-Source Current (A)
1.5
TJ = 25°C TJ = 175°C
10
1.0
1
0.5
0.1 2 3 4 5 6
V DS= 15V 20µs PULSE WIDTH
7 8 9 10
A
0.0 -60 -40 -20 0 20 40 60
VGS = 10V
80 100 120 140 160 180
A
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRL3303S/LPbF
1600 1400 1200 1000 800 600
VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = C ds + C gd
15
I D = 20A V DS = 24V V DS = 15V
12
C, Capacitance (pF)
Coss
9
6
Crss
400 200 0 1 10 100
3
A
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 13
30 40
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
I D , Drain Current (A)
100
10µs
TJ = 175°C TJ = 25°C
10
100µs
10
1ms
1 0.0 0.5 1.0 1.5
VGS = 0V
2.0
A
2.5
1 1
TC = 25°C TJ = 175°C Single Pulse
10
10ms
A
100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRL3303S/LPbF
40
V DS V GS RG D.U.T.
+
I D , Drain Current (A)
30
-V DD
4.5V
20
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
10
VDS 90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 0.05 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.1
0.02 0.01
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3303S/LPbF
L VDS D.U.T. RG + V - DD
10 V
EAS , Single Pulse Avalanche Energy (mJ)
300
TOP
250
BOTTOM
ID 8.3A 14A 20A
200
IAS tp
0.01Ω
150
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp VDD VDS
100
50
0
VDD = 15V
25 50 75 100 125 150
A
175
Starting TJ , Junction Temperature (°C)
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRL3303S/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
-
+
RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
ISD
* VGS
= 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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IRL3303S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IR F 530S WIT H L OT CODE 8024 AS S E MB L E D ON WW 02, 2000 IN T HE AS S E MB L Y L INE "L " Note: "P" in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R F 530S DAT E CODE YE AR 0 = 2000 WE E K 02 L INE L
OR
INT E RNAT IONAL RE CT IF IE R L OGO AS S E MB L Y LOT CODE P ART NUMB E R F 530S DAT E CODE P = DE S IGNAT E S LE AD-F RE E P RODU CT (OP T IONAL) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E CODE
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IRL3303S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMPL E: T HIS IS AN IRL 3103L L OT CODE 1789 AS S EMB LE D ON WW 19, 1997 IN T HE AS S E MB L Y LINE "C" Note: "P" in as s embly line pos ition indicates "L ead-F ree" INT ERNAT IONAL RE CT IF IE R L OGO AS S E MB LY L OT CODE PART NUMBE R
DAT E CODE YE AR 7 = 1997 WE E K 19 LINE C
OR
INT E RNATIONAL RE CT IF IER L OGO AS S EMBL Y L OT CODE PART NUMBER DAT E CODE P = DES IGNAT ES L EAD-FREE PRODUCT (OPT IONAL ) YEAR 7 = 1997 WEE K 19 A = AS S EMB LY S IT E CODE
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IRL3303S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197) MAX.
26.40 (1.039) 24.40 (.961) 3
4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/04
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/
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