IS31AP2010F-UTLS2-TR

IS31AP2010F 2.8W@5.0V MONO FILTER-LESS CLASS-D AUDIO POWER AMPLIFIER February 2014 GENERAL DESCRIPTION FEATURES The IS31AP2010F is a high efficiency, 2.8W@5.0V mono filter-less Class-D audio power amplifier. A low noise, filter-less PWM architecture eliminates the output filter, reduces external component count, system cost, and simplifying design.  Operating in a single 5.0V supply, IS31AP2010F is capable of driving 4Ω speaker load at a continuous average output of 2.8W@10% THD+N. The IS31AP2010F has high efficiency with speaker load compared to a typical Class- AB amplifier. In cellular handsets, the earpiece, speaker phone, and melody ringer speaker can each be driven by the IS31AP2010F. The gain of IS31AP2010F is externally configurable which allows independent gain control from multiple sources by summing signals from each function. IS31AP2010F is available in UTQFN-9 packages. It operates from 2.7V to 5.5V over the temperature range of -40°C to +85°C.         5.0V supply at THD+N = 10% ―2.8W into 4Ω (Typ.) ―1.75W into 8Ω (Typ.) Efficiency at 5.0V ―85% at 400mW with a 4Ω speaker ―88% at 400mW with a 8Ω speaker Less than 1μA shutdown current Optimized PWM output stage eliminates LC output filter Fully differential design reduces RF rectification and eliminates bypass capacitor Improved CMRR eliminates two input coupling capacitors Integrated click-and-pop suppression circuitry UTQFN-9 package RoHS compliant and 100% lead(Pb)-free APPLICATIONS       Wireless or cellular handsets and PDAs Portable DVD player Notebook PC Portable radio Educational toys Portable gaming TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit (Differential Input) Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 1 IS31AP2010F Figure 2 Typical Application Circuit (Single-ended Input) Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 2 IS31AP2010F PIN CONFIGURATION Package Pin Configuration (Top View) UTQFN-9 PIN DESCRIPTION No. Pin Description A1 IN+ Positive audio input. A2, B3 GND Connect to ground. A3 OUT- Negative audio output. B1, B2 VCC Power supply. C1 IN- Negative audio input. C2 SDB Enter in shutdown mode when active low. C3 OUT+ Positive audio output. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 3 IS31AP2010F ORDERING INFORMATION Industrial Range: -40°C to +85°C Order Part No. Package QTY/Reel IS31AP2010F-UTLS2-TR UTQFN-9, Lead-free 3000 Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any  time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are  advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.  Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the  product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not  authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  a.) the risk of injury or damage has been minimized;  b.) the user assume all such risks; and  c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 4 IS31AP2010F ABSOLUTE MAXIMUM RATINGS Supply voltage, VCC Voltage at any input pin Junction temperature, TJMAX Operating temperature, TA Storage temperature range, TSTG ESD (HBM) ESD (CDM) -0.3V ~ +6.0V -0.3V ~ VCC+0.3V 150°C -40°C ~ +85°C -65°C ~ +150°C 7kV 500V Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS VCC = 2.7V ~ 5.5V, TA = 25°C, unless otherwise noted. Symbol Parameter VCC Supply voltage |VOS| Output offset voltage (measured differentially) ICC Quiescent current ISD Shutdown current fSW Switching frequency Gain Condition Min. 2.7 VSDB = 0V, AV = 2V/V 10 VCC = 5.5V, no load 2.6 VCC = 2.7V, no load 1.2 VSDB = 0.4V High-level input voltage VIL Low-level input voltage Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 Max. Unit 5.5 V mV mA 1 250 150k 2 RIN Audio gain VIH Typ. μA kHz V/V 1.4 V 0.4 V 5 IS31AP2010F ELECTRICAL CHARACTERISTICS (NOTE 1) TA = 25°C, Gain = 2V/V, CIN = 2μF, unless otherwise noted. Symbol Parameter Condition THD+N = 10% f = 1kHz RL = 8Ω+33µH THD+N = 1% f = 1kHz RL = 8Ω+33µH PO Output power THD+N = 10% f = 1kHz RL = 4Ω+33µH THD+N = 1% f = 1kHz RL = 4Ω+33µH THD+N Total harmonic distortion plus noise VNO Output voltage noise tWU Wake-up time from shutdown Min. Typ. VCC = 3.6V 0.85 VCC = 4.2V 1.25 VCC = 5.0V 1.75 VCC = 3.6V 0.7 VCC = 4.2V 0.97 VCC = 5.0V 1.5 VCC = 3.6V 1.5 VCC = 4.2V 2.0 VCC = 5.0V 2.8 VCC = 3.6V 1.2 VCC = 4.2V 1.6 VCC = 5.0V 2.3 VCC = 3.6V, PO = 0.45W, RL = 8Ω+33µH, f = 1kHz 0.3 VCC = 3.6V, PO = 0.6W, RL = 4Ω+33µH, f = 1kHz 0.26 VIN+ = 0V PSRR Power supply rejection ratio f = 217Hz, RL = 8Ω, Input grounded Max. Unit W W W W % 74 μV 1.2 ms -67 dB Note 1: Guaranteed by design. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 6 IS31AP2010F TYPICAL PERFORMANCE CHARACTERISTIC 20 20 RL = 8Ω+33µH f = 1kHz 10 VCC = 4.2V 5 THD+N(%) 5 THD+N(%) RL = 4Ω+33µH f = 1kHz 10 2 1 VCC = 3.6V VCC = 4.2V 2 VCC = 3.6V 1 0.5 0.5 0.2 0.2 VCC = 5.0V 0.1 10m 20m 50m 100m 200m 500m 1 VCC = 5.0V 0.1 10m 2 20m 50m Output Power(W) RL = 8Ω+33µH VCC = 3.6V(Po = 0.45W) VCC = 4.2V(Po = 0.65W) VCC = 5.0V(Po = 0.9W) 5 2 1 0.5 0.2 0.2 0.05 0.05 0.02 0.02 50 200 100 500 1k 2k 0.01 20 20k 5k RL = 4Ω+33µH VCC = 3.6V(Po = 0.6W) VCC = 4.2V(Po = 0.9W) VCC = 5.0V(Po = 1.2W) 0.5 0.1 50 200 100 Frequency(Hz) Figure 5 THD+N vs. Frequency Figure 6 1k 2k 20k 5k THD+N vs. Frequency 200 VCC = 3.6V~5.0V RL = 8Ω+33µH Input Grounded Output Voltage(µV) VCC = 3.6V~5.0V RL = 4Ω, 8Ω -40 PSRR(dB) 500 Frequency(Hz) +0 -20 3 4 1 0.1 0.01 20 2 10 THD+N(%) THD+N(%) 2 1 THD+N vs. Output Power Figure 4 10 5 500m Output Power(W) THD+N vs. Output Power Figure 3 100m 200m -60 -80 100 70 50 30 20 -100 -120 20 50 100 200 500 1k 2k 5k Frequency(H z) Figure 7 PSRR Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 10k 20k 10 20 50 100 200 500 1k 2k 5k 10k 20k Frequency(Hz) Figure 8 Noise 7 IS31AP2010F FUNCTIONAL BLOCK DIAGRAM Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 8 IS31AP2010F APPLICATION INFORMATION FULLY DIFFERENTIAL AMPLIFIER The IS31AP2010F is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that the common-mode voltage at the output is biased around VCC/2 regardless of the common-mode voltage at the input. The fully differential IS31AP2010F can still be used with a single-ended input; however, the IS31AP2010F should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. ADVANTAGES OF FULLY DIFFERENTIAL AMPLIFIERS The fully differential amplifier does not require a bypass capacitor. This is because any shift in the mid-supply affects both positive and negative channels equally and cancels at the differential output. GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217Hz. The transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal much better than the typical audio amplifier. COMPONENT SELECTION Figure 1 shows the IS31AP2010F with differential inputs and input capacitors, and Figure 2 shows the IS31AP2010F with single-ended inputs. Differential inputs should be used whenever possible because the single-ended inputs are much more susceptible to noise. For optimal performance the gain should be set to 2V/V or lower. Lower gain allows the IS31AP2010F to operate at its best, and keeps a high voltage at the input making the inputs less susceptible to noise. DECOUPLING CAPACITOR (CS) The IS31AP2010F is a high performance class-D audio amplifier that requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1μF, placed as close as possible to the device VCC lead works best. Placing this decoupling capacitor close to the IS31AP2010F is very important for the efficiency of the class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower frequency noise signals, a 10μF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device. INPUT CAPACITORS (CIN) The input capacitors and input resistors form a high pass filter with the corner frequency, fC, determined in Equation (2). fC  1 2RIN C IN (2) INPUT RESISTORS (RIN) The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. The input resistors (RIN) set the gain of the amplifier according to Equation (1). Equation (3) is reconfigured to solve for the input coupling capacitance. Gain  2  RF  V  RIN   V  (1) Resistor matching is very important in fully differential amplifiers. The balance of the output on the reference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1% matching can be used with a tolerance greater than 1%. Place the input resistors very close to the IS31AP2010F to limit noise injection on the high-impedance nodes. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 C IN  1 2RIN f C (3) If the corner frequency is within the audio band, the capacitors should have a tolerance of ±10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. For a flat low frequency response, use large input coupling capacitors (1μF). However, in a GSM phone the ground signal is fluctuating at 217Hz, but the signal from the codec does not have the same 217Hz fluctuation. The difference between the two signals is amplified, sent to the speaker, and heard as a 217Hz hum. 9 IS31AP2010F SUMMING INPUT SIGNALS Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources that need separate gain. The IS31AP2010F makes it easy to sum signals or use separate signal sources with different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phone would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereo headphones require summing of the right and left channels to output the stereo signal to the mono speaker. SUMMING TWO DIFFERENTIAL INPUT SIGNALS Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input source can be set independently (see Equations (4) and (5) and Figure 9). Gain1  VO 2  R F  V     R IN 1  V  VI 1 V 2  RF  V  Gain 2  O    R IN 2  V  VI 2 (4) Gain1  VO 2  R F  V     R IN 1  V  VI 1 (6) Gain 2  VO 2  R F  V     R IN 2  V  VI 2 (7) C IN 2  1 (8) 2RIN 2 f C 2 If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ring tone might be limited to a single-ended signal. The ring-tone gain is set to Gain1 = 2V/V, and phone gain is set at Gain2 = 0.1V/V, the resistor values would be RIN1 =150kΩ, RIN2 = 3MΩ The high pass corner frequency of the single-ended input is set by CIN1. If the desired corner frequency is less than 20Hz. C IN 1  (5) 1 2 150 k  20 Hz C IN 1  53 pF (9) (10) If summing left and right inputs with a gain of 1V/V, use RIN1 = RIN2 = 300kΩ. If summing a ring tone and a phone signal, set the ring-tone gain to Gain2 = 2V/V, and the phone gain to Gain1 = 0.1V/V. The resistor values would be RIN1 = 3MΩ, RIN2 = 150kΩ Figure 10 Summing Differential Input and Single-Ended Input Signals SUMMING TWO SINGLE-ENDED INPUT SIGNALS Figure 9 Summing Two Differential Inputs SUMMING A DIFFERENTIAL INPUT SIGNAL AND A SINGLE-ENDED INPUT SIGNAL Figure 10 shows how to sum a differential input signal and a single-ended input signal. Ground noise may couple in through IN- with this method. It is better to use differential inputs. The corner frequency of the single-ended input is set by CIN2, shown in Equation (8). To assure that each input is balanced, the single-ended input must be driven by a low-impedance source even if the input is not in use. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 The gain and corner frequencies (fC1 and fC2) for each input source can be set independently (see Equations (11) through (14) and Figure 11). Resistor, RP, and capacitor, CP, are needed on the IN- terminal to match the impedance on the IN+ terminal. The single-ended inputs must be driven by low impedance sources even if one of the inputs is not outputting an ac signal. Gain1  VO 2  R F  V     R IN 1  V  VI 1 VO 2  R F  V     R IN 2  V  VI 2 1 C IN 1  2R IN 1 f C 1 (11) Gain 2  (12) (13) 10 IS31AP2010F C IN 2  1 2R IN 2 f C 2 C p  C IN 1  C IN 2 RP  RIN 1  RIN 2 RIN 1  RIN 2 (14) (15) (16) Figure 11 Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 Summing Two Single-Ended Inputs 11 IS31AP2010F CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature Figure 12 8 minutes max. Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 12 IS31AP2010F PACKAGING INFORMATION UTQFN-9 Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 02/19/2014 13