IS31AP4915-QFLS2-TR

IS31AP4915 20VP-P CHARGE PUMP CERAMIC SPEAKER DRIVER September 2012 GENERAL DESCRIPTION FEATURES The IS31AP4915 features a mono power amplifier with an integrated charge-pump power supply specifically designed to drive the high capacitance of a ceramic loudspeaker.  Integrated charge-pump power supply - no inductor required Thermal protection Pop reduction circuitry 20VP-P voltage swing into piezoelectric speaker QFN-16, 4mm × 4mm     The IS31AP4915 maximizes battery life by offering high performance efficiency. The IS31AP4915 is ideally suited to deliver the high output-voltage swing required to drive ceramic/piezoelectric speakers. APPLICATIONS The device utilizes comprehensive click-and-pop suppression and shutdown control. The IS31AP4915 is fully specified over the -40°C to +85°C extended temperature range and is available in small lead-free 16-pin QFN (4mm × 4mm) packages.      CD/MP3 players Smart phones Cellular phones PDAs Handheld gaming TYPICAL APPLICATION CIRCUIT 220pF 200K 33nF 10ohm OUT + 5K IN 2.5 - 5.5V 1 uF 10K SVDD PVDD FB 10K SHUTDOWN SD SGND PGND C1P 100K C1N OUT - 10ohm SVSS PVSS 10 uF 10 uF Figure 1 Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 Typical Application Circuit 1 IS31AP4915 PIN CONFIGURATION 13 NC 14 SGND 3 10 FB PVSS 4 9 8 C1N SVDD 11 SD 7 2 OUT- PGND 6 12 IN SVSS 1 5 C1P NC QFN-16 15 SD Pin Configuration (Top View) 16 PVDD Package OUT+ PIN DESCRIPTION No. Pin Description 1 C1P Charge pump flying capacitor positive terminal. 2 PGND Power ground, connect to ground. 3 C1N Charge pump flying capacitor negative terminal. 4 PVSS Output from charge pump. 5, 13 NC No connection. 6 SVSS Amplifier negative supply, connect to PVSS. 7 OUT- Negative output signal. 8 SVDD Amplifier positive supply, connect to PVDD. 9 OUT+ Positive output signal. 10 FB Feed back. 11, 15 ______ Shutdown, active low logic. 12 SD IN 14 SGND Signal ground, connect to ground. 16 PVDD Charge pump supply voltage, connect to positive supply. Thermal Pad Connect to GND. Audio input signal. Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any  time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are  advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.  Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the  product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not  authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  a.) the risk of injury or damage has been minimized;  b.) the user assume all such risks; and  c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 2 IS31AP4915 ORDERING INFORMATION Industrial Range: -40°C to +85°C Order Part No. Package QTY/Reel IS31AP4915-QFLS2-TR QFN-16, Lead-free 3000 Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 3 IS31AP4915 ABSOLUTE MAXIMUM RATINGS Supply voltage, VDD Voltage at any input pin Maximum junction temperature, TJMAX Storage temperature range, TSTG Operating temperature range, TA -0.3V ~ +6.5V -0.3V ~ VDD+0.3V 150°C -65°C ~ +150°C −40°C ~ +85°C Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Parameter SVDD, PVDD Supply voltage VIH High level input voltage VIL Low level input voltage Min. Max. Unit 2.5 6.5 V 1.5 V 0.5 V ELECTRICAL CHARACTERISTICS TA=25°C. (Note 1) Symbol |VOS| Parameter Condition Min. Output Offset Voltage Supply Current Max. 6 6.0 8.0 ______ 8.5 10.5 VDD = 5V, SD = VDD Unit mV ______ VDD = 3V, SD = VDD IDD Typ. Shutdown mode, VDD = 2.5V ~ 6.5V 1 mA µA ELECTRICAL CHARACTERISTICS VDD = 3.6V, TA = 25°C (unless otherwise noted) (Note 2) Symbol VOUT THD+N Vn Parameter Output voltage Total harmonic distortion plus noise Condition Min. Typ. Vcc = 5V 7.9 Vcc = 3.6V 5.7 Vcc = 2.7V 4.3 ZL= 1μF+10Ω,VOUT = 1kHz/2VRMS 0.01 ZL= 1μF+10Ω,VOUT = 1kHz/4VRMS 0.01 f = 1kHz THD+N = 10% ZL= 1μF+10Ω Max. Unit VRMS % Noise output voltage 10 µVRMS fosc Charge pump switching frequency 320 kHz tON Start-up time from shutdown 450 µs Signal-to-noise ratio 100 dB Threshold 160 °C Hysteresis 15 °C SNR Thermal shutdown Note 1: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over other temperature range, are guaranteed by design, characterization and process control. Note 2: Guaranteed by design. Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 4 IS31AP4915 TYPICAL OPERATING CHARACTERISTICS Vcc = 2.7V Vcc = 2.7V fIN = 1kHz Vout = 3Vrms Vout = 1.25Vrms Figure 2 THD+N vs. Frequency(RL = 1µF+10Ω) Vcc = 3.6V Figure 3 THD+N vs. Output Voltage(RL = 1µF+10Ω) Vcc = 3.6V fIN = 1kHz Vout = 4Vrms Vout = 2Vrms Figure 4 THD+N vs. Frequency(RL = 1µF+10Ω) Vcc = 5V Figure 5 THD+N vs. Output Voltage(RL = 1µF+10Ω) Vcc = 5 V fIN = 1kHz Vout = 6Vrms Vout = 3Vrms Figure 6 THD+N vs. Frequency(RL = 1µF+10Ω) Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 Figure 7 THD+N vs. Output Voltage(RL = 1µF+10Ω) 5 IS31AP4915 Vcc = 5V fIN = 1kHz Vcc = 3.6V fIN = 1kHz 25 0 0 Figure 8 1 2 3 4 0 5 Power Consumption vs. Output Voltage(RL = 1µF+10Ω) 8 Figure 9 1 2 3 4 5 6 7 Power Consumption vs. Output Voltage(RL = 1µF+10Ω) 70 Vcc = 5V fIN = 1kHz 60 7 50 6 40 5 30 4 20 3 10 2 0 2.5 Figure 10 3 3.5 4 4.5 5 5.5 Supply Current vs. Supply Voltage(RL = 1µF+10Ω) Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 0 Figure 11 1 2 3 4 5 6 7 Supply Current vs. Output Voltage(RL = 1µF+10Ω) 6 IS31AP4915 FUNCTIONAL BLOCK DIAGRAM C1N C1P SVSS SVCC PVCC Click-and-pop Suppression UVLO & SD Control IN Charge Pump PVSS OUTFB OUT+ SDB Bias SGND PGND Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 7 IS31AP4915 APPLICATION INFORMATION INPUT-BLOCKING CAPACITORS DECOUPLING CAPACITORS DC input-blocking capacitors are required to be added in series with the audio signal into the input pin of the IS31AP4915. This capacitor block the DC portion of the audio source and allow the IS31AP4915 inputs to be properly biased to provide maximum performance. The IS31AP4915 require adequate power supply decoupling to ensure that the noise and total harmonic distortion (THD) are low. A good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1μF, placed as close as possible to the device VDD lead works best. Placing this decoupling capacitor close to the IS31AP4915 is important for the performance of the amplifier. For filtering lower frequency noise signals, a 10μF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device. These capacitors form a high-pass filter with the input impedance of the IS31AP4915. The cutoff frequency is calculated using Equation 1. For this calculation, the capacitance used is the input-blocking capacitor and the resistance is the input impedance of the IS31AP4915. Because the gains of both the IS31AP4915 is fixed, the input impedance remains a constant value. Using the input impedance value from the operating characteristics table, the frequency and/or capacitance can be determined when one of the two values is given. （1） CHARGE PUMP FLYING CAPACITOR AND PVSS CAPACITOR LAYOUT RECOMMENDATIONS The SGND and PGND pins of the IS31AP4915 must be routed separately back to the decoupling capacitor in order to provide proper device operation. If the SGND and PGND pins are connected directly to each other, the part functions without risk of failure, but the noise and THD performance do not meet the specifications. The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage. The PVSS capacitor must be at least equal to the charge pump capacitor in order to allow maximum charge transfer. Low ESR capacitors are an ideal selection, and a value of 10μF is typical. Capacitor values that are smaller than 10μF can be used, but the maximum output power is reduced and the device may not operate to specifications Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 8 IS31AP4915 CLASSIFICATION REFLOW PROFILES Profile Feature Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Pb-Free Assembly 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) 217°C Time at liquidous (tL) 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 12 Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 9 IS31AP4915 PACKAGE INFORMATION QFN-16 Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev.B, 09/11/2012 10