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ICE40HX1K-STICK-EVN

ICE40HX1K-STICK-EVN

  • 厂商:

    LATTICE(莱迪思半导体)

  • 封装:

    -

  • 描述:

    BOARD EVAL FPGA ICESTICK

  • 数据手册
  • 价格&库存
ICE40HX1K-STICK-EVN 数据手册
iCEstick Evaluation Kit User’s Guide August 2013 EB82_01.0 iCEstick Evaluation Kit Introduction Thank you for choosing the Lattice Semiconductor iCEstick™ Evaluation Kit. This guide describes how to start using the iCEstick Evaluation Kit, an easy-to-use USB form factor board for rapidly prototyping designs using the iCE40 FPGA. Along with the evaluation board, this kit includes a pre-loaded design that demonstrates basic board functionality. The contents of this user’s guide include demo operations, descriptions of the various portions of the evaluation board, descriptions of the on-board connectors, a complete set of schematics and bill of materials for the iCEstick Evaluation Board. Features The iCEstick Evaluation Kit includes: • iCEstick Evaluation Board – features the following on-board components – High-performance, low-power iCE40HX1K FPGA – FTDI 2232H USB device allows iCE device programming and UART interface to a PC – Vishay TFDU4101 IrDA transceiver – Five user LEDs – 2 x 6 position Diligent PmodTM compatible connector enables many other peripheral connections – Discera 12Mhz MEMS oscillator – Micron 32Mbit N25Q32 SPI flash – Supported by Lattice iCEcube2™ design software – USB connector provides the power supply – 16 LVCMOS/LVTTL (3.3V) digital I/O connections on 0.1” through-hole connections • Pre-loaded demo design – the kit includes the pre-loaded demo design that flashes the on-board LEDs in a clockwise pattern. • USB connector – provides a communication and debug port via a USB-to-RS-232 physical channel and programming interface to the PC. Figure 1. iCEstick Evaluation Board FTDI 2232H Lattice iCE40-1KHX Prototyping Holes IrDA Transceiver USB Connector Pmod Connector SPI Flash 2 iCEstick Evaluation Kit Figure 2. iCEstick Functional Block Diagram iCE40 HX1K 144TQFP SPI FT2232H I/O LEDs Pmod LDO Pwr LED I/O Access ~4 in. 3 IrDA USB Type A Male iCEstick Evaluation Kit Software Requirements Before using the iCEstick board, download and install the latest version of Lattice iCEcube2™ and Diamond Programmer. Make sure you log in to the Lattice website, otherwise these software downloads will not be visible. These are available at http://www.latticesemi.com/Products/DesignSoftwareAndIP.aspx. If you install Diamond Programmer 2.2, you will require a software patch. This software patch is available at http://www.latticesemi.com/icestick. Go to the Downloads tab and install the appropriate patch. This patch is not required with Diamond Programmer 3.0 or higher. Figure 3. Software Downloads Download iCEcube2 for HDL development Download Diamond Programmer for physically configuring the device 4 iCEstick Evaluation Kit Communication Between the PC and iCEstick Communication between the iCEstick Board and a PC is via the FTDI 2232H USB device. To enable this connection the installation of the FTDI chip USB hardware drivers is needed. This driver is installed when Diamond Programmer was installed. These drivers enable the computer to recognize and program the iCEstick board. In addition these drivers allow communication between the PC and the iCEstick board to enable further demonstrations. Connecting the iCEstick Evaluation Board Insert the iCEstick evaluation board to an open USB slot in a PC. The default bitstream in the SPI flash loads the iCE40HX-1k device on the iCEstick board. One should see the green LED on the board light up and continue to be lit. Preprogrammed Design and Board LEDs There are a total of 5 LEDs on the iCEstick board. All are controlled by I/Os of the iCE40HX-1k device. The default bitstream loads the iCE40HX-1k device and the green LED lights up signifying that the device has loaded correctly and power is good. The other four red LEDs arranged in a diamond pattern begins to flash in a clockwise direction. This is the intended function of the default bitstream. Table 1. User I/O and LEDs LED location CPLD pin (All in Bank 1) CPLD I/O LED color D1 99 PIO1_14 Red D2 98 PIO1_13 Red D3 97 PIO1_12 Red D4 96 PIO1_11 Red D5 95 PIO1_10 Green Download Demo Designs The above demo is pre-programmed into the iCEstick board. Other than the default design, Lattice also distributes source and programming files for demonstration designs compatible with this board. To download the demo designs: 1. Browse to www.latticesemi.com/icestick and click on the Downloads tab to view other design files and capabilities that the iCEstick board could implement. Various demo designs are available and can be download. 2. Extract the contents of zip files to a local hard drive. Lattice provides the following demos based on iCEstick board: • UART over IrDA. In this demo design, the iCEstick device communicates with a laptop or PC through UART over USB. Then, the payload is transmitted through Vishay IrDA device. This data can be locally looped back or another iCEstick board could receive the data via it’s IrDA receiver. • Diligent Pmod Accelerometer. The demo makes use of Digilent PmodAcl module which is plugged into iCEstick board. In this demo design, the accelerometer setting and reading is done by the on-board iCE device and the direction of movement is displayed with the diamond pattern LEDs. 5 iCEstick Evaluation Kit IrDA Functionality and Demo The iCEstick board has a Vishay TFDU4101 IrDA transceiver on it. This device allows transmit and receive of infrared data up to 115kbps. Table 2. IrDA Pin Description IrDA function CPLD pin CPLD I/O Comment RXD 106 PIO1_19 Receive data pin TXD 105 PIO1_18 Transmit data pin SD 107 PIO1_20 Shut down There are two possible configurations for the IrDA demo design: IrDA TX and IrDA RX. For an end to end complete IrDA link demo, two iCEstick boards are needed, however using just the IrDA Tx design can support a demo. The IrDA TX design transfers the data from the PC keyboard input in a terminal window to the IrDA Vishay device TXD. While the data is transmitted via infrared, it is also by default looped back to the receive channel of the IrDA device. In this demo the looped back data is received and before it is transmitted to the PC window the text is converted from lower case to upper case. This is the signal flow for the stand alone demo. Figure 4. IrDA TX on iCEstick IrDA TX UART iCE40 via USB Laptop or PC The IrDA RX design receives infrared data from the Vishay IrDA Tx device. After the IrDA data is wirelessly received it is then sent to the iCE40 device. The iCE40 then send the character information to the open window on the PC. Thus whatever is typed in the TX terminal window is displayed in the Rx terminal window. Figure 5. IrDA RX on iCEstick UART iCE40 Vishay IrDA Over USB Laptop or PC This demo requires a terminal program on PC to communicate with the iCEstick board. The following instructions describe the setup for IrDA TX stand alone demo using the Tera Term terminal emulator program on Windows 7. 6 iCEstick Evaluation Kit Setting Up for the IrDA TX Stand Alone Demo To set up for the IrDA TX demo: 1. Program the iCE device with IrDA TX bitstream. 2. Plug iCEstick into a PC USB port. 3. Check if the USB driver is installed correctly. Go to Start, right-click Computer and select Properties. The System window is shown. Click Device Manager. Figure 6. System Window 4. If the driver is installed correctly, the device is listed without an error tag under Ports (COM & LPT) as shown in Figure 7. Proceed to the next step. Figure 7. Device Manager 7 iCEstick Evaluation Kit If the driver is not installed correctly, the device is tagged with a yellow exclamation point as shown in Figure 8. You need to install the driver. To do this, right-click the device and select Update Driver Software. Figure 8. Device Manager with Driver Error Request Windows to search the web for the driver. After Windows locates the FTDI driver, install it and proceed to the next step. 5. Install Tera Term software. The installer can be downloaded from http://download.cnet.com/Tera-Term/300020432_4-75766675.html. 6. Open Tera Term. 7. In the New connection dialog box, click Serial. 8. On the Port menu, click COMxx: USB Serial Port (COMxx). If there are two or more options, select the last COM port on the list. Click OK. Figure 9. New Connection Dialog Box 9. The selected COM port/default baud rate appear in the Tera Term VT window title bar as shown in Figure 10. On the Setup menu, click Serial port. 8 iCEstick Evaluation Kit Figure 10. Tera Term VT Window with Selected COM Port /Default Baud Rate 10. The Serial port setup dialog box opens. In the Baud rate menu, click 115200. Leave other options with default settings. Click OK. Figure 11. Serial Port Setup Dialog Box 11. The selected COM port/115200 baud rate appear in the Tera Term VT window title bar as shown in Figure 12. On the Setup menu, click Terminal. 9 iCEstick Evaluation Kit Figure 12. Tera Term VT Window with Selected COM Port /Baud Rate 12. The Terminal setup dialog box opens. Select Local echo. Leave other options with default value. Click OK. Figure 13. Terminal Setup Dialog Box When you type in the Tera Term VT window using the TX design, a lower case character is echoed with a capital character from the iCE device as shown in the Figure 14. 10 iCEstick Evaluation Kit Figure 14. Tera Term VT Window Using TX Design For IrDA RX, the above Tera Term setting is the same but the bitstream for the iCE device is different. With a setup of two iCEstick boards facing each other, one programmed with IrDA TX and the other programmed with IrDA RX, the character typed in IrDA TX PC is transferred to and displayed on IrDA RX PC monitor. You can change the angle of the TX board facing the RX board to see when the IrDA link would break. 11 iCEstick Evaluation Kit Diligent Pmod Connector and Accelerometer Demo On the iCEstick board, location J2 is a 2x6 position Pmod (Peripheral MODule) Digilent connector. The iCEstick board supports a variety of Pmod peripheral modules for easy I/O expansion. Figure 3 lists the 0.1” through-hole headers on the iCEstick board that support Pmod modules. Pmod modules come in different form factors, and each Pmod header includes power and ground supplies. The easiest way to support a Pmod module is to add the appropriate female socket. Straight-through or right-angle connectors can be used. Male headers are an alternate solution when using the interface cable provided with most Pmod modules. Table 3. Diligent Pmod Compatible Connector Description Connection Left Row pins Right Row pins Connection PIO1_02 1 7 PIO1_06 PIO1_03 2 8 PIO1_07 PIO1_04 3 9 PIO1_08 PIO1_05 4 10 PIO1_09 Ground 5 11 Ground 3.3v 6 12 3.3v The Accelerometer demo makes use of the Digilent PmodAcl accelerometer module from Diligent. The PmodAcl module needs to be plugged into J2 on the iCEstick board through the cable that comes with this module. The four LEDs D1, D2, D3 and D4 in the north, south, east and west pattern are configured to represent X+, Z+, X-, Z- of accelerometer movement direction respectively. When the accelerometer module is moved around, the diamond pattern LEDs on the iCEstick board goes on/off corresponding to the direction of the movement and orientation of the module. If all these LEDs light up at the same time (indicating a balance point), The D5 LED also lights up. Figure 15. Accelerometer Demo on iCEstick Acl Module iCE40 Accelerometer Demo on iCEstick 12 LED Programming Demo Designs with Lattice Programmer To program a bitstream file to iCE device: 1. Plug the iCEstick board to a USB port on a host PC with Programmer installed. 2. Run Programmer. The Diamond Programmer Getting Started window opens. Under Select an Action, click Create a new Blank Project. Click OK. If you try to create a new project from a scan, you will receive an error. Please select Create a new Blank Project. Figure 16. Diamond Programmer Getting Started Window 3. The Diamond Programmer interface opens. Under Cable Settings, in the Cable menu, click USB2. In the Port menu, click FTUSB-0. You can also click Detect Cable to set the correct cable and port. Figure 17. Cable and Port Settings 4. Select the Enable check box. 5. Double-click the cell under Device Family and click iCE40. Figure 18. Device Family Options 6. Double-click the cell under Device and click iCE40HX1K. Figure 19. Device Options 7. Double-click the cell under Operation. The Device Properties dialog box opens as shown in Figure 20. On the Access Mode menu, click SPI Flash Programming. Click OK.  Warning: NVCM Programming is NOT recommended. NVCM Programming is one time programming. If you use NVCM Programming to program iCE device, the iCE device can no longer be reprogrammed. Figure 20. Device Properties Dialog Box 8. Select the SPI flash part number. For the iCEstick, this is Micron SPI-N25Q032 8-pin VDFPN8 package. Also make sure to select the programming file. Once done, click OK. Figure 21. Select Serial SPI Flash 9. On the Programmer toolbar, click the Program button to initiate the download. The bitstream starts downloading to the iCE device. This takes a few seconds to complete. Expansion I/O Connections The iCEstick board contains two unpopulated 0.1” headers for users to implement their own connections. Connectors J1 and J3 each consist of 10 positions for a total of 20 connections. Two of these are tied to 3.3v and two are tied to ground. This leaves 16 general purpose I/Os that connect to the iCE40HX-1k device for user I/O. Table 4. Expansion I/O Connections J1 Connector Pin CPLD I/O Bank 0 J3 Connector CPLD Pin Pin CPLD I/O Bank 2 CPLD Pin 1 3.3v - 1 3.3v - 2 Ground - 2 Ground - 3 PIO0_02 112 3 PIO2_17 62 4 PIO0_03 113 4 PIO2_16 61 5 PIO0_04 114 5 PIO2_15 60 6 PIO0_05 115 6 PIO2_14 56 7 PIO0_06 116 7 PIO2_13 48 8 PIO0_07 117 8 PIO2_12 47 9 PIO0_08 118 9 PIO2_11 45 10 PIO0_09 119 10 PIO2_10 44 Test Points There are three unpopulated test points. TP1 is tied to 3.3v, TP2 is tied to 1.2v and TP3 is connected to ground. Lattice Demonstration Bitstreams All demonstration bitstreams and Design files are available at www.latticesemi.com/icestick. Technical Support Assistance e-mail: techsupport@latticesemi.com Internet: www.latticesemi.com Revision History Date Version August 2013 01.0 Change Summary Initial release. © 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. A B C D 5 USB CONNECTOR 5 USB to SPI / RS232 4 4 Power from USB 5V 3 RS232 I/Os 3 HEADER 2 I/Os BANK 2 iCE40-HX1K-TQ144 FPGA BANK 0 HEADER I/Os 2 BANK 1 SPI Date: Size B Title HEADER Apr 12, 2013 ICE40HX1K-STICK-EVN Document Number 1 Sheet 1 iCEstick Evaluation Kit - Block Diagram AXELSYS I/Os LEDS 1 of 5 Rev A A B C D Appendix A. Schematic Diagrams BANK 3 HEADER A B C D 0.1uF C12 8 7 6 5 5 CS CLK DI DO 93LC56-SO8 VCC NU ORG VSS U2 0.1uF 0.1uF +3.3V C7 C6 +3.3V 1 2 3 4 R8 10K R7 0.1uF C8 10K +3.3V 0.1uF C5 10K R9 R15 2.2K 0.1uF C9 4 4 2 1 OUTPUT VDD 12.0000MHZ GND STANDBY# X1 3 4 0.1uF 10uF +3.3V C11 C10 VCC1_8FT +3.3V +3.3V 0 R18 0.1uF C13 5 5 3 FT_EECS FT_EECLK FT_EEDATA 12K 2.2K iCE_CLK R6 R5 0.1uF 4.7uF +3.3V C4 0.1uF C2 C3 4.7uF C1 3 DM DP 4 13 3 2 63 62 61 6 14 7 8 49 50 VCC1_8FT FT2232H +3.3V PWREN# BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 SUSPEND# FTDI High-Speed USB TEST OSCO OSCI EECS EECLK EEDATA REF RESET# DM DP VREGOUT VREGIN U1 FT2232HL AGND 10 5 4 9 VPHY VPLL 12 37 64 VCORE VCORE VCORE 20 31 42 56 VCCIO VCCIO VCCIO VCCIO GND GND GND GND GND GND GND GND 1 5 11 15 25 35 47 51 36 60 48 52 53 54 55 57 58 59 38 39 40 41 43 44 45 46 26 27 28 29 30 32 33 34 16 17 18 19 21 22 23 24 2 2 Title Date: Size B R44 R45 0 0 AXELSYS RS232_Rx_TTL RS232_Tx_TTL RTSn CTSn DTRn DSRn DCDn iCE_CDONE iCE_CREST iCE_SS_B iCE_SCK iCE_MOSI iCE_MISO 4 4 4 4 4 4 4 4 4 4 4 4 4 Apr 12, 2013 ICE40HX1K-STICK-EVN Document Number 1 Sheet 2 of iCEstick Evaluation Kit - USB to SPI/RS232 R10 R11 R12 R13 R14 R16 R17 R4 0 SS 0 0 0 0 0 0 0 R1 R2 R3 0 0 0 SCK SI SO 1 5 R ev A A B C D A B C D 5 5 C15 0.1uF C14 0.1uF +3.3V 129 128 110 124 125 130 131 133 123 PIO0_02 PIO0_03 PIO0_04 PIO0_05 PIO0_06 PIO0_07 PIO0_08 PIO0_09 PIO0_10 PIO0_11 PIO0_12 PIO0_13 PIO0_14 PIO0_15 PIO0_16 PIO0_17 PIO0_18 PIO0_19 PIO0_20 PIO0_21 PIO0_22 PIO0_06 PIO0_07 PIO0_08 PIO0_09 7 8 9 10 DNI 4 PIO0_04 PIO0_05 6 PIO0_03 4 5 PIO0_02 112 113 114 115 116 117 118 119 120 121 122 134 135 136 137 138 139 141 142 143 144 3 2 1 Female header 1x10 J1 NC pins may be routed through GBIN0/PIO0_00 GBIN1/PIO0_01 NC_1 NC_2 NC_3 NC_4 NC_19 BANK 0 VCCIO0_01 VCCIO0_02 U3A iCE40HX1K-TQ144 4 +3.3V PIO0_02 PIO0_03 PIO0_04 PIO0_05 PIO0_06 PIO0_07 PIO0_08 PIO0_09 0.1uF C16 +3.3V 3 3 0.1uF C17 PIO1_05 PIO1_04 PIO1_03 PIO1_02 10K R21 94 93 75 73 76 74 77 82 83 84 85 89 100 BANK 1 PIO1_02 PIO1_03 PIO1_04 PIO1_05 PIO1_06 PIO1_07 PIO1_08 PIO1_09 PIO1_10 PIO1_11 PIO1_12 PIO1_13 PIO1_14 PIO1_15 PIO1_16 PIO1_17 PIO1_18 PIO1_19 PIO1_20 6 5 4 3 2 1 Pmod 2x6 J2 12 11 10 9 8 7 NC pins may be routed through GBIN2/PIO1_00 GBIN3/PIO1_01 PIO1_21/TCK PIO1_22/TDI PIO1_23/TDO PIO1_24/TMS TRST_B NC_5 NC_6 NC_7 NC_8 VCCIO1_01 VCCIO1_02 U3B iCE40HX1K-TQ144 PIO1_02 PIO1_03 PIO1_04 PIO1_05 PIO1_06 PIO1_07 PIO1_08 PIO1_09 2 0.1uF C20 +3.3V PIO1_09 PIO1_08 PIO1_07 PIO1_06 78 79 80 81 87 88 90 91 95 96 97 98 99 101 102 104 105 106 107 2 5 5 5 5 5 Date: Size B Title LED4 LED3 LED2 LED1 LED0 0.1uF C18 47 R19 47 R20 5 4 3 2 7 8 6 1 Apr 12, 2013 ICE40HX1K-STICK-EVN Document Number 1 Sheet 3 TFDU4101-TR3 SD RXD TXD IREDC NC GND VCC1 VCC2 U4 iCEstick Evaluation Kit - FPGA AXELSYS 4.7uF C19 +3.3V 1 of 5 R ev A A B C D A B C D 2 2 5 iCE_CDONE iCE_CREST 5 10K R46 +3.3V R22 10K J3 0 DNI R23 DNI BANK 2 PIO2_13 PIO2_12 PIO2_11 PIO2_10 9 10 6 8 PIO2_14 5 7 PIO2_16 PIO2_15 4 PIO2_17 3 3 0.1uF +3.3V C25 PIO2_10 PIO2_11 PIO2_12 PIO2_13 PIO2_14 PIO2_15 PIO2_16 PIO2_17 2 +3.3V NC pins may be routed through GBIN4/PIO2_02 GBIN5/PIO2_01 CDONE CRESET_B PIO2_18/CBSEL0 PIO2_19/CBSEL1 NC_9 PIO2_00 PIO2_03 PIO2_04 PIO2_05 PIO2_06 PIO2_07 PIO2_08 PIO2_09 PIO2_10 PIO2_11 PIO2_12 PIO2_13 PIO2_14 PIO2_15 PIO2_16 PIO2_17 52 58 37 38 39 41 42 43 44 45 47 48 56 60 61 62 3 1 50 49 65 66 63 64 55 VCCIO2_01 VCCIO2_02 4 Female header 1x10 0.1uF 0.1uF +3.3V C24 C23 46 57 U3C iCE40HX1K-TQ144 4 72 iCE_CLK 0.1uF C22 SPI SPI_VCC 21 20 15 16 17 18 6 30 iCE_SS_B iCE_SCK 2 iCE_MOSI 2 iCE_MISO 2 2 70 68 67 71 2 5 1 3 6 CS WP SCK SDI U5 10K R24 7 2 23 24 25 26 28 29 31 32 33 34 22 19 1 2 3 4 7 8 9 10 11 12 R26 10K R25 10K Date: Size B Title 10K R27 DCDn DSRn DTRn CTSn RTSn RS232_Tx_TTL RS232_Rx_TTL 1 2 2 2 2 2 2 2 Apr 16, 2013 ICE40HX1K-STICK-EVN Document Number 1 Sheet iCEstick Evaluation Kit - FPGA AXELSYS N25Q032A13ESC40F HOLD SDO 0.1uF C26 PIO3_14/DP09A PIO3_15/DP09B PIO3_16/DP10A PIO3_17/DP10B PIO3_18/DP11A PIO3_19/DP11B PIO3_20/DP12A PIO3_21/DP12B PIO3_22/DP13A PIO3_23/DP13B PIO3_13/DP08B PIO3_12/DP07A PIO3_02/DP00A PIO3_03/DP00B PIO3_04/DP01A PIO3_05/DP01B PIO3_06/DP02A PIO3_07/DP02B PIO3_08/DP03A PIO3_09/DP03B PIO3_10/DP04A PIO3_11/DP04B NC pins may be routed through GBIN6/PIO3_00/DP08A GBIN7/PIO3_01/DP07B NC_10 NC_11 NC_12 NC_13 BANK 3 VCCIO3_01 VCCIO3_02 U3D iCE40HX1K-TQ144 PIOS_00/SPI_SCK PIOS_01/SPI_SI PIOS_02/SPI_SO PIOS_03/SPI_SS_B U3E iCE40HX1K-TQ144 2 0.1uF C21 +3.3V 2 8 VCC GND 4 4 of 5 R ev A A B C D A B C D 5 USB AM 90 VCC DD+ GND 1M 10uF J4 R31 C39 VBUS_5V 1 2 3 4 VBUS_5V 1M R32 0.1uF 2 2 0.1uF C43 THERMPAD PWRGD2 PWRGD1 SHDN2 SHDN1 IN1_1 IN1_2 IN2_1 IN2_2 U6 DM DP 21 12 19 11 20 18 17 14 13 1uF 10uF GND1 16 GND2 15 4 10 9 8 7 1 2 0.01uF C42 0.01uF C40 0.1uF 0.1uF 3 C32 C31 4 +1.2V 100 R43 LT3030EFE#TRPBF ADJ2 BYP2 OUT2_2 OUT2_1 ADJ1 BYP1 OUT1_2 OUT1_1 0.1uF C30 GND3 5 GND4 6 C29 C45 0.1uF 100 R35 10uF 4.7uF C41 210K +1.22V R33 C44 357K R29 0.01uF C33 36 35 5 13 14 59 69 86 103 132 140 0.1 R34 +1.2V 100 R30 0.1 R28 PLLVCC PLLGND GND_01 GND_02 GND_03 GND_04 GND_05 GND_06 GND_07 GND_08 GND_09 POWER U3F iCE40HX1K-TQ144 10uF C38 +3.31V 3 VCC_01 VCC_02 VCC_03 VCC_04 NC_18 NC_17 NC_16 NC_15 NC_14 VPP_FAST VPP_2V5 +3.3V 51 27 92 111 40 54 126 53 127 109 108 1 +1.2V CDBU0520 2 D6 +3.3V 3 LED4 LED3 3 LED1 LED2 3 LED0 3 3 2 +3.3V Date: Size B Title D5 Green 1K TP2 DNI TP3 D2 Red 1K R41 1 Apr 12, 2013 ICE40HX1K-STICK-EVN Document Number 1 Sheet 5 of D1 Red 1K R40 iCEstick Evaluation Kit - Power, LEDs AXELSYS D3 Red 1K R39 LEDs D4 Red 1K R38 +1.2V 0.01uF 0.1uF DNI C37 C36 1uF +3.3V C35 R37 TP1 DNI 10uF C34 1 C28 1 2 C27 1 2 1 2 1 2 +1.2V 3 1 4 1 2 5 1 2 5 R ev A A B C D
ICE40HX1K-STICK-EVN 价格&库存

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