LT1182/LT1183/LT1184/LT1184F
CCFL/LCD Contrast
Switching Regulators
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DESCRIPTION
FEATURES
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The LT®1182/LT1183 are dual current mode switching
regulators that provide the control function for Cold Cathode Fluorescent Lighting (CCFL) and Liquid Crystal Display
(LCD) Contrast. The LT1184/LT1184F provide only the
CCFL function. The ICs include high current, high efficiency
switches, an oscillator, a reference, output drive logic,
control blocks and protection circuitry. The LT1182 permits positive or negative voltage LCD contrast operation.
The LT1183 permits unipolar contrast operation and pins
out an internal reference. The LT1182/LT1183 support
grounded and floating lamp configurations. The LT1184F
supports grounded and floating lamp configurations. The
LT1184 supports only grounded lamp configurations. The
Wide Input Voltage Range: 3V to 30V
Low Quiescent Current
High Switching Frequency: 200kHz
CCFL Switch : 1.25A, LCD Switch: 625mA
Grounded or Floating Lamp Configurations
Open-Lamp Protection
Positive or Negative Contrast Capability
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APPLICATIONS
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Notebook and Palmtop Computers
Portable Instruments
Automotive Displays
Retail Terminals
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
90% Efficient Floating CCFL Configuration with Dual Polarity LCD Contrast
UP TO 6mA
ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN
ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1182 HIGH-SIDE
SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON.
LAMP
10
C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20
CCFL BACKLIGHT APPLICATION CIRCUITS CONTAINED IN THIS
DATA SHEET ARE COVERED BY U.S. PATENT NUMBER 5408162
AND OTHER PATENTS PENDING
C2
27pF
3kV
6
L1
Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001
L1 = COILTRONICS CTX210605
3
+
L2 = COILTRONICS CTX100-4
L3 = COILTRONICS CTX02-12403
C5
1000pF
*DO NOT SUBSTITUTE COMPONENTS
R2
220k
COILTRONICS (407) 241-7876
0µA TO 45µA ICCFL
CURRENT GIVES
0mA TO 6mA
BULB CURRENT.
THIS IS EQUAL TO
0% TO 90% DUTY
CYCLE FOR THE
PWM SIGNAL.
V (PWM)
0V TO 5V
1kHz PWM
R4
46.4k
1%
C6
2.2µF
1
4
5
+
C3B
2.2µF
35V
R3
100k
Q2*
+
L2
100µH
R5, 43.2k, 1%
+
2
3
C7, 1µF
5
6
C8, 0.68µF
7
R7, 10K 8
CCFL
PGND
CCFL VSW
ICCFL
BULB
DIO
BAT
LT1182
CCFL VC
ROYER
AGND
VIN
SHDN
FBP
LCD VC
FBN
LCD
PGND
LCD VSW
C12
2.2µF
35V
Q1*
D5
BAT85
1
C3A
2.2µF
35V
R1
750Ω
C1*
0.068µF
4
SHUTDOWN
2
D3
1N5934A
4
24V
D1
1N5818
BAT
8V TO 28V
EITHER NEGCON OR POSCON
MUST BE GROUNDED.
GROUNDING NEGCON GIVES
VARIABLE POSITIVE CONTRAST
FROM 10V TO 30V.
GROUNDING POSCON GIVES
VARIABLE NEGATIVE CONTRAST
FROM –10V TO – 30V.
POSCON
L3
6
D2
2
1N914
16
9
C11
22µF
35V
+
NEGCON
15
N = 1:2
14
13
+
12
C4
2.2µF
D4
1N914
R12
20k
VIN
≥ 3V
R13
8.45k
1%
11
C9, 0.01µF
10
C10
0.01µF
9
R9, 4.99k, 1%
R10, 10k, 1%
R14
1.21k
1%
R11, 20k, 1%
5V
1182/3 TA01
1
LT1182/LT1183/LT1184/LT1184F
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DESCRIPTION
LT1184/LT1184F pin out the reference for simplified programming of lamp current.
The LT1182/LT1183/LT1184/LT1184F operate with input
supply voltages from 3V to 30V. The ICs also have a
battery supply voltage pin that operates from 4.5V to 30V.
The LT1182/LT1183 draw 9mA typical quiescent current
while the LT1184/LT1184F draw 6mA typical quiescent
current. An active low shutdown pin typically reduces total
supply current to 35µA for standby operation. A 200kHz
switching frequency minimizes the size of required magnetic components. The use of current mode switching
techniques with cycle-by-cycle limiting gives high reliability and simple loop frequency compensation. The LT1182/
LT1183/LT1184/LT1184F are all available in 16-pin narrow SO packages.
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ABSOLUTE MAXIMUM RATINGS
VIN, BAT, Royer, Bulb .............................................. 30V
CCFL VSW, LCD VSW ............................................... 60V
Shutdown ................................................................. 6V
ICCFL Input Current .............................................. 10mA
DIO Input Current (Peak, < 100ms) .................... 100mA
LT1182: FBP, FBN, LT1183: FB Pin Current......... ±2mA
LT1183/LT1184/1184F: REF Pin Source Current .... 1mA
Junction Temperature (Note 1) ............................ 100°C
Operating Ambient Temperature Range ..... 0°C to 100°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER INFORMATION
TOP VIEW
CCFL PGND
1
16 CCFL VSW
ICCFL
2
15 BULB
DIO
3
14 BAT
CCFL VC
4
13 ROYER
AGND
5
SHUTDOWN
LCD VC
LCD PGND
ORDER PART
NUMBER
TOP VIEW
CCFL PGND
1
16 CCFL VSW
ICCFL
2
15 BULB
DIO
3
14 BAT
CCFL VC
4
13 ROYER
12 VIN
AGND
5
12 VIN
6
11 FBP
SHUTDOWN
6
11 REF
7
10 FBN
LCD VC
7
10 FB
8
9
LCD PGND
8
9
LT1182CS
LCD VSW
S PACKAGE
16-LEAD PLASTIC SO
CCFL PGND
1
16 CCFL VSW
ICCFL
2
15 BULB
DIO
3
14 BAT
CCFL VC
4
13 NC
ORDER PART
NUMBER
LT1184CS
TOP VIEW
CCFL PGND
1
16 CCFL VSW
ICCFL
2
15 BULB
DIO
3
14 BAT
CCFL VC
4
13 ROYER
AGND
5
12 VIN
AGND
5
12 VIN
6
11 REF
SHUTDOWN
6
11 REF
NC
7
10 NC
NC
7
10 NC
NC
8
9
NC
NC
8
9
Consult factory for Industrial and Military grade parts
2
LCD VSW
SHUTDOWN
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 100°C, θJA = 100°C/W
LT1183CS
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 100°C, θJA = 100°C/W
TJMAX = 100°C, θJA = 100°C/W
TOP VIEW
ORDER PART
NUMBER
NC
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 100°C, θJA = 100°C/W
ORDER PART
NUMBER
LT1184FCS
LT1182/LT1183/LT1184/LT1184F
ELECTRICAL CHARACTERISTICS
TA = 25°C, VIN = 5V, BAT = Royer = Bulb = 12V, ICCFL = SHUTDOWN = CCFL VSW = Open, DIO = GND, CCFL VC = 0.5V,
(LT1182/LT1183) LCD VC = 0.5V, LCD VSW = Open, (LT1182) FBN = FBP = GND, (LT1183) FB = GND,
(LT1183/LT1184/LT1184F) REF = Open, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
IQ
Supply Current
LT1182/LT1183: 3V ≤ VIN ≤ 30V
LT1184/LT1184F: 3V ≤ VIN ≤ 30V
ISHDN
SHUTDOWN Supply Current
SHUTDOWN Input Bias Current
TYP
MAX
UNITS
9
6
14
9.5
mA
mA
SHUTDOWN = 0V, CCFL VC = LCD VC = Open (Note 2)
35
70
µA
SHUTDOWN = 0V, CCFL VC = LCD VC = Open
3
6
µA
0.6
0.85
1.2
V
175
200
225
kHz
●
160
200
240
kHz
●
80
75
85
85
%
%
60
70
V
SHUTDOWN Threshold Voltage
f
DC(MAX)
BV
Switching Frequency
Maximum Switch Duty Cycle
MIN
●
●
●
Measured at CCFL VSW and LCD VSW, ISW = 50mA,
ICCFL = 100µA, CCFL VC = Open, (LT1182) FBN = FBP =
1V, (LT1183) FB = 1V, (LT1182/LT1183) LCD VC = Open
Measured at CCFL VSW and LCD VSW
Switch Breakdown Voltage
Measured at CCFL VSW and LCD VSW
Switch Leakage Current
VSW = 12V, Measured at CCFL VSW and LCD VSW
VSW = 30V, Measured at CCFL VSW and LCD VSW
ICCFL Summing Voltage
3V ≤ VIN ≤ 30V, Measured on LT1182/LT1183
0.41
0.37
0.45
0.45
0.49
0.54
V
V
●
0.425
0.385
0.465
0.465
0.505
0.555
V
V
5
15
mV
–5
5
15
µA
4.95
5.20
µA/µA
∆ICCFL Summing Voltage for
∆Input Programming Current
ICCFL = 0µA to 100µA
CCFL VC Offset Sink Current
CCFL VC = 1.5V, Positive Current Measured into Pin
∆CCFL VC Source Current for
∆ICCFL Programming Current
ICCFL = 25µA, 50µA, 75µA, 100µA,
CCFL VC = 1.5V
●
4.70
CCFL VC to DIO Current Servo Ratio
DIO = 5mA out of Pin, Measure IVC at CCFL VC = 1.5V
●
94
CCFL VC Low Clamp Voltage
VBAT – VBULB = Bulb Protect Servo Voltage
●
CCFL VC High Clamp Voltage
ICCFL = 100µA
●
CCFL VC Switching Threshold
CCFL VSW DC = 0%
CCFL High-Side Sense Servo Current
ICCFL = 100µA, IVC = 0µA at CCFL VC = 1.5V
CCFL High-Side Sense Servo Current
Line Regulation
BAT = 5V to 30V, ICCFL = 100µA,
IVC = 0µA at CCFL VC = 1.5V
CCFL High-Side Sense Supply Current
Current Measured into BAT and Royer Pins
●
Bulb Protect Servo Voltage
ICCFL = 100µA, IVC = 0µA at CCFL VC = 1.5V,
Servo Voltage Measured Between BAT and Bulb Pins
●
Bulb Input Bias Current
ICCFL = 100µA, IVC = 0µA at CCFL VC = 1.5V
ILIM1
CCFL Switch Current Limit
Duty Cycle = 50%
Duty Cycle = 75% (Note 3)
●
●
VSAT1
CCFL Switch On-Resistance
CCFL ISW = 1A
●
∆IQ
∆ISW1
Supply Current Increase During
CCFL Switch On-Time
CCFL ISW = 1A
VREF
Reference Voltage
Measured at REF (Pin 11) on LT1183/LT1184/LT1184F
Measured at REF (Pin 11) on LT1183
Measured at REF (Pin 11) on LT1184/LT1184F
µA
µA
●
3V ≤ VIN ≤ 30V, Measured on LT1184/LT1184F
Reference Output Impedance
20
40
99
104
µA/mA
0.1
0.3
V
1.7
2.1
2.4
V
●
0.6
0.95
1.3
V
●
0.93
1.00
1.07
A
0.1
0.16
%/V
50
100
150
µA
6.5
7.0
7.5
V
5
9
µA
1.9
1.6
3.0
2.6
A
A
0.6
1.0
Ω
20
30
mA/A
1.25
0.9
●
1.224
1.214
1.244
1.244
1.264
1.274
V
V
●
●
20
5
45
15
70
30
Ω
Ω
3
LT1182/LT1183/LT1184/LT1184F
ELECTRICAL CHARACTERISTICS
TA = 25°C, VIN = 5V, BAT = Royer = Bulb = 12V, ICCFL = SHUTDOWN = CCFL VSW = Open, DIO = GND, CCFL VC = 0.5V,
(LT1182/LT1183) LCD VC = 0.5V, LCD VSW = Open, (LT1182) FBN = FBP = GND, (LT1183) FB = GND,
(LT1183/LT1184/LT1184F) REF = Open, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VREF – ICCFL Summing Voltage
Measured on LT1183
●
0.760
0.725
0.795
0.795
0.830
0.865
V
V
●
0.740
0.705
0.775
0.775
0.810
0.845
V
V
LT1182: Measured at FBP Pin, FBN = 1V, LCD VC = 0.8V
LT1183: Measured at FB Pin, LCD VC = 0.8V
●
1.224
1.214
1.244
1.244
1.264
1.274
V
V
REF1 Voltage Line Regulation
3V ≤ VIN ≤ 30V, LCD VC = 0.8V
●
0.01
0.03
%/V
FBP/FB Input Bias Current
LT1182: FBP = REF1, FBN = 1V, LCD VC = 0.8V
LT1183: FB = REF1, LCD VC = 0.8V
●
0.35
1.0
µA
LCD FBN/FB Offset Voltage
LT1182: Measured at FBN Pin, FBP = 0V, LCD VC = 0.8V
LT1183: Measured at FB Pin, LCD VC = 0.8V
●
– 12
– 12
–4
–1
mV
mV
Offset Voltage Line Regulation
3V ≤ VIN ≤ 30V, LCD VC = 0.8V
●
0.01
0.2
%/V
FBN/FB Input Bias Current
LT1182: FBN = Offset Voltage, FBP = 0V, LCD VC = 0.8V
LT1183: FB = Offset Voltage, LCD VC = 0.8V
●
– 3.0
– 1.0
LT1182: ∆IVC = ±25µA, FBN = 1V
LT1183: ∆IVC = ±25µA
●
650
500
900
900
1150
1300
µmhos
µmhos
LT1182: ∆IVC = ±25µA, FBP = GND
LT1183: ∆IVC = ±25µA
●
550
400
800
800
1050
1200
µmhos
µmhos
VREF – ICCFL Summing Voltage
REF1
gm
LCD FBP/FB Reference Voltage
FBP/FB to LCD VC Transconductance
FBN/FB to LCD VC Transconductance
Measured on LT1184/LT1184F
µA
LCD Error Amplifier Source Current
LT1182: FBP = FBN = 1V or 0.25V,
LT1183: FB = 1V or 0.25V
●
50
100
175
µA
LCD Error Amplifier Sink Current
LT1182: FBP = FBN = 1.5V or – 0.25V,
LT1183: FB = 1.5V or – 0.25V
●
35
100
175
µA
LCD VC Low Clamp Voltage
LT1182: FBP = FBN = 1.5V, LT1183: FB = 1.5V
0.01
0.3
V
LCD VC High Clamp Voltage
LT1182: FBP = FBN = 1V, LT1183: FB = 1V
1.7
2.0
2.4
V
0.6
0.95
1.3
V
0.625
0.400
1.00
0.85
1.5
1.3
A
A
1.0
1.65
Ω
20
30
LCD VC Switching Threshold
LT1182: FBP = FBN = 1V, LT1183: FB = 1V, VSW DC = 0%
ILIM2
LCD Switch Current Limit
Duty Cycle = 50%
Duty Cycle = 75% (Note 3)
●
●
VSAT2
LCD Switch On-Resistance
LCD ISW = 0.5A
●
∆IQ
∆ISW2
Supply Current Increase During
LCD Switch On-Time
LCD ISW = 0.5A
Switch Minimum On-Time
Measured at CCFL VSW and LCD VSW
The ● denotes specifications which apply over the specified operating
temperature range.
Note 1: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LT1182CS/LT1183CS/LT1184CS/LT1184FCS: TJ = TA + (PD × 100°C/W)
4
– 20
– 27
0.45
mA/A
µs
Note 2: Does not include switch leakage.
Note 3: For duty cycles (DC) between 50% and 75%, minimum
guaranteed switch current is given by ILIM = 1.4(1.393 – DC) for the CCFL
regulator and ILIM = 0.7(1.393 – DC ) for the LCD contrast regulator due to
internal slope compensation circuitry.
LT1182/LT1183/LT1184/LT1184F
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TYPICAL PERFORMANCE CHARACTERISTICS
LT1184/LT1184F Supply Current
vs Temperature
10
13
9
90
12
8
8O
10
9
8
VIN = 30V
VIN = 3V
7
SHUTDOWN CURRENT (µA)
11
100
7
6
VIN = 30V
5
VIN = 3V
4
3
6
2
5
1
4
–75 – 50 – 25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
0
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
VIN = 3V
1
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
CCFL Frequency vs Temperature
240
230
1.1
1.0
0.9
0.8
0.7
220
210
200
0.6
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
CCFL Duty Cycle vs Temperature
180
160
–75 –50 –25
0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G06
LCD Frequency vs Temperature
93
VIN = 3V
190
LT1182 G05
95
VIN = 30V
170
LT1182 G04
LCD Duty Cycle vs Temperature
240
95
230
93
91
91
89
87
85
83
81
79
220
210
200
LCD DUTY CYCLE (%)
LCD FREQUENCY (kHz)
CCFL DUTY CYCLE (%)
VIN = 3V
LT1182 G03
CCFL FREQUENCY (kHz)
SHUTDOWN THRESHOLD VOLTAGE (V)
VIN = 5V
3
2
30
20
0
–75 –50 – 25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
1.2
4
VIN = 5V
40
Shutdown Threshold Voltage
vs Temperature
6
VIN = 30V
60
50
LT1182 G02
Shutdown Input Bias Current
vs Temperature
5
VIN = 30V
70
10
LT1182 G01
SHUTDOWN INPUT BIAS CURRENT (µA)
Shutdown Current
vs Temperature
14
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
LT1182/LT1183 Supply Current
vs Temperature
VIN = 30V
VIN = 3V
190
180
89
87
85
83
81
79
77
170
75
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
160
–75 – 50 –25
LT1182 • G07
77
0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G08
75
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G09
5
LT1182/LT1183/LT1184/LT1184F
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TYPICAL PERFORMANCE CHARACTERISTICS
ICCFL Summing Voltage
Load Regulation
10
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
T = –55°C
T = 25°C
T = 125°C
0
20 40 60 80 100 120 140 160 180 200
ICCFL PROGRAMMING CURRENT (µA)
LT1182 • G10
1.0
ICCFL = 50µA
ICCFL = 10µA
4.90
1.6
1.4
I(DIO) = 10mA
I(DIO) = 5mA
0.8
0.6
I(DIO) = 1mA
0.4
I(DIO) = 5mA
98
97
96
95
–75 – 50 –25
0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G16
6
0.6
0.4
0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G15
CCFL VC High Clamp Voltage
vs Temperature
2.4
CCFL VC HIGH CLAMP VOLTAGE (V)
99
I(DIO) = 1mA
0
–75 –50 –25
0.30
CCFL VC LOW CLAMP VOLTAGE (V)
CCFL VC DIO CURRENT SERVO RATIO (µA/mA)
103
I(DIO) = 10mA
0.8
CCFL VC Low Clamp Voltage
vs Temperature
CCFL VC to DIO Current Servo
Ratio vs Temperature
I(DIO) = 1mA
I(DIO) = 5mA
1.0
LT1182 • G14
LT1182 • G13
100
I(DIO) = 10mA
1.2
0.2
0
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
4.80
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
101
3
2
1
CCFL VC = 0.5V
0
–1
–2
–3
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
Negative DIO Voltage
vs Temperature
0.2
4.85
102
CCFL VC = 1.0V
4
LT1182 • G12
NEGATIVE DIO VOLTAGE (V)
5.05
POSITIVE DIO VOLTAGE (V)
∆CCFL VC SOURCE CURRENT FOR
∆ICCFL PROGRAMMING CURRENT (µA/µA)
1.2
ICCFL = 100µA
CCFL VC = 1.5V
6
5
Positive DIO Voltage
vs Temperature
5.10
4.95
9
8
7
LT1182 • G11
∆CCFL VC Source Current for
∆ICCFL Programming Current
vs Temperature
5.00
CCFL VC Offset Sink Current
vs Temperature
CCFL VC SINK OFFSET CURRENT (µA)
0.53
0.52
0.51
0.50
0.49
0.48
VIN = 30V
0.47
VIN = 5V
0.46
0.45
VIN = 3V
0.44
0.43
0.42
0.41
0.40
0.39
0.38
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
∆ICCFL SUMMING VOLTAGE (mV)
ICCFL SUMMING VOLTAGE (V)
ICCFL Summing Voltage
vs Temperature
0.25
0.20
0.15
0.10
0.05
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G17
2.3
2.2
2.1
2.0
1.9
1.8
1.7
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G18
LT1182/LT1183/LT1184/LT1184F
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TYPICAL PERFORMANCE CHARACTERISTICS
LCD VC Low Clamp Voltage
vs Temperature
2.4
1.2
1.1
1.0
0.9
0.8
0.7
LDC VC HIGH CLAMP VOLTAGE (V)
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.10
0
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
0.6
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
2.2
2.1
2.0
1.9
1.8
1.7
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
100 125
LT1182 • G21
CCFL High-Side Sense Null
Current vs Temperature
CCFL HIGH-SIDE SENSE NULL CURRENT (A)
1.2
1.1
1.0
0.9
0.8
0.7
0.6
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
1.060
1.040
1.020
1.000
0.980
0.960
0.940
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
CCFL High-Side Sense Supply
Current vs Temperature
7.4
BULB PROTECT SERVO VOLTAGE (V)
7.5
140
110
100
90
80
70
60
50
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G25
0.120
0.100
0.080
0.060
0.040
0.020
0.000
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G24
Bulb Protect Servo Voltage
vs Temperature
150
120
0.140
LT1182 • G23
LT1182 • G22
130
0.160
Bulb Input Bias Current
vs Temperature
10
BULB INPUT BIAS CURRENT (µA)
1.3
CCFL High-Side Sense Null Current
Line Regulation vs Temperature
CCFL HIGH-SIDE SENSE LINE REGULATI0N (%V)
LCD VC Switching Threshold
Voltage vs Temperature
LDC VC SWITCHING THRESHOLD VOLTAGE (V)
2.3
LT1182 • G20
LT1182 • G19
CCFL HIGH-SIDE SENSE SUPPLY CURRENT (µA)
LCD VC High Clamp Voltage
vs Temperature
1.00
1.3
LCD VC LOW CLAMP VOLTAGE (V)
CCFL VC SWITCHING THRESHOLD VOLTAGE (V)
CCFL VC Switching Threshold
Voltage vs Temperature
7.3
7.2
7.1
ICCFL = 100µA
7.0
6.9
6.8
ICCFL = 50µA
6.7
6.6
8
6
4
2
ICCFL = 10µA
6.5
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G26
0
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G27
7
LT1182/LT1183/LT1184/LT1184F
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TYPICAL PERFORMANCE CHARACTERISTICS
FBP Reference Voltage Line
Regulation vs Temperature
1.254
1.244
1.234
1.224
1.214
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
0.03
1.0
0.9
0.025
FBP INPUT BIAS CURRENT (µA)
1.264
0.020
0.015
0.010
0.005
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G28
0
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G29
LCD FBN Offset Voltage
vs Temperature
LT1182 • G30
FBN Input Bias Current
vs Temperature
–1
3.0
–3
–5
–7
2.5
–9
–11
–13
–15
–17
–19
–21
–23
– 25
–27
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
FBN INPUT BIAS CURRENT (µA)
LCD FBN OFFSET VOLTAGE (mV)
FBP Input Bias Current
vs Temperature
FBP to LCD VC Transconductance
vs Temperature
2.0
1.5
1.0
0.5
0
–75 – 50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
FBP TO LCD VC TRANSCONDUCTANCE (µmhos)
LCD FBP REFERENCE VOLTAGE (V)
1.274
FBP REFERENCE VOLTAGE LINE REGULATION (%/V)
LCD FBP Reference
vs Temperature
1300
1200
1100
1000
900
800
700
600
500
–75 – 50 –25
0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G32
1200
70
1000
900
800
700
600
500
0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G34
8
30
LT1184/84F REF OUTPUT IMPEDANCE (Ω)
1100
400
–75 – 50 –25
LT1184/84F REF Output
Impedance vs Temperature
LT1183 REF Output Impedance
vs Temperature
LT1183 REF 0UTPUT IMPEDANCE (Ω)
FBN TO LCD VC TRANSCONDUCTANCE (µmhos)
FBN to LCD VC Transconductance
vs Temperature
LT1182 • G33
65
60
55
50
45
40
35
30
25
20
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G35
25
20
15
10
5
–75 – 50 –25 0
25 50 75 100 125 150 175
TEMPERATURE (°C)
LT1182 • G36
LT1182/LT1183/LT1184/LT1184F
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TYPICAL PERFORMANCE CHARACTERISTICS
LCD VSW Sat Voltage
vs Switch Current
CCFL VSW Sat Voltage
vs Switch Current
CCFL VSW Current Limit
vs Duty Cycle
2.0
1.0
2.5
T = 25°C
0.7
T = 125°C
0.6
T = –5°C
0.5
0.4
0.3
0.2
CCFL VSW CURRENT LIMIT (A)
0.8
LCD VSW SAT VOLTAGE (V)
CCFL VSW SAT VOLTAGE (V)
0.9
1.6
1.2
T = 25°C
T = 125°C
T = –5°C
0.8
0.4
2.0
T = 0°C
T = 25°C
1.5
T = 125°C
MINIMUM
1.0
0.5
0.1
0
0.3
0
0.9
1.2
0.6
SWITCH CURRENT (A)
0
1.5
0
LT1182 • G37
0.9
1.2
0.6
SWITCH CURRENT (A)
0
1.5
0
LT1182 • G38
LCD VSW Current Limit
vs Duty Cycle
1.2
100
100
90
90
80
T = 0°C
T = 125°C
0.6
MINIMUM
60
50
40
0
10
20
30 40 50 60
DUTY CYCLE (%)
70
80
90
LT1182 • G40
80
90
60
50
40
20
20
10
10
0
0
70
30
30
0.3
30 40 50 60
DUTY CYCLE (%)
70
70
FORCED BETA
FORCED BETA
T = 25°C
20
Forced Beta vs ISW on LCD VSW
110
80
0.9
10
LT1182 • G39
Forced Beta vs ISW on CCFL VSW
1.5
LCD VSW CURRENT LIMIT (A)
0.3
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
CCFL ISW (A)
LT1182 • G41
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
LCD ISW (A)
LT1182 • G42
9
LT1182/LT1183/LT1184/LT1184F
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PIN FUNCTIONS
LT1182/LT1183/LT1184/LT1184F
CCFL PGND (Pin 1): This pin is the emitter of an internal
NPN power switch. CCFL switch current flows through
this pin and permits internal, switch-current sensing. The
regulators provide a separate analog ground and power
ground(s) to isolate high current ground paths from low
current signal paths. Linear Technology recommends the
use of star-ground layout techniques.
ICCFL (Pin 2): This pin is the input to the CCFL lamp current
programming circuit. This pin internally regulates to 450mV
(LT1182/LT1183) or 465mV (LT1184/LT1184F). The pin
accepts a DC input current signal of 0µA to 100µA full
scale. This input signal is converted to a 0µA to 500µA
source current at the CCFL VC pin. By shunt regulating the
ICCFL pin, the input programming current can be set with
DAC, PWM or potentiometer control. As input programming current increases, the regulated lamp current increases. For a typical 6mA lamp, the range of input
programming current is about 0µA to 50µA.
DIO (Pin 3): This pin is the common connection between
the cathode and anode of two internal diodes. The remaining terminals of the two diodes connect to ground. In a
grounded lamp configuration, DIO connects to the low
voltage side of the lamp. Bidirectional lamp current flows
in the DIO pin and thus the diodes conduct alternately on
half cycles. Lamp current is controlled by monitoring onehalf of the average lamp current. The diode conducting on
negative half cycles has one-tenth of its current diverted to
the CCFL VC pin. This current nulls against the source
current provided by the lamp-current programmer circuit.
A single capacitor on the CCFL VC pin provides both stable
loop compensation and an averaging function to the halfwave-rectified sinusoidal lamp current. Therefore, input
programming current relates to one-half of average lamp
current. This scheme reduces the number of loop compensation components and permits faster loop transient
response in comparison to previously published circuits.
If a floating-lamp configuration is used, ground the DIO
pin.
CCFL VC (Pin 4): This pin is the output of the lamp current
programmer circuit and the input of the current compara-
10
tor for the CCFL regulator. Its uses include frequency
compensation, lamp-current averaging for grounded lamp
circuits, and current limiting. The voltage on the CCFL VC
pin determines the current trip level for switch turnoff.
During normal operation this pin sits at a voltage between
0.95V (zero switch current) and 2.0V (maximum switch
current) with respect to analog ground (AGND). This pin
has a high impedance output and permits external voltage
clamping to adjust current limit. A single capacitor to
ground provides stable loop compensation. This simplified loop compensation method permits the CCFL regulator to exhibit single-pole transient response behavior and
virtually eliminates transformer output overshoot.
AGND (Pin 5): This pin is the low current analog ground.
It is the negative sense terminal for the internal 1.24V
reference and the ICCFL summing voltage in the LT1182/
LT1183/LT1184/LT1184F. It is also a sense terminal for
the LCD dual input error amplifier in the LT1182/LT1183.
Connect external feedback divider networks that terminate
to ground and frequency compensation components that
terminate to ground directly to this pin for best regulation
and performance.
SHUTDOWN (Pin 6): Pulling this pin low causes complete
regulator shutdown with quiescent current typically reduced to 35µA. The nominal threshold voltage for this pin
is 0.85V. If the pin is not used, it can float high or be pulled
to a logic high level (maximum of 6V). Carefully evaluate
active operation when allowing the pin to float high.
Capacitive coupling into the pin from switching transients
could cause erratic operation.
CCFL VSW (Pin 16): This pin is the collector of the internal
NPN power switch for the CCFL regulator. The power
switch provides a minimum of 1.25A. Maximum switch
current is a function of duty cycle as internal slope compensation ensures stability with duty cycles greater than
50%. Using a driver loop to automatically adapt base drive
current to the minimum required to keep the switch in a
quasi-saturation state yields fast switching times and high
efficiency operation. The ratio of switch current to driver
current is about 50:1.
LT1182/LT1183/LT1184/LT1184F
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PIN FUNCTIONS
Bulb (Pin 15): This pin connects to the low side of a 7V
threshold comparator between the BAT and Bulb pins.
This circuit sets the maximum voltage level across the
primary side of the Royer converter under all operating
conditions and limits the maximum secondary output
under start-up conditions or open lamp conditions. This
eases transformer voltage rating requirements. Set the
voltage limit to insure lamp start-up with worst-case, lamp
start voltages and cold-temperature system operating
conditions. The Bulb pin connects to the junction of an
external divider network. The divider network connects
from the center tap of the Royer transformer or the actual
battery supply voltage to the top side of the current source
“tail inductor”. A capacitor across the top of the divider
network filters switching ripple and sets a time constant
that determines how quickly the clamp activates. When
the comparator activates, sink current is generated to pull
the CCFL VC pin down. This action transfers the entire
regulator loop from current mode operation into voltage
mode operation.
BAT (Pin 14): This pin connects to the battery or battery
charger voltage from which the CCFL Royer converter and
LCD contrast converter operate. This voltage is typically
higher than the VIN supply voltage but can be equal or less
than VIN. However, the BAT voltage must be at least 2.1V
greater than the internal 2.4V regulator or 4.5V minimum
up to 30V maximum. This pin provides biasing for the
lamp current programming block, is used with the Royer
pin for floating lamp configurations, and connects to one
input for the open lamp protection circuitry. For floating
lamp configurations, this pin is the noninverting terminal
of a high-side current sense amplifier. The typical quiescent current is 50µA into the pin. The BAT and Royer pins
monitor the primary side Royer converter current through
an internal 0.1Ω top side current sense resistor. A 0A to 1A
primary side, center tap converter current is translated to
an input signal range of 0mV to 100mV for the current
sense amplifier. This input range translates to a 0µA to
500µA sink current at the CCFL VC pin that nulls against the
source current provided by the programmer circuit. The
BAT pin also connects to the top side of an internal clamp
between the BAT and Bulb pins.
Royer (Pin 13): This pin connects to the center-tapped
primary of the Royer converter and is used with the BAT
pin in a floating lamp configuration where lamp current is
controlled by sensing Royer primary side converter current. This pin is the inverting terminal of a high-side
current sense amplifier. The typical quiescent current is
50µA into the pin. If the CCFL regulator is not used in a
floating lamp configuration, tie the Royer and BAT pins
together. This pin is only available on the LT1182/LT1183/
LT1184F.
VIN (Pin 12): This pin is the supply pin for the LT1182/
LT1183/LT1184/LT1184F. The ICs accept an input voltage
range of 3V minimum to 30V maximum with little change
in quiescent current (zero switch current). An internal,
low dropout regulator provides a 2.4V supply for most of
the internal circuitry. Supply current increases as switch
current increases at a rate approximately 1/50 of switch
current. This corresponds to a forced Beta of 50 for each
switch. The ICs incorporate undervoltage lockout by sensing regulator dropout and lockout switching for input
voltages below 2.5V. Hysteresis is not used to maximize
the useful range of input voltage. The typical input voltage
is a 3.3V or 5V logic supply.
LT1182/LT1183
LCD VC (Pin 7): This pin is the output of the LCD contrast
error amplifier and the input of the current comparator for
the LCD contrast regulator. Its uses include frequency
compensation and current limiting. The voltage on the
LCD VC pin determines the current trip level for switch
turnoff. During normal operation, this pin sits at a voltage
between 0.95V (zero switch current) and 2.0V (maximum
switch current). The LCD VC pin has a high impedance
output and permits external voltage clamping to adjust
current limit. A series R/C network to ground provides
stable loop compensation.
LCD PGND (Pin 8): This pin is the emitter of an internal
NPN power switch. LCD contrast switch current flows
through this pin and permits internal, switch-current
sensing. The regulators provide a separate analog ground
and power ground(s) to isolate high current ground paths
from low current signal paths. Linear Technology recommends star-ground layout techniques.
11
LT1182/LT1183/LT1184/LT1184F
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PIN FUNCTIONS
LCD VSW (Pin 9): This pin is the collector of the internal
NPN power switch for the LCD contrast regulator. The
power switch provides a minimum of 625mA. Maximum
switch current is a function of duty cycle as internal slope
compensation ensures stability with duty cycles greater
than 50%. Using a driver loop to automatically adapt base
drive current to the minimum required to keep the switch
in a quasi-saturation state yields fast switching times and
high efficiency operation. The ratio of switch current to
driver current is about 50:1.
LT1182
FBN (Pin 10): This pin is the noninverting terminal for the
negative contrast control error amplifier. The inverting
terminal is offset from ground by –12mV and defines the
error amplifier output state under start-up conditions. The
FBN pin acts as a summing junction for a resistor divider
network. Input bias current for this pin is typically 1µA
flowing out of the pin. If this pin is not used, force FBN to
greater than 0.5V to deactivate the negative contrast
control input stage. The proximity of FBN to the LCD VSW
pin makes it sensitive to ringing on the switch pin. A small
capacitor (0.01µF) from FBN to ground filters switching
ripple.
FBP (Pin 11): This pin is the inverting terminal for the
positive contrast control error amplifier. The noninverting
terminal is tied to an internal 1.244V reference. Input bias
current for this pin is typically 0.5µA flowing into the pin.
If this pin is not used, ground FBP to deactivate the positive
contrast control input stage. The proximity of FBP to the
LCD VSW pin makes it sensitive to ringing on the switch
pin. A small capacitor (0.01µF) from FBP to ground filters
switching ripple.
LT1183
FB (Pin 10): This pin is the common connection between
the noninverting terminal for the negative contrast error
12
amplifier and the inverting terminal for the positive-contrast error amplifier. In comparison to the LT1182, the FBN
and the FBP pins tie together and come out as one pin. This
scheme permits one polarity of contrast to be regulated.
The proximity of FB to the LCD VSW pin makes it sensitive
to ringing on the switch pin. A small capacitor (0.01µF)
from FB to ground filters switching ripple.
The FB pin requires attention to start-up conditions when
generating negative contrast voltages. The pin has two
stable operating points; regulating to 1.244V for positive
contrast voltages or regulating to –12mV for negative
contrast voltages. Under start-up conditions, the FB pin
heads to a positive voltage. If negative contrast voltages
are generated, tie a diode from the FB pin to ground. This
ensures that the FB pin will clamp before reaching the
positive reference voltage. Switching action then pulls the
FB pin back to its normal servo voltage.
LT1183/LT1184/LT1184F
REF (Pin 11): This pin brings out the 1.244V reference. Its
functions include the programming of negative contrast
voltages with an external resistor divider network (LT1183
only) and the programming of lamp current for the ICCFL
pin. LTC does not recommend using the REF pin for both
functions at once. The REF pin has a typical output
impedance of 45Ω on the LT1183 and a typical output
impedance of 15Ω on the LT1184/LT1184F. Reference
load current should be limited to a few hundred microamperes, otherwise reference regulation will be degraded.
REF is used to generate the maximum programming
current for the ICCFL pin by placing a resistor between the
pins. PWM or DAC control subtracts from the maximum
programming current. A small decoupling capacitor (0.1uF)
is recommended to filter switching transients.
LT1182/LT1183/LT1184/LT1184F
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BLOCK DIAGRAM
LT1182/LT1183 CCFL/LCD Contrast Regulator Top Level Block Diagram
VIN
BAT
14
12
SHUTDOWN 6
SHUTDOWN
UNDERVOLTAGE
LOCKOUT
2.4V
REGULATOR
ROYER
13
THERMAL
SHUTDOWN
LCD
VSW
CCFL
VSW
9
16
200kHz
OSC
Q2
DRIVE 2
LOGIC 2
ANTISAT2
ILIM
AMP2
Q5
1×
GAIN = 4.4
0µA TO
100µA
+
V2
1.24V
–
Q6
2×
R1
0.125Ω
–
Q11
Q3
2×
Q4
5×
CCFL
+ – – +
+
7
+
ILIM
AMP1
GAIN = 4.4
LCD
8
COMP1
R3
1k
–
LCD LCD
PGND VC
gm
D2
6V
+
Q1
DRIVE 1
ANTISAT1
+
–
COMP2
R2
0.25Ω
LOGIC 1
R4
0.1Ω
–
Q7
9×
Q9
3×
V1
0.45V
–12mV
Q8
1×
Q10
2×
D1
11
10
2
5
3
15
4
1
FBP
FBN
ICCFL
AGND
DIO
BULB
CCFL
VC
CCFL
PGND
LT1183: FBP AND FBN ARE TIED TOGETHER TO CREATE FB
AT PIN 10. THE REFERENCE IS BROUGHT OUT TO PIN 11.
1182 BD01
13
LT1182/LT1183/LT1184/LT1184F
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BLOCK DIAGRAM
LT1184/LT1184F CCFL Regulator Top Level Block Diagram
VIN
BAT
14
12
SHUTDOWN 6
SHUTDOWN
UNDERVOLTAGE
LOCKOUT
2.4V
REGULATOR
ROYER
13
LT1184: HIGH-SIDE SENSE RESISTOR
R4 AND GM AMPLIFIER ARE REMOVED.
PIN 13 IS NO CONNECT.
THERMAL
SHUTDOWN
CCFL
VSW
16
200kHz
OSC
LOGIC 1
R4
0.1Ω
ANTISAT1
+
–
gm
D2
6V
COMP1
+
R3
1k
Q5
1×
Q6
2×
Q1
DRIVE 1
ILIM
AMP1
R1
0.125Ω
–
Q11
GAIN = 4.4
Q3
2×
+
0µA TO
100µA
Q4
5×
CCFL
–
VREF
1.24V
Q7
9×
Q8
1×
Q9
3×
V1
0.465V
Q10
2×
D1
11
2
5
3
15
4
1
REF
ICCFL
AGND
DIO
BULB
CCFL
VC
CCFL
PGND
LT1184/LT1184F: REFERENCE IS BROUGHT OUT TO PIN 1.
PINS 7, 8, 9, 10 ARE NO CONNECT.
1184 BD02
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APPLICATIONS INFORMATION
Introduction
Current generation portable computers and instruments
use backlit Liquid Crystal Displays (LCDs). These displays
also appear in applications extending to medical equipment, automobiles, gas pumps, and retail terminals. Cold
Cathode Fluorescent Lamps (CCFLs) provide the highest
available efficiency in backlighting the display. Providing
the most light out for the least amount of input power is the
most important goal. These lamps require high voltage AC
to operate, mandating an efficient high voltage DC/AC
14
converter. The lamps operate from DC, but migration
effects damage the lamp and shorten its lifetime. Lamp
drive should contain zero DC component. In addition to
good efficiency, the converter should deliver the lamp
drive in the form of a sine wave. This minimizes EMI and
RF emissions. Such emissions can interfere with other
devices and can also degrade overall operating efficiency.
Sinusoidal CCFL drive maximizes current-to-light conversion in the lamp. The circuit should also permit lamp
intensity control from zero to full brightness with no
hysteresis or “pop-on”.
LT1182/LT1183/LT1184/LT1184F
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APPLICATIONS INFORMATION
Manufacturers offer a wide array of monochrome and
color displays. LCD display types include passive matrix
and active matrix. These displays differ in operating voltage polarity (positive and negative contrast voltage displays), operating voltage range, contrast adjust range, and
power consumption. LCD contrast supplies must regulate, provide output adjustment over a significant range,
operate over a wide input voltage range, and provide load
currents from milliamps to tens of milliamps.
The small size and battery-powered operation associated
with LCD equipped apparatus dictate low component
count and high efficiency for these circuits. Size constraints place severe limitations on circuit architecture and
long battery life is a priority. Laptop and handheld portable
computers offer an excellent example. The CCFL and its
power supply are responsible for almost 50% of the
battery drain. Displays found in newer color machines can
have a contrast power supply battery drain as high as 20%.
Additionally, all components including PC board and hardware, usually must fit within the LCD enclosure with a
height restriction of 5mm to 10mm.
The CCFL switching regulator in the LT1182/LT1183/
LT1184/LT1184F typically drives an inductor that acts as
a switched mode current source for a current driven Royer
class converter with efficiencies as high as 90%. The
control loop forces the regulator to pulse-width modulate
the inductor’s average current to maintain constant current in the lamp. The constant current’s value, and thus
lamp intensity is programmable. This drive technique
provides a wide range of intensity control. A unique lamp
current programming block permits either groundedlamp or floating-lamp configurations. Grounded-lamp circuits directly control one-half of actual lamp current.
Floating-lamp circuits directly control the Royer’s primary
side converter current. Floating-lamp circuits provide
differential drive to the lamp and reduce the loss from stray
lamp-to-frame capacitance, extending illumination range.
The LCD contrast switching regulator in the LT1182/
LT1183 is typically configured as a flyback converter and
generates a bias supply for contrast control. Other topology choices for generating the bias supply include a boost
converter or a boost/charge pump converter. The supply’s
variable output permits adjustment of contrast for the
majority of available displays. Some newer types of displays require a fairly constant supply voltage and provide
contrast adjustment through a digital control pin. A unique,
dual polarity, error amplifier and the selection of a flyback
converter topology allow either positive or negative LCD
contrast voltages to be generated with minor circuit
changes. The difference between the LT1182 and LT1183
is found in the pinout for the inputs of the LCD contrast
error amplifier. The LT1182 brings out the error amplifier
inputs individually for setting up positive and negative
polarity contrast capability. This feature allows an output
connector to determine the choice of contrast operating
polarity by a ground connection. The LT1183 ties the error
amplifier inputs together and brings out an internal reference. The reference may be used in generating negative
contrast voltages or in programming lamp current.
Block Diagram Operation
The LT1182/LT1183/LT1184/LT1184F are fixed frequency,
current mode switching regulators. Fixed frequency, current mode switchers control switch duty cycle directly by
switch current rather than by output voltage. Referring to
the block diagram for the LT1182/LT1183, the switch for
each regulator turns ON at the start of each oscillator cycle.
The switches turn OFF when switch current reaches a
predetermined level. The operation of the CCFL regulator
in the LT1184/LT1184F is identical to that in the LT1182/
LT1183. The control of output lamp current is obtained by
using the output of a unique programming block to set
current trip level. The contrast voltage is controlled by the
output of a dual-input-stage error amplifier, which sets
current trip level. The current mode switching technique
has several advantages. First, it provides excellent rejection of input voltage variations. Second, it reduces the 90°
phase shift at mid-frequencies in the energy storage
inductor. This simplifies closed-loop frequency compensation under widely varying input voltage or output load
conditions. Finally, it allows simple pulse-by-pulse current limiting to provide maximum switch protection under
output overload or short-circuit conditions.
The LT1182/LT1183/LT1184/LT1184F incorporate a low
dropout internal regulator that provides a 2.4V supply for
most of the internal circuitry. This low dropout design
allows input voltage to vary from 3V to 30V with little
15
LT1182/LT1183/LT1184/LT1184F
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APPLICATIONS INFORMATION
change in quiescent current. An active low shutdown pin
typically reduces total supply current to 35µA by shutting
off the 2.4V regulator and locking out switching action for
standby operation. The ICs incorporate undervoltage lockout by sensing regulator dropout and locking out switching below about 2.5V. The regulators also provide thermal
shutdown protection that locks out switching in the presence of excessive junction temperatures.
A 200kHz oscillator is the basic clock for all internal timing.
The oscillator turns on an output via its own logic and
driver circuitry. Adaptive anti-sat circuitry detects the
onset of saturation in a power switch and adjusts base
drive current instantaneously to limit switch saturation.
This minimizes driver dissipation and provides rapid turnoff of the switch. The CCFL power switch is guaranteed to
provide a minimum of 1.25A in the LT1182/LT1183/
LT1184/LT1184F and the LCD power switch is guaranteed
to provide a minimum of 0.625A in the LT1182/LT1183.
The anti-sat circuitry provides a ratio of switch current to
driver current of about 50:1.
Simplified Lamp Current Programming
A programming block in the LT1182/LT1183/LT1184/
LT1184F controls lamp current, permitting either groundedlamp or floating-lamp configurations. Grounded configurations control lamp current by directly controlling onehalf of actual lamp current and converting it to a feedback
signal to close a control loop. Floating configurations
control lamp current by directly controlling the Royer’s
primary side converter current and generating a feedback
signal to close a control loop.
Previous backlighting solutions have used a traditional
error amplifier in the control loop to regulate lamp current.
This approach converted an RMS current into a DC voltage
for the input of the error amplifier. This approach used
several time constants in order to provide stable loop
frequency compensation. This compensation scheme
meant that the loop had to be fairly slow and that output
overshoot with startup or overload conditions had to be
carefully evaluated in terms of transformer stress and
breakdown voltage requirements.
The LT1182/LT1183/LT1184/LT1184F eliminate the error
amplifier concept entirely and replace it with a lamp
16
current programming block. This block provides an easyto-use interface to program lamp current. The programmer circuit also reduces the number of time constants in
the control loop by combining the error signal conversion
scheme and frequency compensation into a single capacitor. The control loop thus exhibits the response of a single
pole system, allows for faster loop transient response and
virtually eliminates overshoot under startup or overload
conditions.
Lamp current is programmed at the input of the programmer block, the ICCFL pin. This pin is the input of a shunt
regulator and accepts a DC input current signal of 0µA to
100µA. This input signal is converted to a 0µA to 500uA
source current at the CCFL VC pin. The programmer circuit
is simply a current-to-current converter with a gain of five.
By regulating the ICCFL pin, the input programming current
can be set with DAC, PWM or potentiometer control. The
typical input current programming range for 0mA to 6mA
lamp current is 0µA to 50µA.
The ICCFL pin is sensitive to capacitive loading and will
oscillate with capacitance greater than 10pF. For example,
loading the ICCFL pin with a 1× or 10× scope probe causes
oscillation and erratic CCFL regulator operation because
of the probe’s respective input capacitance. A current
meter in series with the ICCFL pin will also produce oscillation due to its shunt capacitance. Use a decoupling
resistor of several kilo-ohms between the ICCFL pin and the
control circuitry if excessive stray capacitance exists. This
is basically free with potentiometer or PWM control as
these control schemes use resistors. A current output
DAC should use an isolating resistor as the DAC can have
significant output capacitance that changes as a function
of input code.
Grounded-Lamp Configuration
In a grounded-lamp configuration, the low voltage side of
the lamp connects directly to the LT1182/LT1183/LT1184/
LT1184F DIO pin. This pin is the common connection
between the cathode and anode of two internal diodes. In
previous grounded-lamp solutions, these diodes were
discrete units and are now integrated onto the IC, saving
cost and board space. Bi-directional lamp current flows in
the DIO pin and thus, the diodes conduct alternately on half
LT1182/LT1183/LT1184/LT1184F
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APPLICATIONS INFORMATION
cycles. Lamp current is controlled by monitoring one-half
of the average lamp current. The diode conducting on
negative half cycles has one-tenth of its current diverted to
the CCFL pin and nulls against the source current provided
by the lamp current programmer circuit. The compensation capacitor on the CCFL VC pin provides stable loop
compensation and an averaging function to the rectified
sinusoidal lamp current. Therefore, input programming
current relates to one-half of average lamp current.
The transfer function between lamp current and input
programming current must be empirically determined and
is dependent on the particular lamp/display housing combination used. The lamp and display housing are a distributed loss structure due to parasitic lamp-to-frame capacitance. This means that the current flowing at the high
voltage side of the lamp is higher than what is flowing at
the DIO pin side of the lamp. The input programming
current is set to control lamp current at the high voltage
side of the lamp, even though the feedback signal is the
lamp current at the bottom of the lamp. This insures that
the lamp is not overdriven which can degrade the lamp’s
operating lifetime.
Floating-Lamp Configuration
In a floating-lamp configuration, the lamp is fully floating
with no galvanic connection to ground. This allows the
transformer to provide symmetric, differential drive to the
lamp. Balanced drive eliminates the field imbalance associated with parasitic lamp-to-frame capacitance and reduces “thermometering” (uneven lamp intensity along the
lamp length) at low lamp currents.
Carefully evaluate display designs in relation to the physical layout of the lamp, it leads and the construction of the
display housing. Parasitic capacitance from any high
voltage point to DC or AC ground creates paths for
unwanted current flow. This parasitic current flow degrades electrical efficiency and losses up to 25% have
been observed in practice. As an example, at a Royer
operating frequency of 60kHz, 1pF of stray capacitance
represents an impedance of 2.65MΩ. With an operating
lamp voltage of 400V and an operating lamp current of
6mA, the parasitic current is 150µA. The efficiency loss is
2.5%. Layout techniques that increase parasitic capaci-
tance include long high voltage lamp leads, reflective
metal foil around the lamp, and displays supplied in metal
enclosures. Losses for a good display are under 5%
whereas losses for a bad display range from 5% to 25%.
Lossy displays are the primary reason to use a floatinglamp configuration. Providing symmetric, differential drive
to the lamp reduces the total parasitic loss by one-half.
Maintaining closed-loop control of lamp current in a
floating lamp configuration now necessitates deriving a
feedback signal from the primary side of the Royer transformer. Previous solutions have used an external precision shunt and high side sense amplifier configuration.
This approach has been integrated onto the LT1182/
LT1183/LT1184F for simplicity of design and ease of use.
An internal 0.1W resistor monitors the Royer converter
current and connects between the input terminals of a
high-side sense amplifier. A 0A to 1A Royer primary side,
center tap current is translated to a 0µA to 500uA sink
current at the CCFL VC pin to null against the source
current provided by the lamp current programmer circuit.
The compensation capacitor on the CCFL VC pin provides
stable loop compensation and an averaging function to the
error sink current. Therefore, input programming current
is related to average Royer converter current. Floatinglamp circuits operate similarly to grounded-lamp circuits,
except for the derivation of the feedback signal.
The transfer function between primary side converter
current and input programming current must be empirically determined and is dependent upon a myriad of
factors including lamp characteristics, display construction, transformer turns ratio, and the tuning of the Royer
oscillator. Once again, lamp current will be slightly higher
at one end of the lamp and input programming current
should be set for this higher level to insure that the lamp
is not overdriven.
The internal 0.1Ω high-side sense resistor on the LT1182/
LT1183/LT1184F is rated for a maximum DC current of 1A.
However, this resistor can be damaged by extremely high
surge currents at start-up. The Royer converter typically
uses a few microfarads of bypass capacitance at the center
tap of the transformer. This capacitor charges up when the
system is first powered by the battery pack or an AC wall
adapter. The amount of current delivered at start-up can be
17
LT1182/LT1183/LT1184/LT1184F
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APPLICATIONS INFORMATION
very large if the total impedance in this path is small and
the voltage source has high current capability. Linear
Technology recommends the use of an aluminum electrolytic for the transformer center tap bypass capacitor with
an ESR greater than or equal to 0.5Ω. This lowers the peak
surge currents to an acceptable level. In general, the wire
and trace inductance in this path also help reduce the di/
dt of the surge current. This issue only exists with floating
lamp circuits as grounded-lamp circuits do not make use
of the high-side sense resistor.
Optimizing Optical Efficiency vs Electrical Efficiency
Evaluating the performance of an LCD backlight requires
the measurement of both electrical and photometric efficiencies. The best optical efficiency operating point does
not necessarily correspond to the best electrical efficiency. However, these two operating points are generally
close. The desired goal is to maximize the amount of light
out for the least amount of input power. It is possible to
construct backlight circuits that operate with over 90%
electrical efficiency, but produce significantly less light
output than circuits that operate at 80% electrical efficiency.
The best electrical efficiency typically occur’s just as the
CCFL’s transformer drive waveforms begin to exhibit
artifacts of higher order harmonics reflected back from the
Royer transformer secondary. Maximizing electrical efficiency equates to smaller values for the Royer primary
side, resonating capacitor and larger values for the Royer
secondary side ballast capacitor. The best optical efficiency occurs with nearly ideal sinusoidal drive to the
lamp. Maximizing optical efficiency equates to larger
values for the Royer primary side resonating capacitor and
smaller values for the Royer secondary side ballast capacitor. The preferred operating point for the CCFL converter
is somewhere in between the best electrical efficiency and
the best optical efficiency. This operating point maximizes
photometric output per watt of input power.
Making accurate and repeatable measurements of electrical and optical efficiency is difficult under the best circumstances. Requirements include high voltage measurements and equipment specified for this operation, special-
18
ized calibrated voltage and current probes, wideband RMS
voltmeters, a photometer, and a calorimeter (for the
backlight enthusiast). Linear Technology’s Application
Note 55 and Design Note 101 contain detailed information
regarding equipment needs.
Input Supply Voltage Operating Range
The backlight/LCD contrast control circuits must operate
over a wide range of input supply voltage and provide
excellent line regulation for the lamp current and the
contrast output voltage. This range includes the normal
range of the battery pack itself as well as the AC wall
adapter voltage, which is normally much higher than the
maximum battery voltage. A typical input supply is 7V to
28V; a 4 to 1 supply range.
Operation of the CCFL control circuitry from the AC wall
adapter generates the worst-case stress for the CCFL
transformer. Evaluations of loop compensation for overshoot on startup transients and overload conditions are
essential to avoid destructive arcing, overheating, and
transformer failure. Open-lamp conditions force the Royer
converter to operate open-loop. Component stress is
again worst-case with maximum input voltage conditions.
The LT1182/LT1183/LT1184/LT1184F open-lamp protection clamps the maximum transformer secondary voltage to safe levels and transfers the regulator loop from
current mode operation into voltage mode operation.
Other fault conditions include board shorts and component failures. These fault conditions can increase primary
side currents to very high levels, especially at maximum
input voltage conditions. Solutions to these fault conditions include electrical and thermal fuses in the supply
voltage trace.
Improvements in battery technology are increasing battery lifetimes and decreasing battery voltages required by
the portable systems. However, operation at reduced
battery voltages requires higher, turns-ratio transformers
for the CCFL to generate equivalent output drive capability.
The penalty incurred with high ratio transformers is higher,
circulating currents acting on the same primary side
components. Loss terms increase and electrical efficiency
often decreases.
LT1182/LT1183/LT1184/LT1184F
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Size Constraints
Applications Support
Tighter length, width, and height constraints for CCFL and
LCD contrast control circuitry are the result of LCD display
enclosure sizes remaining fairly constant while display
screen sizes have increased. Space requirements for
connector hardware include the input power supply and
control signal connector, the lamp connector, and the
contrast output voltage connector.
Linear Technology invests an enormous amount of time,
resources, and technical expertise in understanding, designing and evaluating backlight/LCD contrast solutions
for system designers. The design of an efficient and
compact LCD backlight system is a study of compromise
in a transduced electronic system. Every aspect of the
design is interrelated and any design change requires
complete re-evaluation for all other critical design parameters. Linear Technology has engineered one of the most
complete test and evaluation setups for backlight designs
and understands the issues and tradeoffs in achieving a
compact, effficient and economical customer solution.
Linear Technology welcomes the opportunity to discuss,
design, evaluate, and optimize any backlight/LCD contrast
system with a customer. For further information on backlight/LCD contrast designs, consult the references listed
below.
Even though size requirements are shrinking, the high
voltage AC required to drive the lamp has not decreased.
In some cases, the use of longer bulbs for color, portable
equipment has increased the high voltage requirement.
Accommodating the high voltage on the circuit board
dictates certain layout spacings and routings, involves
providing creepages and clearances in the transformer
design, and most importantly, involves routing a hole
underneath the CCFL transformer. Routing this hole minimizes high voltage leakage paths and prevents moisture
buildup that can result in destructive arcing. In addition to
high voltage layout techniques, use appropriate layout
techniques for isolating high current paths from lowcurrent signal paths.
This leaves the remaining space for control circuitry at a
premium. Minimum component count is required and
minimum size for the components used is required. This
squeeze on component size is often in direct conflict with
the goals of maximizing battery life and efficiency. Compromise is often the only remaining choice.
LCD Contrast Circuits
The LCD contrast switching regulator on the LT1182/
LT1183 operates in many standard switching configurations and is used as a classic DC/DC converter. The dualinput-stage error amplifier easily regulates either positive
or negative contrast voltages. Topology choices for the
converter include single inductor and transformer-based
solutions. The switching regulator operates equally well
either in continuous mode or discontinuous mode. Efficiencies for LCD contrast circuits range from 75% to 85%
and depend on the total power drain of the particular
display. Adjustment control of the LCD contrast voltage is
provided by either potentiometer, PWM, or DAC control.
References
1. Williams, Jim. August 1992. Illumination Circuitry for
Liquid Crystal Displays. Linear Technology Corporation,
Application Note 49.
2. Williams, Jim. August 1993. Techniques for 92% Efficient LCD Illumination. Linear Technology Corporation,
Application Note 55.
3. Bonte, Anthony. March 1995. LT1182 Floating CCFL
with Dual Polarity Contrast. Linear Technology Corporation, Design Note 99.
4. Williams, Jim. April 1995. A Precision Wideband Current Probe for LCD Backlight Meaasurement. Linear Technology Corporation, Design Note 101.
19
LT1182/LT1183/LT1184/LT1184F
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90% Efficient Grounded CCFL Configuration with Negative Polarity LCD Contrast
UP TO 6mA
LAMP
C1 MUST BE A LOW LOSS CAPACITOR,
C1 = WIMA MKP-20
Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001
10
L1 = COILTRONICS CTX210605
C2
27pF
3kV
6
L1
L2 = COILTRONICS CTX100-4
3
L3 = COILTRONICS CTX02-12403
2
+
*DO NOT SUBSTITUTE COMPONENTS
C5
1000pF
COILTRONICS (407) 241-7876
THE ICCFL CURRENT REQUIRED FOR AN
RMS BULB CURRENT IS:
ICCFL (9 × 10–3) (IBULB).
0% TO 90% DUTY CYCLE FOR THE PWM
SIGNAL CORRESPONDS TO 0 TO 6mA.
R2
220k
1
4
5
+
C3B
2.2µF
35V
Q2*
+
L2
100µH
V (PWM)
0V TO 5V
1kHz PWM
C6
2.2µF
+
1
R5,38.3k, 1%
2
3
C7, 1µF
4
5
SHUTDOWN
6
C8,0.68µF
7
R7, 10k
8
CCFL
PGND
CCFL VSW
ICCFL
BULB
DIO
BAT
LT1183
CCFL VC
ROYER
AGND
VIN
SHDN
REF
LCD VC
FB
LCD
PGND
LCD VSW
D3
1N5934A 4
24V
D1
1N5818
16
D2
1N914
L3
6
2
+
9
15
C11
22µF
35V
NEGCON
N = 1:2
14
13
+
12
C4
2.2µF
D4
1N914
VIN
≥ 3V
11
C10
0.1µF
R9, 4.99k, 1%
10
R11
40.2k
1%
9
V (CONTRAST)
0V TO 5V
R10, 10k, 1%
C9
0.01µF
20
C12
2.2µF
35V
Q1*
D5
BAT85
R4
38.3k
1%
VARYING THE V(CONTRAST)
VOLTAGE FROM 0V TO 5V GIVES
VARIABLE NEGATIVE CONTRAST
FROM –10V TO –30V
R1
750Ω
C1*
0.068µF
R3
100k
BAT
8V TO 28V
C3A
2.2µF
35V
D5
1N4148
1182 TA02
LT1182/LT1183/LT1184/LT1184F
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LT1184F Floating CCFL with Potentiometer Control of Lamp Current
UP TO 6mA
LAMP
ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN
ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1184F HIGH-SIDE
SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON.
10
C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20
C2
27pF
3kV
6
L1
Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001
L1 = COILTRONICS CTX210605
3
2
1
+
L2 = COILTRONICS CTX100-4
*DO NOT SUBSTITUTE COMPONENTS
C5
1000pF
COILTRONICS (407) 241-7876
4
5
+
C3B
2.2µF
35V
R2
220k
R3
100k
Q2*
BAT
8V TO 28V
R1
750Ω
C1*
0.068µF
0µA TO 45µA ICCFL CURRENT GIVES
0mA TO 6mA LAMP CURRENT FOR A
TYPICAL DISPLAY.
C3A
2.2µF
35V
Q1*
D5
BAT85
L2
100µH
1
2
3
C7, 1µF
4
5
SHUTDOWN
6
7
8
CCFL
PGND
ICCFL
DIO
CCFL VSW
BULB
BAT
D1
1N5818
16
15
14
LT1184F
13
CCFL VC
ROYER
AGND
VIN
SHDN
REF
NC
NC
NC
NC
12
+
11
10
9
R4
15.4k
1%
C4
2.2µF
VIN
≥ 3V
R5
50k
10 TURN
1182 TA03
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LT1182/LT1183 ICCFL PWM Programming
V (PWM)
0V TO 5V
1kHz PWM
0% to 90% DC =
0µA to 50µA
LT1183 ICCFL PWM Programming with VREF
R2
40.5k
R1
40.5k
FROM VREF
TO ICCFL PIN
+
C1
2.2µF
R1 AND R2 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
V (PWM)
0V TO 5V
1kHz PWM
0% to 90% DC =
0µA to 50µA
R1
330Ω
Q1
VN2222L
R2
7.15k
1182 TA04
+
LT1184/LT1184F ICCFL PWM Programming
V (PWM)
0V TO 5V
1kHz PWM
0% to 90% DC =
0µA to 50µA
R3
7.15k
TO ICCFL PIN
C1
22µF
R1 PREVENTS OSCILLATION.
R2 AND R3 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
R2
40.35k
R1
40.35k
1182 TA08
TO ICCFL PIN
+
C1
2.2µF
R1 AND R2 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
LT1184/LT1184F ICCFL PWM Programming with VREF
1182 TA05
LT1183 ICCFL Programming
with Potentiometer Control
R1
15.9k
FROM VREF
V (PWM)
0V TO 5V
1kHz PWM
0% to 90% DC =
0µA to 50µA
R1
330Ω
Q1
VN2222L
R2
6.98k
R2
50k
VREF
+
TO ICCFL PIN
R1 AND R2 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
ICCFL = 12µA TO 50µA.
R3
6.98k
TO ICCFL PIN
C1
22µF
1182 TA06
R1 PREVENTS OSCILLATION.
R2 AND R3 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
1182 TA09
LT1184/LT1184F ICCFL Programming
with Potentiometer Control
R1
15.5k
LT1183 ICCFL PWM Programming with VREF
R2
50k
FROM VREF
VREF
TO ICCFL PIN
R1 AND R2 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
ICCFL = 12µA TO 50µA.
R1
3.57k
1182 TA07
LT1182/LT1183/LT1184/LT1184F
ICCFL Programming with DAC Control
V (PWM)
0V TO 5V
1kHz PWM
10 to 100% DC =
50µA TO 0µA
R2
3.57k
R3
7.15k
TO ICCFL PIN
+
Q1
VN2222L
C1
22µF
R1, R2 AND R3 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
1182 TA10
R1
5k
DAC
TO ICCFL PIN
STRAY OUTPUT
CAPACITANCE
LT1184/LT1184F ICCFL PWM Programming with VREF
FROM VREF
CURRENT SOURCE
DAC
R1 DECOUPLES THE DAC OUTPUT CAPACITANCE
FROM THE ICCFL PIN.
R1
3.48k
1182 TA12
V (PWM)
0V TO 5V
1kHz PWM
10 to 100% DC =
50µA TO 0µA
R2
3.48k
R3
6.98k
TO ICCFL PIN
Q1
VN2222L
+
C1
22µF
R1, R2 AND R3 ARE IDEAL VALUES.
USE NEAREST 1% VALUE.
1182 TA11
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LT1182 LCD Contrast Positive Boost Converter
+
1
2
3
4
5
C8
0.068µF
6
R7
33K
7
8
CCFL
PGND
CCFL VSW
ICCFL
BULB
DIO
BAT
LT1182
CCFL VC
ROYER
AGND
VIN
SHDN
FBP
LCD VC
FBN
LCD
PGND
LCD VSW
BAT
8V TO 28V
C13
2.2µF
35V
L3
50µH
COILTRONICS CTX50-4
16
D5
1N914
15
+
14
13
+
12
C4
2.2µF
POSCON
VOUT ≥ VIN
C11
22µF
35V
R12
20k
VIN
≥ 3V
R13
8.45k
1%
11
R14
1.21k
1%
C10
0.01µF
10
9
1182 TA12
LT1182 LCD Contrast Positive Boost/Charge Pump Converter
+
2
3
4
5
C8
0.068µF
6
R7
33K
7
8
CCFL
PGND
ICCFL
DIO
CCFL VSW
BULB
BAT
AGND
VIN
SHDN
FBP
LCD VC
FBN
LCD
PGND
LCD VSW
C11
22µF
35V
16
15
14
LT1182
13
CCFL VC
ROYER
12
L3
50µH
COILTRONICS CTX50-4
+
1
C13
2.2µF
35V
BAT
8V TO 28V
+
C4
2.2µF
D5
1N914
D4
1N914
+
VIN
≥ 3V
R12
20k
R13
8.45k
1%
11
10
C11
22µF
35V
POSCON
VOUT ≥ VIN
C10
0.01µF
9
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
R14
1.21k
1%
1182 TA13
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LT1182 LCD Contrast Positive to Negative/Charge Pump Converter
3
4
5
6
C8
0.068µF
R7
33K
7
CCFL VSW
ICCFL
BULB
DIO
BAT
16
+
15
14
LT1182
13
CCFL VC
ROYER
AGND
VIN
SHDN
FBP
LCD VC
FBN
8 LCD
PGND
LCD VSW
C13
2.2µF
35V
+
12
C4
2.2µF
11
BAT
8V TO 28V
L3
CTX50-4
COILTRONICS CTX50-4
C11
22µF
35V
VIN
≥ 3V
D5
1N914
+
2
CCFL
PGND
C9
0.01µF
D4
1N914
+
1
10
NEGCON
|VOUT| ≥ VIN
C11
22µF
35V
9
R9
4.99k
1%
R10
10k
1%
R11
20k
1%
5V
1182 TA14
RELATED PARTS
PART NUMBER
FREQUENCY
SWITCH CURRENT
DESCRIPTION
LT1107
63kHz
Hysteretic
1A
LT1172
100kHz
1.25A
LT1173
24kHZ
Hysteretic
1A
LT1186
200kHz
1.25A
CCFL Switching Regulator with DAC for “Bits to
Brightness Control”
LT1372
500kHz
1.5A
Current Mode Switching Regulator for CCFL or LCD
Contrast Control
Micropower DC/DC Converter for LCD Contrast Control
Current Mode Switching Regulator for CCFL or LCD
Contrast Control
Micropower DC/DC Converter for LCD Contrast Control
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S Package
16-Lead Plastic SOIC
0.386 – 0.394*
(9.804 – 10.008)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
16
15
14
13
12
11
10
9
0° – 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
24
0.004 – 0.010
(0.101 – 0.254)
Linear Technology Corporation
0.050
(1.270)
TYP
0.150 – 0.157*
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
2
3
4
5
6
7
8
LT/GP 0495 10K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1995
工商网监
湘ICP备2023018690号
