LT3668
40V 400mA Step-Down
Switching Regulator with Dual
Fault Protected Tracking LDOs
DESCRIPTION
FEATURES
Dual Low Dropout Linear Tracking Regulators
nn 200mA Outputs with Programmable Current Limits
nn 1.6V to 45V Input Range
nn Fault Protected to ±45V
nn Triple Output Supply from a Single Input Requires
Only One Inductor
nn I = 50μA at 12V to 6V and 5V with No Load
Q
IN
nn Buck Regulator:
®
nn Low Ripple ( VOVLO (overvoltage lockout, 42V typical), allowing the output to fall out of regulation.
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During start-up, short-circuit, or other overload conditions
the inductor peak current might reach and even exceed the
maximum current limit of the LT3668, especially in those
cases where the switch already operates at minimum ontime. The catch diode current limit circuitry prevents the
switch from turning on again if the inductor valley current
is above 500mA nominal.
Inductor Selection and Maximum Output Current
For a given input and output voltage, the inductor value
and switching frequency will determine the ripple current,
which increases with higher VIN1 or VOUT1 and decreases
with higher inductance and higher switching frequency.
A good first choice for the inductor value is:
L = ( VOUT1 + VD ) •
2.4
fSW
where fSW is the switching frequency in MHz, VOUT1 is the
output voltage, VD is the catch diode drop (~0.5V) and L is
the inductor value in μH. The inductor’s RMS current rating
must be greater than the maximum load current and its
saturation current should be about 30% higher. For robust
operation in fault conditions (start-up or short-circuit) and
high input voltage (>30V), the saturation current should
be above 900mA. To keep the efficiency high, the series
resistance (DCR) should be less than 0.3Ω, and the core
material should be intended for high frequency applications. Table 2 lists several vendors.
Table 2. Inductor Vendors
VENDOR
URL
Coilcraft
www.coilcraft.com
Sumida
www.sumida.com
Toko
www.tokoam.com
Würth Elektronik
www.we-online.com
Coiltronics
www.cooperet.com
Murata
www.murata.com
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LT3668
APPLICATIONS INFORMATION
This simple design guide will not always result in the
optimum inductor selection for a given application. As a
general rule, lower output voltages and higher switching
frequency will require smaller inductor values. If the application requires less than 400mA load current, then a
lesser inductor value may be acceptable. This allows the
use of a physically smaller inductor, or one with a lower
DCR resulting in higher efficiency. However, the inductance
should in general not be smaller than 10µH.
Be aware that if the inductance differs from the simple
rule above, then the maximum load current will depend
on input voltage. In addition, low inductance may result
in discontinuous mode operation, which further reduces
maximum load current. For details of maximum output
current and discontinuous mode operation, see Linear
Technology’s Application Note 44. Finally, for duty cycles
greater than 50% (VOUT1/VIN1 > 0.5), a minimum inductance
is required to avoid sub-harmonic oscillations:
LMIN = ( VOUT1 + VD ) •
2
fSW
where fSW is the switching frequency in MHz, VOUT1 is
the output voltage, VD is the catch diode drop (~0.5V)
and LMIN is the inductor value in µH.
Catch Diode
The catch diode (D1 from block diagram) conducts current
only during switch off-time. Use a 1A Schottky diode for
best performance.
Peak reverse voltage is equal to VIN1 if it is below the
overvoltage protection threshold. This feature keeps the
switch off for VIN1 > OVLO (44V maximum). For inputs up
to the maximum operating voltage of 40V, use a diode with
a reverse voltage rating greater than the input voltage. If
transients at the input of up to 60V are expected, use a diode
with a reverse voltage rating only higher than the maximum
OVLO of 44V. If operating at high ambient temperatures,
consider using a Schottky with low reverse leakage. For
example, Diodes Inc. SBR1U40LP or DFLS160, ON Semi
MBRM140, and Central Semiconductor CMMSH1-60 are
good choices for the catch diode.
Input Capacitor
Bypass the input of the LT3668 circuit with a ceramic
capacitor of X7R or X5R type. Y5V types have poor
performance over temperature and applied voltage, and
should not be used. A 1μF to 4.7μF ceramic capacitor is
adequate to bypass the LT3668 and will easily handle
the ripple current. Note that a larger input capacitance
is required when a lower switching frequency is used
(due to longer on-times). If the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a low performance
electrolytic capacitor. Step-down regulators draw current
from the input supply in pulses with very fast rise and
fall times. The input capacitor is required to reduce the
resulting voltage ripple at the LT3668 and to force this
very high frequency switching current into a tight local
loop, minimizing EMI. A 1μF capacitor is capable of this
task, but only if it is placed close to the LT3668 (see the
PCB Layout section). A second precaution regarding the
ceramic input capacitor concerns the maximum input
voltage rating of the LT3668. A ceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the LT3668 circuit
is plugged into a live supply, the input voltage can ring to
twice its nominal value, possibly exceeding the LT3668’s
voltage rating. This situation is easily avoided (see the Hot
Plugging Safely section).
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated
by the LT3668 to produce the DC output. In this role it
determines the output ripple, and low impedance at the
switching frequency is important. The second function
is to store energy in order to satisfy transient loads and
stabilize the switching regulator’s control loop. Ceramic
capacitors have very low equivalent series resistance
(ESR) and provide the best ripple performance. A good
starting value is:
COUT1 =
50
VOUT1 • fSW
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LT3668
APPLICATIONS INFORMATION
where fSW is in MHz, and COUT1 is the recommended output
capacitance in μF. Use X5R or X7R types. This choice will
provide low output ripple and good transient response.
Transient performance can be improved with a higher value
capacitor if combined with a phase lead capacitor (typically
22pF) between the output and pin FB1. Note that a larger
phase lead capacitor should be used with a large output
capacitor. A lower value of output capacitor can be used to
save space and cost but transient performance will suffer.
When choosing a capacitor, look carefully through the
data sheet to find out what the actual capacitance is under
operating conditions (applied voltage and temperature).
A physically larger capacitor, or one with a higher voltage
rating, may be required. Table 3 lists several capacitor
vendors.
Table 3: Capacitor Vendors
VENDOR
URL
Panasonic
www.panasonic.com
Kemet
www.kemet.com
Sanyo
www.sanyovideo.com
Murata
www.murata.com
AVX
www.avxcorp.com
Taiyo Yuden
www.taiyo-yuden.com
Low Ripple Burst Mode Operation
To enhance efficiency at light loads, the LT3668 operates in low ripple Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst Mode
operation, the LT3668 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the
output capacitor. Because the LT3668 delivers power
to the output with single, low current pulses, the output
ripple is kept below 5mV for a typical application. As the
load current decreases towards a no load condition, the
percentage of time that the LT3668 operates in sleep mode
increases and the average input current is greatly reduced
resulting in high efficiency even at very low loads. Note
that during Burst Mode operation, the switching frequency
will be lower than the programmed switching frequency.
At higher output loads (above ~50mA for the front page
application) the LT3668 will be running at the frequency
programmed by the RT resistor, and will be operating in
standard PWM mode. The transition between PWM and
low ripple Burst Mode operation is seamless, and will not
disturb the output voltage.
Audible Noise
Ceramic capacitors are small, robust and have very
low ESR. However, ceramic capacitors can sometimes
cause problems when used with the LT3668 due to their
piezoelectric nature. When in Burst Mode operation, the
LT3668’s switching frequency depends on the load current,
and at very light loads the LT3668 can excite the ceramic
capacitor at audio frequencies, generating audible noise.
Since the LT3668 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet. If
this is unacceptable, use a high performance tantalum or
electrolytic capacitor at the output.
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VSW
5V/DIV
IL
100mA/DIV
VOUT1
5mV/DIV
ILOAD = 10mA
1µs/DIV
FRONT PAGE APPLICATION, VOUT1 = 5V
3668 F01
Figure 1. Burst Mode Operation
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APPLICATIONS INFORMATION
Capacitor C2 and the internal boost Schottky diode (see the
Block Diagram) are used to generate a boost voltage that
is higher than the input voltage. In most cases a 0.22μF
capacitor will work well. Figure 2 shows two ways to arrange the boost circuit. The BOOST pin must be more than
1.9V above the SW pin for best efficiency. For outputs of
2.2V and above, the standard circuit (Figure 2a) is best.
For outputs between 2.2V and 2.5V, use a 0.47μF boost
capacitor. For output voltages below 2.2V, the boost diode
can be tied to the input (Figure 2b), or to another external
supply greater than 2.2V. However, the circuit in Figure
2a is more efficient because the BOOST pin current and
IN3/BD pin quiescent current come from a lower voltage
source. Also, be sure that the maximum voltage ratings
of the BOOST and IN3/BD pins are not exceeded.
The minimum operating voltage of an LT3668 application is limited by the minimum input voltage (4.3V) and
by the maximum duty cycle as outlined in a previous
section. For proper start-up, the minimum input voltage
is also limited by the boost circuit. If the input voltage
is ramped slowly, the boost capacitor may not be fully
charged. Because the boost capacitor is charged with the
energy stored in the inductor, the circuit relies on some
minimum load current to get the boost circuit running
properly. This minimum load depends on input and output
voltages, and on the arrangement of the boost circuit. The
minimum load generally goes to zero once the circuit has
started. Figure 3 shows a plot of minimum load to start
and to run as a function of input voltage. In many cases
the discharged output capacitor will present a load to the
switcher, which will allow it to start. The plots show the
worst-case situation where VIN1 is ramping very slowly.
For lower start-up voltage, the boost diode can be tied to
VIN1; however, this restricts the input range to one-half of
the absolute maximum rating of the BOOST pin.
5.0
INPUT VOLTAGE VIN1 (V)
BOOST and IN3/BD Pin Considerations
VOUT1
VIN1
IN1
TO RUN
3.5
3.0
0
50
C2
SW
DA
INPUT VOLTAGE VIN1 (V)
GND
(2a) For VOUT1 ≥ 2.2V
IN3/BD
BOOST
TO START
7.0
6.5
TO RUN
6.0
5.5
FRONT PAGE APPLICATION
VEN = VIN1, VOUT1 = 6V
C2
LT3668
SW
D1
GND
100 150 200 250 300 350 400
LOAD CURRENT IOUT1 (mA)
3668 F03a
7.5
D1
IN1
TO START
4.0
BOOST
LT3668
VIN1
4.5
3.5
IN3/BD
FRONT PAGE APPLICATION
VEN = VIN1, VOUT1 = 3.3V
VOUT1
5.0
0
50
100 150 200
250 300 350 400
LOAD CURRENT IOUT1 (mA)
DA
3668 F02
(2b) For VOUT1 < 2.2V; VIN1 < 25V
3668 F03b
Figure 3. The Minimum Input Voltage Depends on
Output Voltage, Load Current and Boost Circuit
Figure 2. Two Circuits for Generating the Boost Voltage
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LT3668
APPLICATIONS INFORMATION
Shorted and Reversed Input Protection
LDOs
If the inductor is chosen so that it won’t saturate excessively, the switching regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT3668 is absent. This may occur in battery charging
applications or in battery backup systems where a battery
or some other supply is diode ORed with the switching
regulator’s output. If the IN1 pin is allowed to float and
the EN pin is held high (either by a logic signal or because
it is tied to IN1), then the LT3668’s internal circuitry will
pull its quiescent current through the SW pin. This is fine
if the system can tolerate a few μA in this state. If the EN
pin is grounded, the SW pin current will drop to 0.7μA.
However, if the IN1 pin is grounded while the output is
held high, regardless of EN, parasitic diodes inside the
LT3668 can pull current from the output through the SW
pin and the IN1 pin. Figure 4 shows a circuit that will run
only when the input voltage is present and that protects
against a shorted or reversed input.
Adjustment Inputs
D1
MBRS140
VIN
IN1
EN
Each LDO output voltage of the LT3668 follows the voltage
at the corresponding adjustment pin ADJ2/ADJ3. Each
adjustment pin is pulled down by an internal current source
(typically 200nA at 25°C). This current must be taken into
consideration if an adjustment pin is to be driven by a high
impedance resistive divider.
Even if the voltage at ADJ2/ADJ3 is below the minimum input
voltage, the corresponding output will always be regulated
to a voltage equal or below the voltage at ADJ2/ADJ3.
Any noise present at an adjustment pin is transferred to the
corresponding output, in particular low frequency noise.
See the LDO transfer function in the Typical Performance
Characteristics section. Reference voltage noise can be
reduced by connecting a capacitor from ADJ2/ADJ3 to
ground. However, if the reference voltage is derived from
the resistive divider of the switching regulator as shown
in the application on page 1, no such bypass capacitor
is allowed as it would impair the switching regulator's
stability.
IN3/BD
BOOST
LT3668
VOUT
SW
GND
DA
FB1
+
BACKUP
3668 F04
Figure 4. Diode D1 Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output. It Also Protects the Circuit
from a Reversed Input, in Which Case the Resistor at the EN Pin
Limits the Current Drawn from That Pin. The LT3668 Runs Only
When the Input Is Present
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Input Capacitance and Stability
Each LDO is stable with an input capacitor typically between
1μF and 10μF. This input capacitor must be placed as close
as possible to the corresponding input pin. Applications
operating with smaller input to output differential voltages
and that experience large load transients may require a
higher input capacitor value to prevent input voltage droop
and letting the regulator enter dropout.
Very low ESR ceramic capacitors may be used. However,
in cases where long wires connect the power supply to
the LDOs input and ground, use of low value input capacitors may result in instability. The resonant LC tank circuit
formed by the wire inductance and the input capacitor is
the cause and not a result of LDO instability.
The minimum input capacitance needed to stabilize the
application also varies with power supply output impedance variations. Placing additional capacitance on an LDO’s
output also helps. However, this requires an order of
magnitude more capacitance in comparison with additional
input bypassing. Series resistance between the supply and
an LDO’s input also helps stabilize the application; as little
as 0.1Ω to 0.5Ω suffices. This impedance dampens the
LC tank circuit at the expense of dropout voltage. A better
alternative is to use higher ESR tantalum or electrolytic
capacitors at the input in place of ceramic capacitors.
Output Capacitance, Transient Response, Stability
Each LT3668’s LDO is stable with a wide range of output
capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Use a minimum
output capacitor of 10μF to prevent oscillations. The ESR
of the output capacitor must not exceed 3Ω.
The LT3668 is a micropower device and output load
transient response is a function of output capacitance.
Larger values of output capacitance decrease the peak
deviations and provide improved transient response for
larger load current changes, especially for low output
voltages. Bypass capacitors, used to decouple individual
components powered by the LT3668, increase the effective output capacitor value. For applications with large
load current transients, a low ESR ceramic capacitor in
parallel with a bulk tantalum capacitor often provides an
optimally damped response.
Note that some ceramic capacitors have a piezoelectric
response. A piezoelectric device generates voltage across
its terminals due to mechanical stress, similar to the way
a piezoelectric accelerometer or microphone works. For
a ceramic capacitor, the stress is induced by vibrations in
the system or thermal transients. The resulting voltages
produced cause appreciable amounts of noise. A ceramic
capacitor produced the trace in Figure 5 in response to light
tapping from a pencil. Similar vibration induced behavior
can masquerade as increased output voltage noise.
VOUT2 = 5V
COUT2 = 10µF
VOUT2
1mV/DIV
2ms/DIV
3668 F05
Figure 5. Noise Resulting from Tapping On a Ceramic Capacitor
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LT3668
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External Programmable Current Limit, Enable
Each EN/ILIM pin (EN2/ILIM2 and EN3/ILIM3) is the collector of a PNP which mirrors the corresponding LDO’s
output at a ratio of 1:799 (see Block Diagram). The EN2/
ILIM2 and EN3/ILIM3 pins are also the inputs to precision current limit amplifiers. If an output load increases
to the point where it causes the corresponding current
limit amplifier input voltage to reach 0.4V, the current
limit amplifier takes control of output regulation so that
its input clamps at 0.4V, regardless of the output voltage.
The current limit threshold (ILIMIT) of an LDO is set by
attaching a resistor (RIMAX) from the corresponding EN/
ILIM pin to ground:
RIMAX =
799 • 0.4V
– 80Ω
ILIM
In order to maintain stability, each EN/ILIM pin requires
a 47nF capacitor from that pin to ground.
In cases where the input to output voltage differential
exceeds 10V, foldback current limit will lower the internal current level limit, possibly causing it to preempt the
external programmable current limit. See the Internal
Current Limit vs Input/Output Differential graph in the
Typical Performance Characteristics section.
If an external current limit is not needed, the corresponding EN/ILIM pin must be connected to ground, in which
case no capacitor is required.
Each LDO can be individually shut down by pulling its EN/
ILIM pin above 1.2V (1V typical). Note that in this case this
pin will draw up to 500µA in certain operating conditions
until the LDO is shut down, which the circuit driving this
pin must be able to deliver. When an EN/ILIM pin is only
used to enable/disable an LDO, no capacitor is required
on this pin.
Overload Recovery
Each LDO of the LT3668 has a safe operating area protection, which decreases current limit as input-to-output
voltage increases, and keeps the power transistor inside
a safe operating region for all values of input-to-output
voltage. Each LDO provides some output current at all
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values of input-to-output voltage up to the device breakdown. When power is first applied to an LDO, the input
voltage rises and the output follows the input; allowing the
regulator to start-up into very heavy loads. During start-up,
as the input voltage is rising, the input-to-output voltage
differential is small, allowing the regulator to supply large
output currents. With a high input voltage, a problem can
occur wherein the removal of an output short will not allow
the output to recover. The problem occurs with a heavy
output load when the input voltage is high and the output
voltage is low. Common situations are: immediately after
the removal of a short-circuit or if an LDO is enabled via
its EN/ILIM pin after the input voltage is already turned
on. In such cases, the regulator would have to operate its
power device outside its safe operating are (high voltage
and high current) in order to bring up the output voltage.
Since this is prevented by the safe operating area protection, the output gets stuck at a low voltage. Essentially,
the load line for such a load intersects the output current
curve at two points, resulting in two stable output operating
points for the regulator. With this double intersection, the
input power supply needs to be cycled down to zero and
brought up again to make the output recover.
Protection Features
The LT3668 LDO’s protect against reverse-input voltages,
reverse-output voltages and reverse output-to-input voltages. Current limit protection and thermal overload protection protect the LDOs against current overload conditions
at their outputs. For normal operation, do not exceed the
maximum operating junction temperature. The LT3668 IN2
pin withstands reverse voltages of 45V. The device limits
current flow to less than 300μA (typically less than 10μA)
and no negative voltages appear at OUT2. The LDOs incur
no damage if their outputs are pulled below ground. If an
input is left open circuit or grounded, the corresponding
output can be pulled below ground by 45V. No current
flows through the pass transistor from the output. If the
input is powered by a voltage source, the output sources
current equal to its current limit capability and the LT3668
protects itself by thermal limiting. Note that the externally
programmable current limit is less accurate if the output
is pulled below ground.
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COMMON
Ceramic Capacitor Characteristics
Give extra consideration to the use of ceramic capacitors.
Manufacturers make ceramic capacitors with a variety of
dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics
are specified with EIA temperature characteristic codes
of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics
provide high C-V products in a small package at low cost,
but exhibit strong voltage and temperature coefficients, as
can be seen for Y5V in Figures 6 and 7. When used with
a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an
effective value as low as 1μF to 2μF for the DC bias voltage
applied, and over the operating temperature range. The
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BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
CHANGE IN VALUE (%)
X5R and X7R dielectrics yield much more stable characteristics and are more suitable for use as input and output
capacitors. The X7R type works over a wider temperature
range and has better temperature stability, while the X5R
is less expensive and is available in higher values. Still
exercise care when using X5R and X7R capacitors; the
X5R and X7R codes only specify operating temperature
range and maximum capacitance change over temperature.
Capacitance change due to DC bias with X5R and X7R
capacitors is better than Y5V and Z5U capacitors, but can
still be significant enough to drop capacitor values below
appropriate levels. Capacitor DC bias characteristics tend
to improve as component case size increases, but expected
capacitance at operating voltage should be verified.
X5R
–20
–40
–60
Y5V
–80
–100
0
2
4
14
8
6
10 12
DC BIAS VOLTAGE (V)
16
3668 F06
Figure 6. Ceramic Capacitor DC Bias Characteristics
40
CHANGE IN VALUE (%)
20
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
50
25
75
–50 –25
0
TEMPERATURE (°C)
100
125
3668 F07
Figure 7. Ceramic Capacitor Temperature Characteristics
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LT3668
APPLICATIONS INFORMATION
PCB Layout
Hot Plugging Safely
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 8 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT3668’s IN1, SW, GND and DA pins,
the catch diode and the input capacitor. The loop formed by
these components should be as small as possible. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components.
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitors of LT3668 circuits. However, these capacitors can cause problems if the LT3668 is plugged into
a live supply. The low loss ceramic capacitor, combined
with stray inductance in series with the power source,
forms an under damped tank circuit, and the voltage at the
input pins of the LT3668 can ring to twice their nominal
input voltage, possibly exceeding the LT3668’s rating and
damaging the part. If the input supply is poorly controlled
or the user will be plugging the LT3668 into an energized
supply, the input network should be designed to prevent
this overshoot. See Linear Technology Application Note 88
for a complete discussion.
The SW and BOOST nodes should be as small as possible.
Keep the FB1 node small so that the ground traces will
shield it from the SW and BOOST nodes. The exposed pad
must be soldered such that it can act as a heat sink. (See
High Temperature Considerations section.)
High Temperature Considerations
The LT3668’s maximum rated junction temperature of
125°C (E- and I-grade) and 150oC (H-grade), respectively,
limits its power handling capability.
OUT1
GND
SW
IN1
Power dissipation within the switching regulator can be
estimated by calculating the total power loss from an
efficiency measurement and subtracting inductor loss.
Be aware that at high ambient temperatures the external
Schottky diode will have significant leakage current (see
Typical Performance Characteristics), increasing the quiescent current of the switching regulator.
The power dissipation of each LDO is comprised of two
components. Each power device dissipates:
1
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2
15
3
14
4
13
5
12
6
11
7
10
8
9
PPASS = (VIN − VOUT) • IOUT
where PPASS is the power, VIN the input voltage, VOUT
the output voltage, and IOUT the output current. The base
currents of the LDO power PNP transistors flow to ground
internally and are the major component of the ground
current. For each LDO, this causes a power dissipation
PGND of:
PGND = VIN • IGND
VIAS TO LOCAL GROUND PLANE
Figure 8. Good PCB Layout Ensures Proper,
Low EMI Operation
22
where VIN is the input voltage and IGND the ground current
generated by the corresponding power device. GND pin
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current is determined by the current gain of the power
PNP, which has a typical value of 40 for the purpose of
this calculation:
IGND =
IOUT
40
(For the sake of simplicity and as a conservative estimate
assume that all of this power is dissipated in the LT3668.)
The power dissipations of the LDO power devices are:
PPASS2 = (5V − 2.5V) • 100mA = 250mW
PPASS3 = (5V − 3.3V) • 100mA = 170mW
The total power dissipation equals the sum of the power
loss in the switching regulator and the two LDO components listed above.
For 100mA load current a maximum ground current of
2.5mA is to be expected. Thus, the corresponding power
dissipations are:
The LT3668 has internal thermal limiting that protects
the device during overload conditions. If the junction
temperature reaches the thermal shutdown threshold, the
LT3668 will shut down the LDOs and stop switching to
prevent internal damage due to overheating. For continuous
normal conditions, do not exceed the maximum operating junction temperature. Carefully consider all sources
of thermal resistance from junction-to-ambient including
other nearby heat sources. The LT3668 package has an
exposed pad that must be soldered to a ground plane to
act as heat sink. To keep thermal resistance low, extend the
ground plane as much as possible, and add thermal vias
under and near the LT3668 to additional ground planes
within the circuit board and on the bottom side.
PGND2 = PGND3 = 5V • 2.5mA = 12.5mW
The die temperature rise is calculated by multiplying the
power dissipation of the LT3668 by the thermal resistance
from junction to ambient. Example: Given the front page
application with maximum output current, an input voltage
of 12V and a maximum ambient temperature of 85°C, what
will the maximum junction temperature be?
As can be seen from the Typical Performance Characteristics, the switching regulator efficiency approaches 85% at
400mA output current. This leads to a power loss, PLOSS, of:
Finally, the total power dissipation is:
PTOT = PLOSS + PPASS2 + PPASS3 + PGND2 + PGND3
= 786mW
Since the MSOP package has a thermal resistance of approximately 40°C/W, this total power dissipation would
raise the junction temperature above ambient by:
0.786W • 40°C/W = 32°C
With the assumed maximum ambient temperature of 85°C,
this puts the maximum junction temperature at:
TJMAX = 85°C + 32°C = 117°C
Other Linear Technology Publications
Application Notes 19, 35 and 44 contain more detailed
descriptions and design information for buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensation and stability testing. Design Note 318
shows how to generate a bipolar output supply using a
buck regulator.
1
PLOSS = 5V • 400mA •
– 1 = 353mW
0.85
3668fa
For more information www.linear.com/LT3668
23
LT3668
TYPICAL APPLICATIONS
6V, 5V and 5V (Follower) Step-Down Converter
VIN
7V TO 40V
TRANSIENT
TO 60V
C1
4.7µF
ON OFF
f = 600kHz
5V
150mA
(FOLLOWS
OUT3)
RT
174k
C4
10µF
IN1
EN
PG
RT
BOOST
SW
LT3668
DA
IN3/BD
IN2
FB1
ADJ3
OUT3
ADJ2
OUT2
EN2/ILIM2 GND EN3/ILIM3
C2
L1
0.22µF
27µH
D1
DFLS160
C3
22µF
R1
232k
6V
100mA
R2
931k
C6
22pF
R3
294k
5V
150mA
C5
10µF
3668 TA02
C1-C5: X5R OR X7R
L1: SUMIDA CDRH5D28R/HP
Using Digital Output of a Microcontroller as Reference Voltage
VIN
7.5V TO 16V
TRANSIENT
TO 60V
C1
4.7µF
ON OFF
f = 2MHz
3.3V
25mA
OFF-BOARD
SUPPLY,
FOR EXAMPLE:
SENSORS
RT
37.4k
C4
10µF
IN1
EN
PG
RT
BOOST
SW
LT3668
C7
47nF
L1
10µH
4.05V
R1
178k
D1
DFLS160
OUT3
GND EN3/ILIM3
C3
10µF
R2
511k
C6
22pF
ADJ3
ADJ2
OUT2
EN2/ILIM2
DA
IN3/BD
IN2
FB1
C2
0.1µF
R3
294k
3.3V, 200mA
C5
10µF
R4
12.7k
VDD
µC
C1-C5: X5R OR X7R
L1: SUMIDA CDRH4D22/HP
24
I/O
3668 TA03
3668fa
For more information www.linear.com/LT3668
LT3668
TYPICAL APPLICATIONS
Three Matching 5V Supplies
C6
1µF
VIN
6V TO 25V*
C7
1µF
IN1 IN2
IN3/BD BOOST
SW
C1
2.2µF
EN
DA
LT3668
f = 600kHz
RT
174k
C2
0.22µF
D1
DFLS160
C8
22pF
ADJ2
C4
10µF
EN2/ILIM2
GND
EN3/ILIM3
R3
3.09k
C9
47nF
R4
3.09k
R2
294k
5V
100mA*
C5
10µF
OUT3
OUT2
5V
C3 400mA
22µF
R1
931k
FB1
RT
ADJ3
5V
100mA*
L1
22µH
C10
47nF
3668 TA04
C1-C5: X5R OR X7R
L1: SUMIDA CDRH4D22/HP
* 100mA CURRENT LIMIT. DERATE OUTPUT CURRENT AT HIGHER AMBIENT TEMPERATURES AND INPUT VOLTAGES
TO MAINTAIN JUNCTION TEMPERATURE BELOW THE ABSOLUTE MAXIMUM
Programming LDO Current Limits with a Digital/Analog Converter
VDAC
DAC OUTPUT
0V TO 0.8V
3.01k
LT3668
LT3668
EN2/ILIM2
EN2/ILIM2
3.01k
47nF
CURRENT LIMIT = 799
0.8V – VDAC
3.01kΩ + 160Ω
IDAC
DAC OUTPUT
0µA TO 267µA
1.5k
CURRENT LIMIT = 799
47nF
0.4V – IDAC • 1.5kΩ
1.5kΩ + 80Ω
3668 TA05
3668fa
For more information www.linear.com/LT3668
25
LT3668
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
1234567 8
0.17 – 0.27
(.007 – .011)
TYP
0.50
NOTE:
(.0197)
1. DIMENSIONS IN MILLIMETER/(INCH)
BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
26
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
3668fa
For more information www.linear.com/LT3668
LT3668
REVISION HISTORY
REV
DATE
DESCRIPTION
A
02/15
Clarified Typical Application Schematic
PAGE NUMBER
1
Added H-Grade Option
2
Clarified Tracking Error Specification to Include H-Grade Option
3
Clarified Dropout Specification and ADJ2/3 Bias Current
4
Clarified Note 4 to Include H-Grade Option
4
Clarified High Temperature Considerations to Include H-Grade Option
22
3668fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
its circuits
as described
herein will not infringe on existing patent rights.
Forofmore
information
www.linear.com/LT3668
27
LT3668
TYPICAL APPLICATION
5V/0.75A Supply with Two 0.2A Tracking Outputs
VIN
7V TO 40V
C1
4.7µF
ON OFF
RT1
174k
f = 600kHz
C4
10µF
IN1
BOOST
SW
EN
PG
RT
DA
FB1
LT3668
C2
0.22µF
L1
27µH
C6
22pF
D1
DFLS160
R2
1.18M
R3
294k
IN3/BD
IN2
ADJ3
ADJ2
OUT3
OUT2
EN2/ILIM2 GND EN3/ILIM3
C3
22µF
5V
200mA
(FAULT PROTECTED)
C5
10µF
5V
200mA
(FAULT PROTECTED)
C7
4.7µF
BOOST
VIN
5V
750mA
BD
EN/UVLO
RT2
215k
f=600kHz
L2
15µH
SW
LT3973-5
ON OFF
C8
0.47µF
PG
OUT
RT
VOUT
C9
22µF
GND
C1 - C9: X5R OR X7R
L1: SUMIDA CDRH5D28R/HP
3668 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3667
40V, 400mA Step-Down Switching Regulator with Dual Fault
Protected LDOs
VIN: 4.3V to 40V, VOUT(MIN) = 0.8V, IQ = 50mA, ISD < 1µA,
MSOP-16E, 3mm × 5mm QFN-24,
LT3500
36V (40VMAX), 2A (IOUT), 2.2MHz Step-Down Switching Regulator VIN: 3V to 36V, VOUT(MIN) = 0.8V, IQ = 2.5mA, ISD < 12µA,
with LDO Controller
3mm × 3mm DFN-10, MSOP-16E
LT1939
25V, 2A (IOUT), 2.2MHz Step-Down Switching Regulator with LDO VIN: 3V to 25V, VOUT(MIN) = 0.8V, IQ = 2.5mA, ISD < 12µA,
Controller
3mm × 3mm DFN-10, MSOP-16E
LT3694
36V (70VMAX), 2.6A (IOUT), 2.5MHz Step-Down Switching
Regulator with Dual LDO Controller
VIN: 4V to 36V, VOUT(MIN) = 0.8V, IQ = 1mA, ISD < 1µA,
4mm × 5mm QFN-28, TSSOP-20E
LT3507/LT3507A
36V, 2.5MHz, Triple (2.4A + 1.5A + 1.5A (IOUT) with LDO
Controller High Efficiency Step-Down DC/DC Converter
VIN: 4V to 36V, VOUT(MIN) = 0.8V, IQ = 7mA, ISD = 1µA,
5mm × 7mm QFN-38
LT3970
40V, 350mA (IOUT), 2.2MHz Step-Down Switching Regulator with VIN: 4.2V to 40V, VOUT(MIN) = 1.2V, IQ = 2.5µA, ISD < 1µA,
IQ = 2.5µA
3mm × 2mm DFN, MSOP-10
LT3502/LT3502A
40V, 500mA (IOUT), 1.1MHz/2.2MHz Step-Down Switching
Regulator
28
VIN: 3V to 40V, VOUT(MIN) = 0.8V, IQ = 1.5mA, ISD < 1µA,
2mm × 2mm DFN-8, MSOP-10E
3668fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT3668
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT3668
LT 0215 REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2014