LTC2875
±60V Fault Protected
3.3V or 5V 25kV ESD
High Speed CAN FD Transceiver
DESCRIPTION
FEATURES
Protected from Overvoltage Line Faults to ±60V
3.3V or 5V Supply Voltage
High Speed CAN FD Operation Up to 4Mbps
±25kV ESD Interface Pins, ±8kV All Other Pins
Variable Slew Rate Driver with Active Symmetry
Control and SPLIT Pin for Low Electromagnetic
Emission (EME)
n Extended Common Mode Range (±36V)
n Ideal Passive Behavior to CAN Bus with Supply Off
n Current Limited Drivers and Thermal Shutdown
n Power-Up/Down Glitch-Free Driver Outputs
n Micropower Shutdown Mode
n Transmit Data (TXD) Dominant Timeout Function
n ISO 11898-2 and CAN FD Compliant
n DeviceNet Compatible
n Up to MP-Grade Available (–55°C to 125°C)
n 3mm × 3mm 8-Lead DFN and SO-8 Packages
n
n
n
n
The LTC®2875 is a robust high speed, low power CAN
transceiver operating on 3.3V or 5V supplies that features
±60V overvoltage fault protection on the data transmission lines during all modes of operation, including powerdown. The maximum data rate has been extended to
4Mbps to support high speed protocols based on the CAN
physical layer. Supports up to 4Mbps CAN with Flexible
Data Rate (CAN FD). Enhanced ESD protection allows
these parts to withstand ±25kV HBM on the transceiver
interface pins without latchup or damage.
n
Extended ±36V input common mode range and high
common mode rejection on the CAN receiver provides
tolerance of large ground loop voltages. A sophisticated
CAN driver with active symmetry control maintains tight
control of the common mode voltage for excellent electromagnetic emission, while the variable slew rate and
split termination support allow additional EME reduction.
All registered trademarks and trademarks are the property of their respective owners.
APPLICATIONS
n
n
n
n
Industrial Control and Instrumentation Networks
Automotive and Transportation Electronics
Building Automation, Security Systems, HVAC
Medical Equipment
TYPICAL APPLICATION
LTC2875 Transmitting at 4Mbps
from a 3.3V Supply
CAN Bus Link with Large Ground Loop Voltage
VCC1
R
RXD1
TXD
2V/DIV
LTC2875
LTC2875
CANH
120Ω
VCC2
CANH
R
RXD2
120Ω
RXD
2V/DIV
COMMON MODE
TXD1
RS1
D
CANL
GND1 AC GROUND
LOOP ≤ 36V
PEAK
CANL
GND2
D
TXD2
RS2
2875 TA01a
CANH
1V/DIV
CANL
1V/DIV
100ns/DIV
2875 TA01b
Rev A
Document Feedback
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1
LTC2875
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltages
VCC........................................................... –0.3V to 6V
Logic Input Voltages (TXD, RS) ................... –0.3V to 6V
Interface I/O: CANH, CANL, SPLIT .............. –60V to 60V
Receiver Output (RXD) ..................–0.3V to (VCC + 0.3V)
Bus Differential Voltage (CANH-CANL)....... –120V to 120V
Operating Ambient Temperature Range (Note 4)
LTC2875I..............................................–40°C to 85°C
LTC2875H........................................... –40°C to 125°C
LTC2875MP........................................ –55°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
TXD 1
8
RS
GND 2
7
CANH
VCC 3
6
CANL
RXD 4
5
SPLIT
S8 PACKAGE
8-LEAD (150mil) PLASTIC SO
TXD
1
GND
2
VCC
3
RXD
4
8 RS
9
7 CANH
6 CANL
5 SPLIT
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 120°C/W, θJC = 39°C/W
TJMAX = 150°C, θJA = 43°C/W, θJC = 5.5°C/W
EXPOSED PAD (PIN 9) CONNECT TO PCB GND
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2875IDD#PBF
LTC2875IDD#TRPBF
LGKG
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC2875HDD#PBF
LTC2875HDD#TRPBF
LGKG
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC2875MPDD#PBF
LTC2875MPDD#TRPBF
LGKG
8-Lead (3mm × 3mm) Plastic DFN
–55°C to 125°C
LTC2875IS8#PBF
LTC2875IS8#TRPBF
2875
8-Lead (150 mil) Plastic SO
–40°C to 85°C
LTC2875HS8#PBF
LTC2875HS8#TRPBF
2875
8-Lead (150 mil) Plastic SO
–40°C to 125°C
LTC2875MPS8#PBF
LTC2875MPS8#TRPBF
2875
8-Lead (150 mil) Plastic SO
–55°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
Rev A
2
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LTC2875
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V or 5V, Figure 1 applies with RL = 60Ω, RS = 0V, TYP values
at VCC = 5V unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supplies
VCC
Supply Voltage
3.3V VCC Range
l
3
3.3
3.6
V
5V VCC Range
l
4.5
5
5.5
V
ICC(R)
Supply Current (Recessive)
l
1
1.8
3
mA
ICC(D)
Supply Current (Dominant)
l
25
42
60
mA
ICCS
Supply Current in Shutdown Mode (I-Grade)
RS = TXD = VCC, RXD Open, T ≤ 85°C
l
1
5
µA
Supply Current in Shutdown Mode
(H-, MP-Grade)
RS = TXD = VCC, RXD Open,
T ≤ 125°C
l
1
15
µA
t < tTOTXD
Driver
VO(D)
Bus Output Voltage
(Dominant)
CANH
CANL
VO(R)
VCC = 5V
l
2.75
3.6
4.5
V
VCC = 3.3V
l
2.15
2.9
3.3
V
VCC = 5V
l
0.5
1.4
2.25
V
VCC = 3.3V
l
0.5
0.9
1.65
V
VCC = 5V, No Load (Figure 1)
l
2
2.5
3
V
VCC = 3.3V, No Load (Figure 1)
l
t < tTOTXD
Bus Output Voltage (Recessive)
1.45
1.95
2.45
V
VOD(D)
Differential Output Voltage (Dominant)
RL = 50Ω to 65Ω (Figure 1)
l
1.5
2.2
3.0
V
VOD(R)
Differential Output Voltage (Recessive)
No Load (Figure 1)
l
–500
0
50
mV
VOC(D)
Common Mode Output Voltage (Dominant)
VCC = 5V, (Figure 1)
l
2
2.5
3
V
IOS(D)
Bus Output Short-Circuit Current
(Dominant)
VCC = 3.3V, (Figure 1)
l
1.45
1.95
2.45
V
CANH
CANH = 0V
l
–100
–75
–40
mA
CANH
–60V ≤ CANH ≤ 60V
l
–100
3
mA
CANL
CANL = 5V
l
40
75
100
mA
CANL
–60V ≤ CANL ≤ 60V
l
–3
100
mA
VCC = 5V
l
±36
V
VCC = 3.3V
l
VCC = 5V, –36V ≤ VCM ≤ 36V
l
VCC = 3.3V, –25V ≤ VCM ≤ 25V
l
VCC = 5V, –36V ≤ VCM ≤ 36V
l
500
625
mV
VCC = 3.3V, –25V ≤ VCM ≤ 25V
l
500
625
mV
150
mV
Receiver
VCM
Bus Common Mode Voltage = (CANH + CANL)/2
for Data Reception
±25
V
775
900
mV
775
900
VTH+
Bus Input Differential Threshold Voltage
(Positive-Going)
VTH–
Bus Input Differential Threshold Voltage
(Negative-Going)
∆VTH
Bus Input Differential Hysteresis Voltage
RIN
Input Resistance (CANH and CANL)
TXD = VCC; RIN = ∆V/∆I; ∆I = ±20µA
l
25
40
50
kΩ
RID
Differential Input Resistance
TXD = VCC; RIN = ∆V/∆I; ∆I = ±20µA
l
50
80
100
kΩ
∆RIN
Input Resistance Matching
RIN (CANH) to RIN (CANL)
l
±1
%
CIH
Input Capacitance to GND (CANH)
(Note 6)
32
pF
CIL
Input Capacitance to GND (CANL)
(Note 6)
8
pF
CID
Differential Input Capacitance
(Note 6)
8.4
pF
IL
VCC = 5V, –36V ≤ VCM ≤ 36V
VCC = 3.3V, –25V ≤ VCM ≤ 25V
150
mV
mV
Bus Leakage Current (Power Off) (I-Grade)
VCC = 0V, CANH = CANL = 5V, T ≤ 85°C
l
±10
µA
Bus Leakage Current (Power Off) (H-, MP-Grade)
VCC = 0V, CANH = CANL = 5V, T ≤ 125°C l
±40
µA
Rev A
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3
LTC2875
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V or 5V, Figure 1 applies with RL = 60Ω, RS = 0V, TYP values
at VCC = 5V unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Common Mode Stabilization Output SPLIT
VO_SPLIT
IOS_SPLIT
SPLIT Output Voltage
SPLIT Short-Circuit Current
–500μA ≤ I(SPLIT) ≤ VCC = 5V
500μA
VCC = 3.3V
l
1.5
2.5
3.5
l
0.9
1.9
2.9
–60V ≤ SPLIT ≤ 60V
l
–3
VCC – 0.4V
3
V
V
mA
Receiver Output RXD
VOH_RXD
Receiver Output High Voltage
I(RXD) = –3mA (Sourcing)
l
VOL_RXD
Receiver Output Low Voltage
I(RXD) = 3mA (Sinking)
l
IOS_RXD
Receiver Short-Circuit Current
RXD = 0V or VCC
l
V
±11
0.4
V
±18
mA
Logic Input TXD
VIH_TXD
High Level Input Voltage
VCC = 3.3V or 5V
l
VIL_TXD
Low Level Input Voltage
VCC = 3.3V or 5V
l
0.67 • VCC
IIN_TXD
Logic Input Current
0 ≤ TXD ≤ VCC
l
–20
0.9 • VCC
V
0
0.33 • VCC
V
10
µA
Logic / Slew Control Input RS
VIH_RS
High Level Input Voltage
VCC = 3.3V or 5V
l
VIL_RS
Low Level Input Voltage
VCC = 3.3V or 5V
l
IIN_RS
Logic Input Current
0 ≤ RS ≤ VCC
l
–170
V
0
0.5 • VCC
V
10
µA
Rev A
4
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LTC2875
SWITCHING CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V or 5V, Figure 1 applies with RL = 60Ω, CL = 100pF, RSL =
0Ω, RS = 0V, TYP values at VCC = 5V unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Transceiver Timing
fMAX
Maximum Data Rate
tPTXBD
TXD to Bus Dominant Propagation Delay
tPTXBR
TXD to Bus Recessive Propagation Delay
(Figure 2, 3)
(Figure 2, 3)
l
4
VCC = 3.3V
l
Mbps
45
80
130
ns
VCC = 5V
l
45
75
115
ns
VCC = 3.3V
l
80
120
170
ns
VCC = 5V
l
60
90
120
ns
tPTXBDS
TXD to Bus Dominant Propagation Delay,
Slow Slew
RSL=200kΩ
(Figure 2, 3)
VCC = 3.3V
l
200
540
1220
ns
VCC = 5V
l
220
560
1200
ns
tPTXBRS
TXD to Bus Recessive Propagation Delay,
Slow Slew
RSL=200kΩ
(Figure 2, 3)
VCC = 3.3V
l
400
960
2010
ns
VCC = 5V
l
480
1040
2240
ns
tPBDRX
Bus Dominant to RXD Propagation Delay
(Figure 2, 3)
l
25
40
65
ns
tPBRRX
Bus Recessive to RXD Propagation Delay
(Figure 2, 3)
l
25
45
80
ns
tPTXRXD
TXD to RXD Dominant Propagation Delay
(Figure 2, 3)
VCC = 3.3V
l
80
120
180
ns
VCC = 5V
l
75
115
165
ns
VCC = 3.3V
l
115
165
215
ns
tPTXRXR
TXD to RXD Recessive Propagation Delay
(Figure 2, 3)
VCC = 5V
l
95
135
185
ns
tPTXRXDS
TXD to RXD Dominant Propagation Delay,
Slow Slew
RSL = 200kΩ
(Figure 2, 3)
VCC = 3.3V
l
190
500
1110
ns
VCC = 5V
l
210
530
1090
ns
tPTXRXRS
TXD to RXD Recessive Propagation Delay,
Slow Slew
RSL = 200kΩ
(Figure 2, 3)
VCC = 3.3V
l
420
940
1910
ns
VCC = 5V
l
480
1020
2110
ns
tTOTXD
TXD Timeout Time
(Figure 2, 4)
l
0.5
2
4
ms
tBIT(RXD),2M
Receiver Output Recessive Bit Time, 2Mbps,
Loop Delay Symmetry
(Figure 7)
VCC2 = 3.3V
l
400
455
550
ns
VCC2 = 5V
l
400
475
550
ns
tBIT(RXD),4M
Receiver Output Recessive Bit Time, 4Mbps
(Figure 7)
VCC2 = 5V
l
200
225
275
ns
tENRX
RXD Enable from Shutdown
(Figure 5)
l
40
µs
tENTX
TXD Enable from Shutdown
(Figure 2, 6) (Note 5)
l
40
µs
tSHDNRX
Time to Shutdown, RXD
(Figure 5)
l
250
ns
tSHDNTX
Time to Shutdown, TXD
(Figure 2, 6)
l
250
ns
l
±500
mV
Transmitter Drive Symmetry (Common Mode Voltage Fluctuation)
VSYM
Driver Symmetry (CANH + CANL – 2VO(R))
(Dynamic Peak Measurement)
RL = 60Ω/Tol. < 1%, CSPLIT =
4.7nF/5%, fTXD = 250kHz, Input
Impedance of Oscilloscope: ≤ 20pF/ ≥
1MΩ (Figure 2)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 3: Not tested in production.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature exceeds 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating temperature
may result in device degradation or failure.
Note 5: TXD must make a high to low transition after this time to assert a
bus dominant state.
Note 6: Pin capacitance given for reference only and is not tested in
production.
Rev A
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5
LTC2875
TEST CIRCUITS
RSL
RS
CANH
LTC2875
TXD
RS
GND
CANH
VCC
VCC
CANL
RXD
RXD
SPLIT
TXD
47µF
15pF
RL/2
1%
VOD
CM
RL/2
1%
0.1µF
CANL
VOC
GND
RSL = 0Ω EXCEPT AS NOTED
2875 TC01
Figure 1. All Electrical Characteristic Measurements
RSL
RS
CANH
LTC2875
TXD
RS
GND
CANH
VCC
VCC
CANL
RXD
RXD
SPLIT
TXD
15pF
47µF
RL/2
1%
CL
100pF
VOD
RL/2
1%
4.7nF
0.1µF
CANL
GND
RSL = 0Ω EXCEPT AS NOTED
2875 TC02
Figure 2. All Switching Characteristic Measurements Except Receiver Enable/Disable Times
HIGH
TXD
1/2 VCC
1/2 VCC
LOW
CANH
CANL
DOMINANT
0.9V
VOD
0.5V
RECESSIVE
HIGH
RXD
tPTXBD
tPTXBDS
1/2 VCC
1/2 VCC
tPTXBR
tPTXBRS
tPBDRX
tPTXRXD
LOW
tPBRRX
tPTXRXR
2875 TC03
Figure 3. CAN Transceiver Data Propagation Timing Diagram
Rev A
6
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LTC2875
TEST CIRCUITS
RS
HIGH
TXD
1/2 VCC
LTC2875
LOW
VCC
CANH
1k
CANL
DOMINANT
RXD
VOD
47µF
15pF
0.9V
TXD
RS
GND
CANH
VCC
CANL
RXD
SPLIT
0.1µF
+
V 1.5V
–
GND
0.5V
RECESSIVE
tTOTXD
2875 TC04
Figure 4. TXD Dominant Timeout Time
HIGH
RS
0.6VCC
0.9VCC
RXD
LOW
HIGH
1/2 VCC
1/2 VCC
tENRX
tSHDNRX
LOW
2875 TC05
Figure 5. RXD Enable and Disable Timing
HIGH
RS
0.6VCC
TXD
0.9VCC
LOW
HIGH
1/2 VCC
LOW
CANH
CANL
DOMINANT
0.9V
VOD
0.5V
tENTX
RECESSIVE
tSHDNTX
2875 TC06
tPTXBD
Figure 6. TXD Enable and Disable Timing
TXD
5 • tBIT(TXD)
tBIT(TXD)
RXD
tBIT(RXD)
2875 F07
Figure 7. Loop Delay Symmetry
Rev A
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7
LTC2875
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VCC = 3.3V or 5V, RL = 60Ω,
CL = 100pF, RSL = 0Ω, RS = 0V unless otherwise noted.
3.0
55
2.6
50
50
2.4
ICC(R) (mA)
ICC(D) (mA)
60
2.8
55
45
40
2.2
2.0
1.8
1.6
35
3.5
4
4.5
VCC (V)
1.0
5.5
5
3
3.5
2875 G01
Supply Current (Recessive) vs
Temperature
4
4.5
VCC (V)
2875 G03
Driver Differential Output Voltage
(Dominant) vs Temperature
23
2.9
22
2.6
2.7
VCC = 5V
2.0
VCC = 5V
1.8
VCC = 3.3V
1.6
2.5
21
VOD(D) (V)
2.2
ICC (mA)
ICC(R) (mA)
2.4
20
VCC = 5V
2.3
2.1
1.9
VCC = 3.3V
19
1.4
VCC = 3.3V
1.7
1.2
1.0
–75 –50 –25
18
0 25 50 75 100 125 150
TEMPERATURE (°C)
1k
10k
100k
1M
DATA RATE (bps)
1.5
–75 –50 –25
10M
Common Mode Output Voltage
(Dominant) vs Temperature
2875 G06
Driver Differential Output Voltage
(Dominant) vs Output Current
Driver Output Short-Circuit
Current (Dominant) vs Voltage
5.0
2.9
100
4.5
VOD(D) (V)
VCC = 3.3V
VCC = 5V
3.0
2.5
2.0
VCC = 3.3V
1.5
1.9
0
CANH
–50
1.0
1.7
1.5
–75 –50 –25
50
3.5
IOS(D) (mA)
VCC = 5V
2.5
2.1
CANL
4.0
2.3
0 25 50 75 100 125 150
TEMPERATURE (°C)
2875 G05
2875 G04
VOC(D) (V)
0 25 50 75 100 125 150
TEMPERATURE (°C)
2875 G02
2.8
2.7
VCC = 3.3V
25
–75 –50 –25
5.5
5
Supply Current vs Data Rate
3.0
VCC = 5V
40
30
1.2
3
45
35
1.4
30
25
Supply Current (Dominant) vs
Temperature
Supply Current (Recessive) vs VCC
ICC(D) (mA)
60
Supply Current (Dominant) vs VCC
0.5
0 25 50 75 100 125 150
TEMPERATURE (°C)
0
0
10
20 30 40 50 60
OUTPUT CURRENT (mA)
70
80
2875 G08
2875 G07
–100
–60
–40
–20
0
20
OUTPUT VOLTAGE (V)
40
60
2875 G09
Rev A
8
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LTC2875
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VCC = 3.3V or 5V, RL = 60Ω,
CL = 100pF, RSL = 0Ω, RS = 0V unless otherwise noted.
Receiver Output Voltage vs
Output Current
Bus Dominant to RXD Propagation
Delay vs Temperature
52
4
RECESSIVE, VCC = 3.3V
3
2
1
0
DOMINANT, VCC = 3.3V – 5V
0
50
50
49
49
48
48
47
46
2
8
4
6
OUTPUT CURRENT (ABSOLUTE VALUE)(mA)
46
45
44
44
43
43
2875 G10
42
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
2875 G12
TXD to Bus Dominant Propagation
Delay vs Temperature
TXD to Bus Recessive Propagation
Delay vs Temperature
2.4
160
160
2.2
150
150
140
140
130
130
120
120
VCC = 5V
tPTXBD (ns)
1.8
1.6
110
1.4
110
100
VCC = 3.3V
1.2
90
1.0
80
0.8
70
0.6
–75 –50 –25
60
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
100
VCC = 3.3V
90
200
200
180
180
tPTXRXR (ns)
tPTXRXD (ns)
220
100
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
2875 G15
TXD to RXD Recessive Propagation
Delay vs Temperature
220
120
60
–75 –50 –25
2875 G14
VCC = 3.3V
VCC = 5V
70
0 25 50 75 100 125 150
TEMPERATURE (°C)
TXD to RXD Dominant Propagation
Delay vs Temperature
140
80
VCC = 5V
2875 G13
160
VCC = 3.3V
tPTXBR (ns)
2.0
0 25 50 75 100 125 150
TEMPERATURE (°C)
2875 G11
TXD Timeout Time vs
Temperature
tTOTXD (ns)
47
45
42
–75 –50 –25
CL = 15pF
51
tPBRRX (ns)
5
52
CL = 15pF
51
RECESSIVE, VCC = 5V
tPBDRX (ns)
RECEIVER OUTPUT VOLTAGE (V)
6
Bus Recessive to RXD Propagation
Delay vs Temperature
VCC = 3.3V
160
140
VCC = 5V
VCC = 5V
120
0 25 50 75 100 125 150
TEMPERATURE (°C)
100
–75 –50 –25
2875 G16
0 25 50 75 100 125 150
TEMPERATURE (°C)
2875 G17
Rev A
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9
LTC2875
PIN FUNCTIONS
TXD (Pin 1): Transmit Data Input. Low in dominant state.
Integrated 500k pull-up to VCC.
CANL (Pin 6): Low Level CAN Bus Line. ±60V tolerant,
25kV ESD.
GND (Pin 2): Ground.
CANH (Pin 7): High Level CAN Bus Line. ±60V tolerant,
25kV ESD.
VCC (Pin 3): Positive Supply. 3V ≤ VCC ≤ 3.6V or 4.5V ≤
VCC ≤ 5.5V. Bypass with 0.1µF ceramic capacitor or larger.
RXD (Pin 4): Receiver Data Output. Low in dominant
state. Integrated 500k pull-up to VCC.
SPLIT (Pin 5): Common Mode Stabilization Output for
Optional Split Termination. ±60V tolerant, 25kV ESD. If
unused, leave open.
RS (Pin 8): Shutdown Mode/Slew Control Input. A voltage
on RS higher than VIH_RS puts the chip in a low power
shutdown state. A voltage on RS lower than VIL_RS
enables the chip. A resistor between RS and ground can
be used to control the slew rate. See Applications section
for details.
GND (Pin 9): Exposed pad on the DFN package. Connect
to PCB ground.
FUNCTIONAL TABLES
LOGIC INPUTS
MODE
CANH, CANL
RXD
RS
TXD
0
0
Active
Dominant (t < tTOTXD)
0
0
1
Active
Recessive
Receive Bus Data
~0.9V ≤ VRS ≤ ~1.1V
–
Slew Control
–
–
1
X
Shutdown
High-Z
High-Z
Rev A
10
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LTC2875
BLOCK DIAGRAM
3
VCC
1
TXD
500k
VCC
8
RS
250k
TXD
TIMEOUT
SLEW
CONTROL
PREDRIVE
SLEW
SHUTDOWN/
SHUTDOWN
SLEW
VCC
4
RXD
500k
RX
VCC
5
SPLIT*
VCC
VCC
40k
CANH*
40k
CANL*
7
6
1.4k
+
+
–
–
1.4k
GND
2
2875 BD
*±60V TOLERANT, ±25kV HBM PROTECTED PINS
Figure 8. LTC2875 Simplified Block Diagram
Rev A
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11
LTC2875
APPLICATIONS INFORMATION
Supply Voltage Ranges
The LTC2875 can operate from 3.3V or 5V supplies. An internal comparator monitors the supply voltage and switches
internal reference voltages and output drive strengths at
approximately 4.1V. Because of the discontinuity in the
internal voltages at this switch point, operation with a supply voltage between 3.6V and 4.5V is not recommended.
±60V Fault Protection
The LTC2875 addresses application needs for an overvoltage tolerant CAN transceiver that can operate from both
3.3V and 5V supplies and provide extended common mode
operation, high noise immunity and low electromagnetic
emission. Industrial installations may encounter common mode voltages between nodes far greater than the
–2V to 7V range specified by the ISO 11898-2 standard.
Competing CAN transceivers can be damaged by voltages
beyond their typical absolute maximum ratings of –3V to
16V. The limited overvoltage tolerance makes implementation of effective external protection networks difficult
without interfering with proper data network performance.
Replacing standard CAN transceivers with LTC2875
devices can eliminate field failures due to overvoltage
faults without using costly external protection devices.
The ±60V fault protection of the LTC2875 is achieved by
using a high voltage BiCMOS integrated circuit technology. The naturally high breakdown voltage of this technology provides protection in powered off and high impedance conditions. The driver outputs use a progressive
foldback current limit to protect against overvoltage faults
while still allowing high current output drive.
The LTC2875 is protected from ±60V bus faults even
with the loss of GND or VCC (GND open faults are not
tested in production). In the case of VCC open, or shorted
to GND, the LTC2875 is off and the bus pins remain in
the high impedance state. Additional precautions must
be taken in the case of VCC present and GND open. The
LTC2875 chip protects itself from damage but may turn
on despite the open GND pin. When the RS or TXD input
is pulled low with the GND pin floating, a sneak path to
GND is established: through the ESD diode on the RS
or TXD pin; out through the RS or TXD pin; and into
the external driver that is pulling the pin low (Figure 9).
The current in this path can have a maximum current of
–100mA with a maximum voltage of approximately VCC
– 2.5V during an overvoltage fault condition on the CANL
pin because the entire current that should flow out the
GND pin may flow out the input pin instead. If a GND open
fault with VCC present is anticipated, the system designer
should choose drivers for the RS and TXD inputs that are
protected against shorts to VCC – 2.5V.
The high voltage rating of the LTC2875 makes it simple to
extend the overvoltage protection to higher levels using
external protection components. Compared to lower voltage CAN transceivers, external protection devices with
higher breakdown voltages can be used so as not to interfere with data transmission in the presence of large common mode voltages. Figure 14 in the Typical Application
section shows a network capable of protecting against IEC
Level 4 surge, while still providing up to ±35V common
mode range on the signal lines.
VCC
VCC
LTC2875
TXD
RXD
TXD
RS
GND
CANH
VCC
CANL
RXD
SPLIT
CANH
RSB
CANL
SPLIT
2875 F09
Figure 9. Sneak Path to GND with GND Pin Floating
±36V Extended Common Mode Range
The LTC2875 receiver features an extended common
mode range of –36V to 36V when operating from a 5V
supply, and –25V to 25V when operating from a 3.3V supply. The wide common mode increases the reliability of
operation in environments with high common mode voltages created by electrical noise or local ground potential
differences due to ground loops. This extended common
mode range allows the LTC2875 to transmit and receive
under conditions that would cause data errors and possible device damage in competing products.
Rev A
12
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LTC2875
APPLICATIONS INFORMATION
±25kV ESD Protection
The LTC2875 features exceptionally robust ESD protection. The transceiver interface pins (CANH, CANL, SPLIT)
feature protection with respect to GND to ±25kV HBM
without latchup or damage, during all modes of operation or while unpowered. All other pins are protected to
±8kV HBM to make the LTC2875 reliable under severe
environmental conditions.
4Mbps Operation
The LTC2865 features a high speed receiver and transmitter capable of operating up to 4 Mbps. In order to
operate at this data rate, the transmitter must be set at its
maximum slew rate by pulling the RS pin low to ground
with no more than 4kΩ of resistance, including the output
impedance of the buffer driving the RS input (see RS Pin
and Variable Slew Rate Control below).
Driver
The driver provides full CAN compatibility. When TXD is
low with the chip enabled (RS low), the dominant state is
asserted on the CAN bus lines (subject to the TXD timeout
tTOTXD); the CANH driver pulls high and the CANL driver
pulls low. When TXD is high and RS is low, the driver is
in the recessive state; both the CANH and CANL drivers are in the Hi-Z state and the bus termination resistor
equalizes the voltage on CANH and CANL. In the recessive
state, the impedance on CANH and CANL is determined
by the receiver input resistance, RIN. When RS is high the
LTC2875 is in shutdown; the CANH and CANL drivers are
in the Hi-Z state, and the receiver input resistance RIN is
disconnected from the bus by a FET switch.
Transmit Dominant Timeout Function
The LTC2875 includes a 2ms (typical) timer to limit the
time that the transmitter can hold the bus in the dominant
state. If TXD is held low, a dominant state is asserted on
CANH and CANL until the TXD timer times out at tTOTXD,
after which the transmitter reverts to the recessive state.
The timer is reset when TXD is brought high. The transmitter asserts a dominant state upon the next TXD low.
The lowest data rate that can be communicated without
interference from the transmit dominant timeout timer is
22kbps, corresponding to 11 consecutive dominant bits
divided by a bit time equal to the minimum tTOTXD value
of 0.5ms. 11 dominant bits is the maximum allowed by
the CAN protocol, consisting of 5 dominant bits followed
by an error frame of 6 dominant bits.
Driver Overvoltage,Overcurrent, and Overtemperature
Protection
The driver outputs are protected from short circuits to any
voltage within the absolute maximum range of –60V to
60V. The maximum current in a fault condition is ±100mA.
The driver includes a progressive foldback current limiting
circuit that continuously reduces the driver current limit
with increasing output fault voltage. The fault current is
typically ±10mA for fault voltages of ±60V.
The LTC2875 also features thermal shutdown protection
that disables the driver in case of excessive power dissipation (see Notes 3 and 4). When the die temperature
exceeds 170°C (typical), the transmitter is forced into the
recessive state. The receiver remains operational.
Power-Up/Down Glitch-Free Outputs
The LTC2875 employs a supply undervoltage detection
circuit to control the activation of the circuitry on-chip.
During power-up, the CANH, CANL, RXD and SPLIT outputs remain in the high impedance state until the supply
reaches a voltage sufficient to reliably operate the chip.
At this point, the chip activates if RS is low. The receiver
output goes active after a short delay tENRX and reflects
the state at the CAN bus pins, and the SPLIT output goes
active at approximately the same time. The transmitter
powers up in the transmit dominant timeout state regardless of the state of the TXD pin, and remains in the recessive state until the first high to low transition on TXD after
the TXD enable time tENTX. This assures that the transmitter does not disturb the bus by glitching to the dominant
state during power-up.
During power down, the reverse occurs; the supply undervoltage detection circuit senses low supply voltage and
immediately puts the chip into shutdown. CANH, CANL,
RXD, and SPLIT outputs go to the high impedance state.
The voltage on RXD is pulled high by the 500k pull-up
resistor.
Rev A
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13
LTC2875
APPLICATIONS INFORMATION
When operating from a 5V supply the LTC2875 adheres to
the ISO 11898-2 CAN bus standard by maintaining drive
levels that are symmetric around VCC/2 = 2.5V. An internal
common mode reference of VCC/2 is buffered to supply
the termination of the receiver input resistors. A second
buffer with a high voltage tolerant output supplies VCC/2
to the SPLIT output.
When operating from a 3.3V supply the 2.5V nominal
common mode voltage specified in the ISO 11898-2 standard is too close to the 3.3V supply to provide symmetric
drive levels while maintaining the necessary differential
output voltage. To maintain driver symmetry the common
mode reference voltage is lowered during 3.3V operation.
The typical output common mode voltage is 1.95V in the
dominant state. The internal common mode reference is
set to VCC/2 + 0.3V = 1.95V to match the dominant state
output common mode voltage. This reference is independently buffered to supply the termination of the receiver
input resistors and the SPLIT voltage output.
As the LTC2875 operates over a very wide common
mode range, this small shift of –0.55V in the common
mode when operating from 3.3V does not degrade data
transmission or reception. An LTC2875 operating at 3.3V
may share a bus with other CAN transceivers operating
at 5V. However, the electromagnetic emissions may be
larger if transceivers powered by different voltages share
a bus, due to the fluctuation in the common mode voltage from 1.95V (when an LTC2875 on a 3.3V supply is
dominant) to 2.5V (when a CAN transceiver on a 5V supply is dominant).
The relationship between the series slew control resistor
RSL and the transmitter slew rate can be observed in
Figure 10. RSL ≤ 4kΩ is recommended for high data rate
communication. RSL should be less than 200k to ensure
that the RS pin can be reliably pulled below VIL_RS to
enable the chip.
60
50
VCC = 5V
40
SLEW RATE (V/µs)
Common Mode Voltage vs Supply Voltage
VCC = 3.3V
30
20
10
0
1
10
RSL (kΩ)
100
2875 F10
Figure 10. Slew Rate vs Slew Control Resistor RSL
When a voltage between 1.1V and VCC is applied, the RS
pin acts as a high impedance receiver. A voltage above
VIH_RS puts the chip in shutdown, while a voltage below
VIL_RS but above 1.1V activates the chip and sets the
transmitter to the minimum slew rate.
VCC
RS
IPU
250k
2k
ISC
(–100µA LIMIT)
RS Pin and Variable Slew Rate Control
IDEAL
DIODE
+
V
–
1.1V
2875 F11
The driver features adjustable slew rate for improved EME
performance. The slew rate is set by the amount of current that is sourced by the RS pin when it is pulled below
approximately 1.1V. This allows the slew rate to be set
by a single slew control resistor RSL in series with the
RS pin (Figure 1).
Figure 11. Equivalent Circuit of RS Pin
The slew control circuit on the RS pin is activated at applied
voltages below 1.1V. The RS pin can be approximately
modeled as a 1.1V voltage source with a series resistance
of 2kΩ and a current compliance limit of –100µA, and
a 250kΩ pull-up resistor to VCC (Figure 11). Lowering
Rev A
14
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LTC2875
APPLICATIONS INFORMATION
the voltage on RS increases the slew control current ISC
being drawn from the slew control circuit until the voltage
reaches ~ 0.9V, where the current drawn from the circuit
is ~ –100µA. Below an applied voltage of ~ 0.9V, the slew
control circuit sources no additional current, and the current drawn from it remains at ~ –100µA down to 0V.
The total current IRS drawn from the RS pin for input voltage 0.9V ≤ VRS ≤ 1.1V is the sum of the internal pull-up
resistor current IRS and the slew control current ISC.
IRS (0.9V ≤ V RS ≤ 1.1V ) = IPU + ISC
V – V RS 1.1V – V RS
= CC
+
250k
2k
The transmitter slew rate is controlled by the slew control current ISC with increasing current magnitude corresponding to higher slew rates. The slew rate can be controlled using a single slew control resistor RSL in series
with the RS pin. When the RS pin is pulled low towards
ground by an external driver, RSL limits the amount of
current drawn from the RS pin and sets the transmitter
slew rate. Alternatively, the slew rate may be controlled
by an external voltage or current source.
to ensure that VSYM limits are not exceeded at any point
during the switching cycle.
The high frequency content may be reduced by choosing
a lower data rate and a slower slew rate for the signal
transitions. The LTC2875 provides an approximate 20 to 1
reduction in slew rate, with a corresponding decrease in
the high frequency content. The lowest slew rate is suitable for data communication at 200kbps or below, while
the highest slew rate supports 4Mbps. The slew rate limit
circuit maintains consistent control of transmitter slew
rates across voltage and temperature to ensure predictable performance under all operating conditions. Figure 13
demonstrates the reduction in high frequency content of
the common mode voltage achieved by the lowest slew
rate compared to the highest slew rate at 200kbps.
1Mbps
VCC = 3.3V
CANH
500mV/DIV
COMMON MODE
500mV/DIV
CANL
500mV/DIV
High Symmetry Driver with Variable Slew Rate
The electromagnetic emissions spectrum of a differential
line transmitter is largely determined by the variation in
the common mode voltage during switching, as the differential component of the emissions from the two lines
cancel, while the common mode emissions of the two
lines add. The LTC2875 transmitter has been designed
to maintain highly symmetric transitions on the CANH
and CANL lines to minimize the perturbation of the common mode voltage during switching (Figure 12), resulting
in low EME. The common mode switching symmetry is
guaranteed by the VSYM specification.
In addition to full compliance with the ISO 11898-2 standard, LTC2875 meets the more stringent requirements
of ISO 11898-5 for bus driver symmetry. This requires
that the common mode voltage stay within the limits not
only during the static dominant and recessive states, but
during the bit transition states as well. Ultra-high speed
peak detect circuits are used during manufacturing test
200ns/DIV
2875 F12
Figure 12. Low Perturbation of Common Mode Voltage
During Switching
RSL = 0
0dB
20dB/DIV
RSL = 200k
0dB
20dB/DIV
500kHz/DIV
2875 F13
Figure 13. Power Spectrum of Common Mode Voltage
Showing High Frequency Reduction of Lowest Slew
Rate (RSL=200k) Compared to Highest Slew Rate (RSL=0)
Rev A
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15
LTC2875
APPLICATIONS INFORMATION
SPLIT Pin Output for Split Termination Support
Split termination is an optional termination technique
to reduce common mode voltage perturbations that can
produce EME. A split terminator divides the single lineend termination resistor (nominally 120Ω) into two series
resistors of half the value of the single termination resistor
(Figure 2). The center point of the two resistors is connected to a low impedance voltage source that sets the
recessive common mode voltage.
Split termination suppresses common mode voltage perturbations by providing a low impedance load to common
mode noise sources such as transmitter noise or coupling
to external noise sources. In the case of single resistor
termination, the only load on a common mode noise
source is the parallel impedance of the input resistors of
the CAN transceivers on the bus. This results in a common mode impedance of several kilohms for a small network. The split termination, on the other hand, provides
a common mode load equal to the parallel resistance of
the two split termination resistors, or ¼ the resistance of
the single termination resistor (30Ω). This low common
mode impedance results in a reduction of the common
mode noise voltage compared to the much higher common mode impedance of the single resistor termination.
The SPLIT pin on the LTC2875 provides a buffered voltage
to bias the mid-point of the split termination resistors. The
voltage on the SPLIT pin matches the common mode voltage established by the transmitter in the dominant state
and the receiver input resistor bias during the recessive
state: VCC/2 when VCC = 5V and VCC/2+0.3V when VCC =
3.3V. Decouple SPLIT with a 4.7nF capacitor to ground
to lower the AC impedance to better suppress fast transients. SPLIT is a high voltage fault tolerant output that
tolerates the same ±60V overvoltage faults and ±25kV
ESD discharges as CANH and CANL.
One disadvantage of the SPLIT termination is higher power
supply current if the two terminating transceivers differ in
their common mode voltage due to differences in VCC or
GND potential or to chip to chip variations in the internal
reference voltages. This will result in the transceiver with
the higher common mode voltage sourcing current into
the bus lines through its SPLIT pin, while the transceiver
with the lower common mode voltage will sink current
through its SPLIT pin.
Ideal Passive Behavior to CAN Bus With Supply Off
When the power supply is removed or the chip is in shutdown, the CANH and CANL pins are in a high impedance
state. The receiver inputs are isolated from the CANH and
CANL nodes by FET switches which opens in the absence
of power, thereby preventing the resistor dividers on the
receiver input from loading the bus. The high impedance
state of the receiver is maintained over a range determined
by the ESD protection of the receiver input, typically −0.3V
to 10V. For bus voltages outside this range, the current
flowing into the receiver is governed by the conduction
voltages of the ESD device and the 40k nominal receiver
input resistance.
Micropower Shutdown Mode
The low power shutdown mode is entered by raising the
voltage on the RS pin above its VIH_RS threshold. This
turns off all circuits that draw DC bias currents and disables all chip functionality. Any remaining supply current
in shutdown is due to semiconductor device leakage currents. All the outputs —CANH, CANL, SPLIT, and RXD—
are in the high impedance state, with RXD pulled up to
VCC through a 500kΩ resistor to ensure it remains in the
recessive state.
The chip is enabled by bringing the RS pin below its VIL_
RS threshold. The RXD output goes active after the time
delay tENRX (40µs max) and the SPLIT pin goes active at
approximately the same time. CANH and CANL switch to
the dominant state at the first high-to-low transition of
TXD after the tENTX delay.
Auxiliary Protection for IEC Surge, EFT and ESD
A transceiver used in an industrial setting may be exposed
to extremely high levels of electrical overstress due to
phenomena such as lightning surge, electrical fast transient (EFT) from switching high current inductive loads,
and electrostatic discharge (ESD) from the discharge of
electrically charged personnel or equipment. Test methods to evaluate immunity of electronic equipment to these
phenomena are defined in the IEC standards 61000-4-2,
Rev A
16
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LTC2875
APPLICATIONS INFORMATION
61000-4-4, and 61000-4-5, which address ESD, EFT, and
surge, respectively. The transients produced by the EFT
and particularly the surge tests contain much more energy
than ESD transients. The LTC2875 is designed for high
robustness against ESD, but the on-chip protection is not
able to absorb the energy associated with the 61000-4-5
surge transients. Therefore, a properly designed external
protection network is necessary to achieve a high level
of surge protection, and can also extend the ESD and EFT
performance of the LTC2875 to extremely high levels.
In addition to providing surge, EFT and ESD protection,
an external network should preserve the ability of the
LTC2875 to operate over a wide common mode and communicate at high frequencies. In order to meet the first
requirement, protection components with suitably high
conduction voltages must be chosen. A means to limit
current must be provided to prevent damage in case a secondary protection device or the ESD cell on the LTC2875
fires and conducts. The capacitance of these components
must be kept low in order to permit high frequency communication over a network with multiple nodes.
The protection network shown in Figure 14 in the Typical
Application section provides the following protection:
IEC 61000-4-2 Edition 2.0 2008-12 ESD Level 4: ±30kV
air, ±15kV contact (line to GND, direct discharge to bus
pins with transceiver and protection circuit mounted
on a ground referenced test card per Figure 4 of the
standard)
IEC 61000-4-4 Second Edition 2004-07 EFT Level 4:
±5kV (line to GND,100kHz repetition rate, 0.75ms burst
duration, 60 second test duration, discharge coupled
to bus pins through 100pF capacitor per paragraph
7.3.2 of the standard)
IEC 61000-4-5 Second Edition 2005-11 Surge Level
4: ±5kV (line to GND, line to line, 8/20µs waveform,
each line coupled to generator through 80Ω resistor
per Figure 14 of the standard)
This protection circuit adds only ~36pF of capacitance
per line (line to GND), thereby providing an extremely
high level of protection without significant impact to the
performance of the LTC2875 at high data rates.
The gas discharge tubes (GDTs) provide the primary protection against electrical surges. These devices provide a
very low impedance and high current carrying capability
when they fire, safely discharging the surge current to
GND. The transient blocking units (TBUs) are solid state
devices that switch from a low impedance pass through
state to a high impedance current limiting state when a
specified current level is reached. These devices limit the
current and power that can pass through to the secondary protection. The secondary protection consists of a
bidirectional TVS diode, which avalanches above 36V to
protect the bus pins of the LTC2875 transceiver. The high
avalanche voltage of the secondary protection maintains
a wide common mode range. The final component of the
network is the metal oxide varistors (MOVs) which are
used to clamp the voltage across the TBUs to protect
them against fast ESD and EFT transients which exceed
the turn-on time of the GDT.
The high performance of this network is attributable
to the low capacitance of the GDT primary protection
devices. The high capacitance MOV floats on the line and
is shunted by the TBU, so it contributes no appreciable
capacitive load on the signal.
Logic I/O Interface Voltages and Power Supply
Sequencing
Logic inputs RS and TXD are protected by ground referenced ESD devices. These inputs do not draw a high
current if driven by voltages exceeding VCC as long as
the absolute maximum ratings for these pins are not
exceeded. The VCC supply for the LTC2875 may be safely
brought up before or after the supplies powering the
logic driving the RXD and TXD inputs with no adverse
consequences.
Rev A
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17
LTC2875
APPLICATIONS INFORMATION
DeviceNet Compatibility
DeviceNet is a network standard based on the CAN bus.
The DeviceNet standard places requirements on the transceiver that exceed those of the ISO 11898-2 standard. The
LTC2875 meets the following DeviceNet requirements:
PARAMETER
Number of Nodes
DeviceNet
ISO 11898-2
REQUIREMENT REQUIREMENT
LTC2875
64
N/A
166
20kΩ
10kΩ
50kΩ
Differential Input
Capacitance
25pF (Max)
10pF (Nom)
8.4pF (Typ)
Bus Pin Voltage Range
(Survivable)
–25V to 18V
Bus Pin Voltage Range
(Operation)
–5V to 10V
–2V to 7V
–36V to 36V
(VCC = 5V)
Connector Mis-Wiring
Tests, All Pin-Pin
Combinations
±18V
N/A
±60V
(See Below)
Transmitter
Propagation Delay
120ns (Max)
N/A
120ns
(VCC = 5V)
Receiver
Propagation Delay
130ns (Max)
N/A
65ns
(VCC = 5V)
Minimum Differential
Input Resistance
–60V to 60V
–3V to 16V
(for 12V Battery)
DeviceNet employs a 5-pin connector with conductors
for Power+, Power–, CANH, CANL, and Drain. The power
is 24V DC, and the Drain wire is connected to the cable
shield for shielded cables. DeviceNet devices that are
powered from the 24V DC line voltage contain a stepdown regulator to power the CAN transceiver and associated circuitry, and blocking diodes to prevent damage in
case of power polarity reversal.
The DeviceNet mis-wiring tests involve connecting an
18V supply to each of the 20 possible pin pair/polarity
combinations on the 5-pin connector. The ±60V tolerance
of the LTC2875 with VCC and/or GND open or grounded
ensure that the LTC2875 will pass all the mis-wiring tests
without damage as long as its VCC pin is protected from
overvoltage and reverse polarity by other circuitry in the
DeviceNet device.
MOV
LTC2875
VCC
CANH_EXTERNAL
GDT
TBU
TVS
CANH
GND
GDT
TBU
TVS
CANL_EXTERNAL
CANL
R
RXD
TXD
T
RS
GND
MOV
2875 F14
GDT: BOURNS 2031-15T-SM; 150V GAS DISCHARGE TUBE
TBU: BOURNS TBU-CA050-300-WH; 500V TRANSIENT BLOCKING UNIT
MOV: BOURNS MOV-7D201K; 200V 13J METAL OXIDE VARISTOR
TVS: BOURNS CDSOD323-T36SC; 36V BIDIRECTIONAL TVS DIODE
Figure 14. Network for IEC Level 4 Protection Against Surge, EFT and ESD
Rev A
18
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LTC2875
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 ±0.05
3.5 ±0.05
1.65 ±0.05
2.10 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
5
0.40 ±0.10
8
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
4
0.25 ±0.05
1
(DD8) DFN 0509 REV C
0.50 BSC
2.38 ±0.10
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
Rev A
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19
LTC2875
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.050 BSC
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
8
.245
MIN
.160 ±.005
.010 – .020
× 45°
(0.254 – 0.508)
NOTE:
1. DIMENSIONS IN
5
.150 – .157
(3.810 – 3.988)
NOTE 3
1
RECOMMENDED SOLDER PAD LAYOUT
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
6
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
.008 – .010
(0.203 – 0.254)
7
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 REV G 0212
Rev A
20
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LTC2875
REVISION HISTORY
REV
DATE
DESCRIPTION
A
04/19
Added CAN FD claims to title, features, and description
PAGE NUMBER
1
Added tBIT specifications to Switching Characteristics table
5
Inserted new Figure 7: Loop Delay Symmetry
7
Corrected lowest data rate in “Transmit Dominant Timeout Function”
13
Rev A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
21
LTC2875
TYPICAL APPLICATION
Network for IEC Level 4 Protection Against Surge, EFT and ESD
MOV
LTC2875
VCC
CANH_EXTERNAL
GDT
TBU
TVS
CANH
R
GND
GDT
TBU
TVS
CANL_EXTERNAL
CANL
RXD
TXD
T
RS
GND
MOV
2875 TA02
GDT: BOURNS 2031-15T-SM; 150V GAS DISCHARGE TUBE
TBU: BOURNS TBU-CA050-300-WH; 500V TRANSIENT BLOCKING UNIT
MOV: BOURNS MOV-7D201K; 200V 13J METAL OXIDE VARISTOR
TVS: BOURNS CDSOD323-T36SC; 36V BIDIRECTIONAL TVS DIODE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT 1796
Overvoltage Fault Protected CAN Transceiver Protected from Overvoltage Faults to ±60V
LTC2862/LTC2865
±60V Fault Protected 3V to 5.5V RS485/
RS422 Transceivers
20Mbps, Protected from Overvoltage Line Faults to ±60V, 15kV ESD
LTC2874
Quad IO-Link Master Hot Swap™ Controller
and PHY
8V to 30V Operation, External MOSFETs, Up to 400mA Drive Capability
LTM2881
Complete Isolated RS485/RS422 μModule®
Transceiver + Power
2500VRMS Isolation in Surface Mount BGA or LGA
LTM2882
Dual Isolated RS232 μModule Transceiver
with Integrated DC/DC Converter
2500VRMS Isolation in Surface Mount BGA or LGA
LTM2883
SPI/Digital or I2C μModule Isolator with
Adjustable ±12.5V and 5V Regulated Power
2500VRMS Isolation in Surface Mount BGA
LTM2884
Isolated USB Transceiver + Power
2500VRMS Isolation in Surface Mount BGA
LTM2892
SPI/Digital or I2C μModule Isolator
3500VRMS Isolation, Six Channels
LTM2889
Isolated CAN FD µModule Transciever and
Power
2500VRMS Isolation, 3.3V or 5V options
®
Rev A
22
04/19
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For more information www.analog.com
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