LT1993CUD-4

FEATURES ■ ■ ■ LT1993-4 900MHz Low Distortion, Low Noise Differential Amplifier/ ADC Driver (AV = 4V/V) DESCRIPTIO The LT®1993-4 is a low distortion, low noise Differential Amplifier/ADC driver for use in applications from DC to 900MHz. The LT1993-4 has been designed for ease of use, with minimal support circuitry required. Exceptionally low input-referred noise and low distortion products (with either single-ended or differential inputs) make the LT1993-4 an excellent solution for driving high speed 12bit and 14-bit ADCs. In addition to the normal unfiltered outputs (+OUT and –OUT), the LT1993-4 has a built-in 175MHz differential lowpass filter and an additional pair of filtered outputs (+OUTFILTERED, –OUTFILTERED) to reduce external filtering components when driving high speed ADCs. The output common mode voltage is easily set via the VOCM pin, eliminating either an output transformer or AC-coupling capacitors in many applications. The LT1993-4 is designed to meet the demanding requirements of communications transceiver applications. It can be used as a differential ADC driver, a general-purpose differential gain block, or in any other application requiring differential drive. The LT1993-4 can be used in data acquisition systems required to function at frequencies down to DC. The LT1993-4 operates on a 5V supply and consumes 100mA. It comes in a compact 16-lead 3 × 3 QFN package and operates over a –40°C to 85°C temperature range. 4-Tone WCDMA Waveform, LT1993-4 Driving LTC2255 14-Bit ADC at 92.16Msps 0 –10 32768 POINT FFT TONE CENTER FREQUENCIES AT 62.5MHz, 67.5MHz, 72.5MHz, 77.5MHz ■ ■ ■ ■ ■ ■ ■ 900MHz –3dB Bandwidth Fixed Gain of 4V/V (12dB) Low Distortion: 40dBm OIP3, –73dBc HD3 (70MHz 2VP-P) 51dBm OIP3, –94dBc HD3 (10MHz 2VP-P) Low Noise: 14.5dB NF, en = 2.35nV/√Hz (70MHz) Differential Inputs and Outputs Additional Filtered Outputs Adjustable Output Common Mode Voltage DC- or AC-Coupled Operation Minimal Support Circuitry Required Small 0.75mm Tall 16-Lead 3 × 3 QFN Package APPLICATIO S ■ ■ ■ ■ ■ ■ ■ Differential ADC Driver for: Imaging Communications Differential Driver/Receiver Single Ended to Differential Conversion Differential to Single Ended Conversion Level Shifting IF Sampling Receivers SAW Filter Interfacing/Buffering , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO 1:1 Z-RATIO 0.1µF –OUT ADC Driver with Single-Ended to Differential Conversion –20 AMPLITUDE (dBFS) –INB –INA 12.2Ω AIN– 82nH 52.3pF LTC2255 ADC AIN+ 12.2Ω LTC2255 125Msps 14-BIT ADC SAMPLING AT 92.16Msps 19934 TA01 70MHz IF IN –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 0 100Ω MA/COM ETC1-1-13 0.1µF –OUTFILTERED LT1993-4 +OUTFILTERED +INB +OUT +INA VOCM ENABLE 2.2V 12dB GAIN U U U • • 5 10 15 20 25 30 35 FREQUENCY (MHz) 40 45 LT19934 TA02 19934fa 1 LT1993-4 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW +INA +INB –INA –INB 16 15 14 13 VCCC 1 VOCM 2 VCCA 3 VEEA 4 5 +OUT 6 +OUTFILTERED 7 –OUTFILTERED 8 –OUT 17 12 VEEC 11 ENABLE 10 VCCB 9 VEEB Total Supply Voltage (VCCA/VCCB/VCCC to VEEA/VEEB/VEEC) ...................................................5.5V Input Current (+INA, –INA, +INB, –INB, VOCM, ENABLE)................................................±10mA Output Current (Continuous) (Note 6) +OUT, –OUT (DC) ..........................................±100mA (AC) ..........................................±100mA +OUTFILTERED, –OUTFILTERED (DC) .............±15mA (AC) .............±45mA Output Short Circuit Duration (Note 2) ............ Indefinite Operating Temperature Range (Note 3) ... –40°C to 85°C Specified Temperature Range (Note 4) .... –40°C to 85°C Storage Temperature Range................... –65°C to 125°C Junction Temperature ........................................... 125°C Lead Temperature Range (Soldering 10 sec) ........ 300°C UD PACKAGE 16-LEAD (3mm × 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W EXPOSED PAD IS VEE (PIN 17) MUST BE SOLDERED TO THE PCB ORDER PART NUMBER LT1993CUD-4 LT1993IUD-4 UD PART MARKING* LBNS LBNS Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. DC ELECTRICAL CHARACTERISTICS SYMBOL GDIFF VSWINGMIN VSWINGMAX VSWINGDIFF IOUT VOS TCVOS IVRMIN IVRMAX RINDIFF CINDIFF Output Voltage Swing Output Current Drive Input Offset Voltage PARAMETER Gain CONDITIONS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. MIN ● ● ● ● ● ● TYP 11.9 0.25 MAX 12.4 0.35 0.5 UNITS dB V V V V VP-P VP-P mA Input/Output Characteristics (+INA, +INB, –INA, –INB, +OUT, –OUT, +OUTFILTERED, –OUTFILTERED) Differential (+OUT, –OUT), VIN = ±0.4V Differential Single-Ended +OUT, –OUT, +OUTFILTERED, –OUTFILTERED. VIN = ±1.2V Differential Single-Ended +OUT, –OUT, +OUTFILTERED, –OUTFILTERED. VIN = ±1.2V Differential Differential (+OUT, –OUT), VIN = ±1.2VP-P Differential (Note 5) 11.6 3.6 3.5 6.5 6 ±40 –6.5 –10 3.75 7 ±45 1 2.5 0.5 6.5 10 Input Offset Voltage Drift Input Voltage Range, MIN Input Voltage Range, MAX Differential Input Resistance Differential Input Capacitance TMIN to TMAX Single-Ended Single-Ended ● ● ● ● µV/°C V V Ω pF 19934fa 4.3 77 100 1 122 2 U mV mV W U U WW W LT1993-4 DC ELECTRICAL CHARACTERISTICS SYMBOL CMRR ROUTDIFF COUTDIFF GCM VOCMMIN VOCMMAX VOSCM IBIASCM RINCM CINCM ENABLE Pin VIL VIH IIL IIH Power Supply VS IS ISDISABLED PSRR Operating Range Supply Current Supply Current (Disabled) Power Supply Rejection Ratio ENABLE = 0.8V ENABLE = 2V 4V to 5.5V ● ● ● ● The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. PARAMETER Common Mode Rejection Ratio Output Resistance Output Capacitance Common Mode Gain Output Common Mode Voltage Adjustment Range, MIN Output Common Mode Voltage Adjustment Range, MAX Output Common Mode Offset Voltage VOCM Input Bias Current VOCM Input Resistance VOCM Input Capacitance ENABLE Input Low Voltage ENABLE Input High Voltage ENABLE Input Low Current ENABLE Input High Current ENABLE = 0.8V ENABLE = 2V ● ● ● ● CONDITIONS Input Common Mode 0.5V to 4.3V ● MIN 45 TYP 70 0.3 0.8 MAX UNITS dB Ω pF Common Mode Voltage Control (VOCM Pin) Differential (+OUT, –OUT), VOCM = 1.2V to 3.6V Differential (+OUT, –OUT), VOCM = 1.4V to 3.4V Measured Single-Ended at +OUT and –OUT ● 0.9 ● 1 1.1 1.1 1.2 1.4 V/V V/V V V V V 0.9 Measured Single-Ended at +OUT and –OUT ● 3.6 3.4 –30 2 5 0.8 3 1 0.8 2 0.5 1 4 88 55 5 100 250 90 3 5.5 112 500 30 15 Measured from VOCM to Average of +OUT and –OUT ● ● ● mV µA MΩ pF V V µA µA V mA µA dB AC ELECTRICAL CHARACTERISTICS SYMBOL –3dBBW 0.1dBBW 0.5dBBW SR ts1% tON tOFF PARAMETER –3dB Bandwidth Bandwidth for 0.1dB Flatness Bandwidth for 0.5dB Flatness Slew Rate 1% Settling Time Turn-On Time Turn-Off Time Input/Output Characteristics TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. CONDITIONS 200mVP-P Differential (+OUT, –OUT) 200mVP-P Differential (+OUT, –OUT) 200mVP-P Differential (+OUT, –OUT) 3.2VP-P Differential (+OUT, –OUT) 1% Settling for a 1VP-P Differential Step (+OUT, –OUT) MIN 500 TYP 900 50 100 1100 4 40 250 MAX UNITS MHz MHz MHz V/µs ns ns ns 19934fa 3 LT1993-4 AC ELECTRICAL CHARACTERISTICS SYMBOL –3dBBWCM SRCM 1kHz Signal Second/Third Harmonic Distortion 2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 2VP-P Differential (+OUT, –OUT) 2VP-P Differential (+OUT, –OUT), RL = 100Ω 3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 3.2VP-P Differential (+OUT, –OUT) 3.2VP-P Differential (+OUT, –OUT), RL = 100Ω Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz 2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 0.95kHz, f2 = 1.05kHz 3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz Differential (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz –100 –100 –100 –91 –91 –91 –102 –102 –93 54 2.15 22.7 2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 2VP-P Differential (+OUT, –OUT) 2VP-P Differential (+OUT, –OUT), RL = 100Ω 3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 3.2VP-P Differential (+OUT, –OUT) 3.2VP-P Differential (+OUT, –OUT), RL = 100Ω Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz 2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 9.5MHz, f2 = 10.5MHz 3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz Differential (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz Measured Using DC800A Demo Board –94 –94 –86 –85 –85 –77 –96 –96 –87 51 13.7 2.15 22.6 2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 2VP-P Differential (+OUT, –OUT) 2VP-P Differential (+OUT, –OUT), RL = 100Ω –80 –78 –75 dBc dBc dBc dBc dBc dBc dBc dBc dBc dBm nV/√Hz dBm dBc dBc dBc dBc dBc dBc dBc dBc dBc dBm dB nV/√Hz dBm dBc dBc dBc 19934fa TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. PARAMETER Common Mode Small-Signal –3dB Bandwidth Common Mode Slew Rate CONDITIONS 0.1VP-P at VOCM, Measured Single-Ended at +OUT and –OUT 1.2V to 3.6V Step at VOCM MIN TYP 300 500 MAX UNITS MHz V/µs Common Mode Voltage Control (VOCM Pin) Noise/Harmonic Performance Input/output Characteristics OIP31k en1k 10MHz Signal Output Third-Order Intercept Input Referred Noise Voltage Density 1dB Compression Point Second/Third Harmonic Distortion OIP310M NF en10M 50MHz Signal Output Third-Order Intercept Noise Figure Input Referred Noise Voltage Density 1dB Compression Point Second/Third Harmonic Distortion 4 LT1993-4 AC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted. CONDITIONS 3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 3.2VP-P Differential (+OUT, –OUT) 3.2VP-P Differential (+OUT, –OUT), RL = 100Ω Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz 2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 49.5MHz, f2 = 50.5MHz 3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz Differential (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz Measured Using DC800A Demo Board MIN TYP –71 –69 –66 –81 –80 –72 43 14.1 2.25 19.7 2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 2VP-P Differential (+OUT, –OUT) 2VP-P Differential (+OUT, –OUT), RL = 100Ω Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 69.5MHz, f2 = 70.5MHz 2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 69.5MHz, f2 = 70.5MHz Differential (+OUTFILTERED, –OUTFILTERED), f1 = 69.5MHz, f2 = 70.5MHz Measured Using DC800A Demo Board –73 –71 –70 –74 –71 40 14.5 2.35 18.5 2VP-P Differential (+OUTFILTERED, –OUTFILTERED) 2VP-P Differential (+OUT, –OUT) 2VP-P Differential (+OUT, –OUT), RL = 100Ω Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 99.5MHz, f2 = 100.5MHz 2VP-P Differential Composite (+OUT, –OUT), RL = 100Ω, f1 = 99.5MHz, f2 = 100.5MHz Differential (+OUTFILTERED, –OUTFILTERED), f1 = 99.5MHz, f2 = 100.5MHz Measured Using DC800A Demo Board –61 –63 –62 –61 –63 33.5 15.1 2.55 17.8 MAX UNITS dBc dBc dBc dBc dBc dBc dBm dB nV/√Hz dBm dBc dBc dBc dBc dBc dBm dB nV/√Hz dBm dBc dBc dBc dBc dBc dBm dB nV/√Hz dBm OIP350M NF en50M 70MHz Signal Output Third-Order Intercept Noise Figure Input Referred Noise Voltage Density 1dB Compression Point Second/Third Harmonic Distortion OIP370M NF en70M 100MHz Signal Output Third-Order Intercept Noise Figure Input Referred Noise Voltage Density 1dB Compression Point Second/Third Harmonic Distortion OIP3100M NF en100M Output Third-Order Intercept Noise Figure Input Referred Noise Voltage Density 1dB Compression Point Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: As long as output current and junction temperature are kept below the Absolute Maximum Ratings, no damage to the part will occur. Note 3: The LT1993C-4 is guaranteed functional over the operating temperature range of –40°C to 85°C. Note 4: The LT1993C-4 is guaranteed to meet specified performance from 0°C to 70°C. It is designed, characterized and expected to meet specified performance from –40°C and 85°C but is not tested or QA sampled at these temperatures. The LT1993I-4 is guaranteed to meet specified performance from –40°C to 85°C. Note 5: This parameter is pulse tested. Note 6: This parameter is guaranteed to meet specified performance through design and characterization. It has not been tested. 19934fa 5 LT1993-4 TYPICAL PERFOR A CE CHARACTERISTICS Frequency Response RLOAD = 400Ω 18 15 12 GAIN (dB) GAIN (dB) 9 6 3 VIN = 50mVP-P 0 UNFILTERED: RLOAD = 400Ω FILTERED: RLOAD = 350Ω –3 (EXTERNAL) + 50Ω (INTERNAL FILTERED OUTPUTS) –6 1 100 1000 10 FREQUENCY (MHz) FILTERED OUTPUTS UNFILTERED OUTPUTS 27 24 21 5pF 1.8pF 15 0pF 12 9 6 3 10000 19934 G01 GAIN (dB) Third Order Intermodulation Distortion vs Frequency Differential Input, No RLOAD –10 –20 –30 THIRD ORDER IMD (dBc) –40 –50 –60 –70 –80 –90 –100 –110 0 20 80 60 40 100 FREQUENCY (MHz) 120 140 UNFILTERED OUTPUTS FILTERED OUTPUTS 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING THIRD ORDER IMD (dBc) –10 –20 –30 THIRD ORDER IMD (dBc) Output Third Order Intercept vs Frequency, Differential Input No RLOAD 60 55 50 OUTPUT IP3 (dBm) OUTPUT IP3 (dBm) 45 40 35 30 25 20 0 20 40 80 100 60 FREQUENCY (MHz) 120 140 FILTERED OUTPUTS UNFILTERED OUTPUTS 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING 60 55 50 OUTPUT IP3 (dBm) 6 UW Frequency Response vs CLOAD RLOAD = 400Ω VIN = 50mVP-P UNFILTERED OUTPUTS 10pF 18 15 12 9 6 3 Frequency Response RLOAD = 100Ω UNFILTERED OUTPUTS 18 FILTERED OUTPUTS 1 10 100 1000 FREQUENCY (MHz) 10000 19934 G02 VIN = 50mVP-P 0 UNFILTERED: RLOAD = 100Ω FILTERED: RLOAD = 50Ω –3 (EXTERNAL) + 50Ω (INTERNAL FILTERED OUTPUTS) –6 1 100 1000 10 FREQUENCY (MHz) 10000 19934 G03 Third Order Intermodulation Distortion vs Frequency Differential Input, RLOAD = 400Ω –10 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING –20 –30 FILTERED OUTPUTS –40 –50 –60 –70 –80 –90 –100 –110 0 20 80 60 40 100 FREQUENCY (MHz) 120 140 Third Order Intermodulation Distortion vs Frequency Differential Input, RLOAD = 100Ω 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING FILTERED OUTPUTS –40 –50 –60 –70 –80 –90 UNFILTERED OUTPUTS UNFILTERED OUTPUTS –100 –110 0 20 80 60 40 100 FREQUENCY (MHz) 120 140 19934 G04 19934 G05 19934 G06 Output Third Order Intercept vs Frequency, Differential Input RLOAD = 400Ω 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING 60 55 50 UNFILTERED OUTPUTS 45 40 35 30 FILTERED OUTPUTS 0 20 40 80 100 60 FREQUENCY (MHz) 120 140 25 20 Output Third Order Intercept vs Frequency, Differential Input RLOAD = 100Ω 2 TONES, 2VP-P COMPOSITE 1MHz TONE SPACING 45 40 35 30 25 20 UNFILTERED OUTPUTS FILTERED OUTPUTS 0 20 40 80 100 60 FREQUENCY (MHz) 120 140 19334 G07 19334 G08 19334 G09 19934fa LT1993-4 TYPICAL PERFOR A CE CHARACTERISTICS Distortion (Filtered) vs Frequency Differential Input, No RLOAD –10 FILTERED OUTPUTS –20 VOUT = 2VP-P –30 DISTORTION (dBc) DISTORTION (dBc) –40 –50 –60 –70 –80 –90 –100 –110 1 10 100 FREQUENCY (MHz) 1000 19934 G10 HD3 HD2 –50 –60 –70 –80 –90 –100 –110 1 10 100 FREQUENCY (MHz) HD3 DISTORTION (dBc) Output 1dB Compression vs Frequency 30 OUTPUT 1dB COMPRESSION (dBm) 25 20 15 10 5 0 5 –5 –10 1 10 100 FREQUENCY (MHz) 1000 19934 G13 RLOAD = 400Ω RLOAD = 100Ω INPUT REFERRED NOISE VOLTAGE (nV/√Hz) UNFILTERED OUTPUTS NOISE FIGURE (dB) Reverse Isolation vs Frequency INPUT IMPEDANCE (MAGNITUDE Ω, PHASE°) –40 –50 –60 ISOLATION (dB) –70 –80 –90 –100 –110 1 10 100 1000 FREQUENCY (MHz) 10000 19934 G16 UNFILTERED OUTPUTS IMPEDANCE MAGNITUDE 75 50 25 0 –25 –50 –75 IMPEDANCE PHASE OUTPUT IMPEDANCE (Ω) UW Distortion (Unfiltered) vs Frequency, Differential Input, No RLOAD –10 UNFILTERED OUTPUTS –20 VOUT = 2VP-P –30 –40 –50 –55 –60 –65 –70 –75 –80 –85 –90 –95 1000 19934 G11 Distortion vs Output Amplitude 70MHz Differential Input No RLOAD HD3 UNFILTERED OUTPUTS HD3 FILTERED OUTPUTS HD2 UNFILTERED OUTPUTS HD2 FILTERED OUTPUTS –1 1 5 7 9 3 OUTPUT AMPLITUDE (dBm) 11 19934 G12 HD2 –100 Noise Figure vs Frequency 25 VCC = 5V MEASURED USING DC800A DEMO BOARD 6 5 4 3 2 1 0 10 100 FREQUENCY (MHz) 1000 ''!" /" Input Referred Noise Voltage vs Frequency 20 15 10 0 10 100 FREQUENCY (MHz) 1000 19934 G15 Differential Input Impedance vs Frequency 150 125 100 100 Differential Output Impedance vs Frequency UNFILTERED OUTPUTS 10 1 –100 1 10 100 FREQUENCY (MHz) 1000 ''!" /% 0.1 1 10 100 FREQUENCY (MHz) 1000 ''!" /& 19934fa 7 LT1993-4 TYPICAL PERFOR A CE CHARACTERISTICS Input Reflection Coefficient vs Frequency 0 INPUT REFLECTION COEFFICIENT (S11) –5 –10 –15 –20 –25 –30 –35 –40 –45 –50 10 100 FREQUENCY (MHz) 1000 19934 G19 OUTPUT REFLECTION COEFFICIENT (S22) MEASURED USING DC800A DEMO BOARD PSRR, CMRR (dB) Small-Signal Transient Response 2.28 2.26 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.24 2.22 2.20 2.18 2.16 2.14 2.12 0 5 10 15 20 25 30 35 40 45 50 TIME (ns) 19934 G22 RLOAD = 100Ω PER OUTPUT OUTPUT VOLTAGE (V) Distortion vs Output Common Mode Voltage, LT1993-4 Driving LTC2249 14-Bit ADC –64 –66 DISTORTION (dBc) –68 –70 HD3 –72 –74 –76 1.2 HD2 0 –2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 OUTPUT COMMON MODE VOLTAGE (V) 19934 G25 FILTERED OUTPUTS, NO RLOAD VOUT = 70MHz 2VP-P VOLTAGE (V) 0 4 2 VOLTAGE (V) 8 UW Output Reflection Coefficient vs Frequency 0 –5 –10 –15 –20 –25 –30 –35 –40 –45 –50 10 100 FREQUENCY (MHz) 1000 19934 G20 PSRR, CMRR vs Frequency 100 90 80 70 60 50 40 30 20 10 0 1 10 100 FREQUENCY (MHz) 1000 19934 G21 MEASURED USING DC800A DEMO BOARD UNFILTERED OUTPUTS CMRR PSRR Large-Signal Transient Response 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 0 5 10 15 20 25 30 35 40 45 50 TIME (ns) 19934 G23 Overdrive Recovery Time 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 25 50 75 100 125 150 175 200 225 250 TIME (ns) ''!" / " RLOAD = 100Ω PER OUTPUT +OUT RLOAD = 100Ω PER OUTPUT –OUT Turn-On Time 4 +OUT 3 2 –OUT 1 RLOAD = 100Ω PER OUTPUT 1 0 4 2 ENABLE 0 –2 0 125 250 375 TIME (ns) 500 625 ''!" / $ Turn-Off Time 4 +OUT 3 2 –OUT ENABLE RLOAD = 100Ω PER OUTPUT 0 125 250 375 TIME (ns) 500 625 ''!" / % 19934fa LT1993-4 TYPICAL PERFOR A CE CHARACTERISTICS 30MHz 8192 Point FFT, LT1993-4 Driving LTC2249 14-Bit ADC 0 –10 –20 –30 AMPLITUDE (dBFS) AMPLITUDE (dBFS) –40 –50 –60 –70 –80 –90 –100 –110 –120 0 5 10 15 20 25 30 FREQUENCY (MHz) 35 40 8192 POINT FFT fIN = 30MHz, –1dBFS FILTERED OUTPUTS 0 –10 –20 –30 AMPLITUDE (dBFS) –40 –50 –60 –70 –80 –90 –100 –110 –120 0 5 10 15 20 25 30 FREQUENCY (MHz) 35 40 8192 POINT FFT fIN = 50MHz, –1dBFS FILTERED OUTPUTS 70MHz 2-Tone 32768 Point FFT LT1993-4 Driving LTC2249 14-Bit ADC 0 –10 –20 –30 AMPLITUDE (dBFS) –40 –50 –60 –70 –80 –90 –100 –110 –120 0 5 10 15 20 25 30 FREQUENCY (MHz) 35 40 32768 POINT FFT TONE 1 AT 69.5MHz, –7dBFS TONE 2 AT 70.5MHz, –7dBFS FILTERED OUTPUTS AMPLITUDE (dBFS) 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 AMPLITUDE (dBFS) PI FU CTIO S VOCM (Pin 2): This pin sets the output common mode voltage. Without additional biasing, both inputs bias to this voltage as well. This input is high impedance. VCCA, VCCB, VCCC (Pins 3, 10, 1): Positive Power Supply (Normally Tied to 5V). All three pins must be tied to the same voltage. Bypass each pin with 1000pF and 0.1µF capacitors as close to the package as possible. Split supplies are possible as long as the voltage between VCC and VEE is 5V. VEEA, VEEB, VEEC (Pins 4, 9, 12): Negative Power Supply (Normally Tied to Ground). All three pins must be tied to the same voltage. Split supplies are possible as long as the voltage between VCC and VEE is 5V. If these pins are not tied to ground, bypass each pin with 1000pF and 0.1µF capacitors as close to the package as possible. +OUT, –OUT (Pins 5, 8): Outputs (Unfiltered). These pins are high bandwidth, low-impedance outputs. The DC output voltage at these pins is set to the voltage applied at VOCM. 19934fa UW 50MHz 8192 Point FFT, LT1993-4 Driving LTC2249 14-Bit ADC 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 70MHz 8192 Point FFT, LT1993-4 Driving LTC2249 14-Bit ADC 8192 POINT FFT fIN = 70MHz, –1dBFS FILTERED OUTPUTS 0 5 10 15 20 25 30 FREQUENCY (MHz) 35 40 19934 G28 19934 G29 19934 G30 2-Tone WCDMA Waveform LT1993-4 Driving LTC2255 14-Bit ADC at 92.16Msps 0 32768 POINT FFT TONE CENTER FREQUENCIES AT 67.5MHz, 72.5MHz –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 0 5 10 15 20 25 30 35 FREQUENCY (MHz) 40 45 –120 4-Tone WCDMA Waveform LT1993-4 Driving LTC2255 14-Bit ADC at 92.16Msps 32768 POINT FFT TONE CENTER FREQUENCIES AT 62.5MHz, 67.5MHz, 72.5MHz, 77.5MHz 0 5 10 15 20 25 30 35 FREQUENCY (MHz) 40 45 19934 G31 19934 G32 19934 G33 U U U 9 LT1993-4 PI FU CTIO S +OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered Outputs. These pins add a series 25Ω resistor from the unfiltered outputs and three 12pF capacitors. Each output has 12pF to VEE, plus an additional 12pF between each pin (See the Block Diagram). This filter has a –3dB bandwidth of 175MHz. ENABLE (Pin 11): This pin is a TTL logic input referenced to the VEEC pin. If low, the LT1993-4 is enabled and draws typically 100mA of supply current. If high, the LT1993-4 is disabled and draws typically 250µA. –INA, –INB (Pins 14, 13): Negative Inputs. These pins are normally tied together. These inputs may be DC- or ACcoupled. If the inputs are AC-coupled, they will self-bias to the voltage applied to the VOCM pin. +INA, +INB (Pins 16, 15): Positive Inputs. These pins are normally tied together. These inputs may be DC- or ACcoupled. If the inputs are AC-coupled, they will self-bias to the voltage applied to the VOCM pin. Exposed Pad (Pin 17): Tie the pad to VEEC (Pin 12). If split supplies are used, DO NOT tie the pad to ground. BLOCK DIAGRA –INA 14 –INB 13 +INA 16 +INB 15 10 W U U U 200Ω 100Ω VCCA 12pF VEEA – A 5 +OUT +OUTFILTERED VEEA 25Ω VCCC 6 VOCM 100Ω + 200Ω + C 12pF 2 – 200Ω 100Ω VCCB VEEC 25Ω –OUTFILTERED 7 –OUT B 8 12pF VEEB + – VEEB 200Ω 100Ω BIAS 3 VCCA 10 VCCB 1 VCCC 11 ENABLE 4 VEEA 9 VEEB 12 VEEC 19934 BD 19934fa LT1993-4 APPLICATIO S I FOR ATIO Circuit Description The LT1993-4 is a low noise, low distortion differential amplifier/ADC driver with: • DC to 900MHz –3dB bandwidth • Fixed gain of 4V/V (12dB) independent of RLOAD • 100Ω differential input impedance • Low output impedance • Built-in, user adjustable output filtering • Requires minimal support circuitry Referring to the block diagram, the LT1993-4 uses a closedloop topology which incorporates 3 internal amplifiers. Two of the amplifiers (A and B) are identical and drive the differential outputs. The third amplifier (C) is used to set the output common mode voltage. Gain and input impedance are set by the 100Ω/200Ω resistors in the internal feedback network. Output impedance is low, determined by the inherent output impedance of amplifiers A and B, and further reduced by internal feedback. The LT1993-4 also includes built-in single-pole output filtering. The user has the choice of using the unfiltered outputs, the filtered outputs (175MHz –3dB lowpass), or modifying the filtered outputs to alter frequency response by adding additional components. Many lowpass and bandpass filters are easily implemented with just one or two additional components. The LT1993-4 has been designed to minimize the need for external support components such as transformers or AC-coupling capacitors. As an ADC driver, the LT1993-4 requires no external components except for power-supply bypass capacitors. This allows DC-coupled operation for applications that have frequency ranges including DC. At the outputs, the common mode voltage is set via the VOCM pin, allowing the LT1993-4 to drive ADCs directly. No output AC-coupling capacitors or transformers are needed. At the inputs, signals can be differential or single-ended with virtually no difference in performance. Furthermore, DC levels at the inputs can be set independently of the output common mode voltage. These input characteristics often eliminate the need for an input transformer and/or AC-coupling capacitors. U Input Impedance and Matching Networks Because of the internal feedback network, calculation of the LT1993-4’s input impedance is not straightforward from examination of the block diagram. Furthermore, the input impedance when driven differentially is different than when driven single-ended. When driven differentially, the LT1993-4’s input impedance is 100Ω (differential); when driven single-ended, the input impedance is 75Ω. For single-ended 50Ω applications, a 150Ω shunt matching resistor to ground will result in the proper input termination (Figure 1). For differential inputs there are several termination options. If the input source is 50Ω differential, then input matching can be accomplished by either a 100Ω shunt resistor across the inputs (Figure 3), or a 49.9Ω shunt resistor on each of the inputs to ground (Figure 2). 13 14 –INB –INA –OUT LT1993-4 IF IN 15 16 +INB +INA +OUT 8 5 19934 F01 W U U Figure 1. Input Termination for Single-Ended 50Ω Input Impedance 13 IF IN– 14 –INB –INA –OUT LT1993-4 8 15 IF IN+ 16 +INB +INA +OUT 5 19934 F02 Figure 2. Input Termination for Differential 50Ω Input Impedance 13 IF IN– 14 –INB –INA –OUT LT1993-4 8 15 IF IN+ 16 +INB +INA +OUT 5 19934 F03 Figure 3. Alternate Input Termination for Differential 50Ω Input Impedance 19934fa 11 LT1993-4 APPLICATIO S I FOR ATIO Single-Ended to Differential Operation The LT1993-4’s performance with single-ended inputs is comparable to its performance with differential inputs. This excellent single-ended performance is largely due to the internal topology of the LT1993-4. Referring to the block diagram, if the +INA and +INB pins are driven with a single-ended signal (while –INA and –INB are tied to AC ground), then the +OUT and –OUT pins are driven differentially without any voltage swing needed from amplifier C. Single-ended to differential conversion using more conventional topologies suffers from performance limitations due to the common mode amplifier. Driving ADCs The LT1993-4 has been specifically designed to interface directly with high speed Analog to Digital Converters (ADCs). In general, these ADCs have differential inputs, with an input impedance of 1k or higher. In addition, there is generally some form of lowpass or bandpass filtering just prior to the ADC to limit input noise at the ADC, thereby improving system signal to noise ratio. Both the unfiltered and filtered outputs of the LT1993-4 can easily drive the high impedance inputs of these differential ADCs. If the filtered outputs are used, then cutoff frequency and the type of filter can be tailored for the specific application if needed. Wideband Applications (Using the +OUT and –OUT Pins) In applications where the full bandwidth of the LT1993-4 is desired, the unfiltered output pins (+OUT and –OUT) should be used. They have a low output impedance; therefore, gain is unaffected by output load. Capacitance in excess of 5pF placed directly on the unfiltered outputs results in additional peaking and reduced performance. When driving an ADC directly, a small series resistance is recommended between the LT1993-4’s outputs and the ADC inputs (Figure 4). This resistance helps eliminate any resonances associated with bond wire inductances of either the ADC inputs or the LT1993-4’s outputs. A value between 10Ω and 25Ω gives excellent results. –OUT LT1993-4 10Ω TO 25Ω +OUT 5 8 10Ω TO 25Ω 12 U ADC 19934 F04 W U U Figure 4. Adding Small Series R at LT1993-4 Output Filtered Applications (Using the +OUTFILTERED and –OUTFILTERED Pins) Filtering at the output of the LT1993-4 is often desired to provide either anti-aliasing or improved signal to noise ratio. To simplify this filtering, the LT1993-4 includes an additional pair of differential outputs (+OUTFILTERED and –OUTFILTERED) which incorporate an internal lowpass filter network with a –3dB bandwidth of 175MHz (Figure 5). These pins each have an output impedance of 25Ω. Internal capacitances are 12pF to VEE on each filtered output, plus an additional 12pF capacitor connected differentially between the two filtered outputs. This resistor/capacitor combination creates filtered outputs that look like a series 25Ω resistor with a 36pF capacitor shunting each filtered output to AC ground, giving a –3dB bandwidth of 175MHz. LT1993-4 VEE 259 259 12pF VEE 5 +OUT 19934 F05 8 –OUT 12pF 7 –OUTFILTERED 12pF 6 +OUTFILTERED FILTERED OUTPUT (175MHz) Figure 5. LT1993-4 Internal Filter Topology –3dB BW ≈175MHz The filter cutoff frequency is easily modified with just a few external components. To increase the cutoff frequency, simply add 2 equal value resistors, one between +OUT and +OUTFILTERED and the other between –OUT and –OUTFILTERED (Figure 6). These resistors are in parallel with the internal 25Ω resistor, lowering the overall resistance and increasing filter bandwidth. To double the filter bandwidth, for example, add two external 25Ω resistors to lower the series resistance to 12.5Ω. The 36pF of capacitance remains unchanged, so filter bandwidth doubles. 19934fa LT1993-4 APPLICATIO S I FOR ATIO LT1993-4 VEE 25Ω 12pF 7 –OUTFILTERED 12pF 25Ω 12pF VEE 5 +OUT 19934 F06 8 –OUT FILTERED OUTPUT (350MHz) 6 +OUTFILTERED 259 12pF Figure 6. LT1993-4 Internal Filter Topology Modified for 2x Filter Bandwidth (2 External Resistors) To decrease filter bandwidth, add two external capacitors, one from +OUTFILTERED to ground, and the other from –OUTFILTERED to ground. A single differential capacitor connected between +OUTFILTERED and –OUTFILTERED can also be used, but since it is being driven differentially it will appear at each filtered output as a single-ended capacitance of twice the value. To halve the filter bandwidth, for example, two 36pF capacitors could be added (one from each filtered output to ground). Alternatively one 18pF capacitor could be added between the filtered outputs, again halving the filter bandwidth. Combinations of capacitors could be used as well; a three capacitor solution of 12pF from each filtered output to ground plus a 12pF capacitor between the filtered outputs would also halve the filter bandwidth (Figure 7). LT1993-4 VEE 259 12pF 7 –OUTFILTERED 12pF 259 12pF VEE 5 +OUT 19934 F07 8 –OUT 12pF FILTERED OUTPUT (87.5MHz) 12pF 6 +OUTFILTERED 12pF Figure 7. LT1993-4 Internal Filter Topology Modified for 1/2x Filter Bandwidth (3 External Capacitors) Bandpass filtering is also easily implemented with just a few external components. An additional 120pF and 39nH, each added differentially between +OUTFILTERED and –OUTFILTERED creates a bandpass filter with a 71MHz center frequency, –3dB points of 55MHz and 87MHz, and 1.6dB of insertion loss (Figure 8). U LT1993-4 VEE 259 12pF 7 –OUTFILTERED FILTERED OUTPUT 120pF (71MHz BANDPASS, –3dB @ 55MHz/87MHz) 8 –OUT 12pF 39nH 6 +OUTFILTERED VEE 5 +OUT 19934 F08 W U U Figure 8. LT1993-4 Output Filter Topology Modified for Bandpass Filtering (1 External Inductor, 1 External Capacitor) Output Common Mode Adjustment The LT1993-4’s output common mode voltage is set by the VOCM pin. It is a high-impedance input, capable of setting the output common mode voltage anywhere in a range from 1.1V to 3.6V. Bandwidth of the VOCM pin is typically 300MHz, so for applications where the VOCM pin is tied to a DC bias voltage, a 0.1µF capacitor at this pin is recommended. For best distortion performance, the voltage at the VOCM pin should be between 1.8V and 2.6V. When interfacing with most ADCs, there is generally a VOCM output pin that is at about half of the supply voltage of the ADC. For 5V ADCs such as the LTC17XX family, this VOCM output pin should be connected directly (with the addition of a 0.1µF capacitor) to the input VOCM pin of the LT1993-4. For 3V ADCs such as the LTC22XX families, the LT19934 will function properly using the 1.65V from the ADC’s VCM reference pin, but improved Spurious Free Dynamic Range (SFDR) and distortion performance can be achieved by level-shifting the LTC22XX’s VCM reference voltage up to at least 1.8V. This can be accomplished as shown in Figure 9 by using a resistor divider between the LTC22XX’s VCM output pin and VCC and then bypassing the LT1993-4’s VOCM pin with a 0.1µF capacitor. For a common mode voltage above 1.9V, AC coupling capacitors are recommended between the LT1993-4 and the LTC22XX ADC because of the input voltage range constraints of the ADC. 19934fa 13 LT1993-4 APPLICATIO S I FOR ATIO 3V 11k 1.9V 4.02k 13 14 –INB –INA 2 VOCM +OUTFILTERED LT1993-4 15 IF IN 16 –OUTFILTERED +INB +INA 19934 F09 31 1.5V 6 1 VCM AIN+ LTC22xx 7 2 AIN– Figure 9. Level Shifting 3V ADC VCM Voltage for Improved SFDR Large Output Voltage Swings The LT1993-4 has been designed to provide the 3.2VP-P output swing needed by the LTC1748 family of 14-bit low-noise ADCs. This additional output swing improves system SNR by up to 4dB. Typical performance curves and AC specifications have been included for these applications. Input Bias Voltage and Bias Current The input pins of the LT1993-4 are internally biased to the voltage applied to the VOCM pin. No external biasing resistors are needed, even for AC-coupled operation. The PACKAGE DESCRIPTIO UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) BOTTOM VIEW—EXPOSED PAD 3.00 ± 0.10 (4 SIDES) 0.70 ± 0.05 PIN 1 TOP MARK (NOTE 6) 1.45 ± 0.10 (4-SIDES) 0.75 ± 0.05 R = 0.115 TYP 15 16 0.40 ± 0.10 1 2 PIN 1 NOTCH R = 0.20 TYP OR 0.25 × 45° CHAMFER 3.50 ± 0.05 1.45 ± 0.05 2.10 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 0.200 REF 0.00 – 0.05 14 U input bias current is determined by the voltage difference between the input common mode voltage and the VOCM pin (which sets the output common mode voltage). At both the positive and negative inputs, any voltage difference is imposed across 100Ω, generating an input bias current. For example, if the inputs are tied to 2.5V with the VOCM pin at 2.2V, then a total input bias current of 3mA will flow into the LT1993-4’s +INA and +INB pins. Furthermore, an additional input bias current totaling 3mA will flow into the –INA and –INB inputs. Application (Demo) Boards The DC800A Demo Board has been created for stand-alone evaluation of the LT1993-4 with either single-ended or differential input and output signals. As shown, it accepts a single-ended input and produces a single-ended output so that the LT1993-4 can be evaluated using standard laboratory test equipment. For more information on this Demo Board, please refer to the Demo Board section of this datasheet. There are also additional demo boards available that combine the LT1993-4 with a variety of different Linear Technology ADCs. Please contact the factory for more information on these demo boards. (UD16) QFN 0904 U W U U 0.25 ± 0.05 0.50 BSC 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 19934fa LT1993-4 TYPICAL APPLICATIO U 19934fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1993-4 TYPICAL APPLICATIO R18 0W GND TP1 ENABLE 1 R2 0W R4 50W C2 0.1mF 1 T1 5 1:1 Z-RATIO 1 2 1 J2 +IN 0dB 4 MA/COM ETC1-1-13 3 2 R5 0W 2 14 0dB 15 +INB 12 R6 0W 13 VEEC –INB 11 ENABLE 10 9 –OUT R10 8 24.9W R8 [1] R7 [1] L1 [1] 2 1 C4 0.1mF 1 2 T2 3 4:1 Z-RATIO 4 C8 [1] C3 0.1mF 1 2 1 2 C16 [1] 2 1 C22 0.1mF R13 [1] 1 2 C11 [1] R14 0W 1 SW1 2 VCC 3 R16 0W J1 –IN C21 0.1mF • C11 0.1mF 1 2 +OUTFILTERED 6 1 R11 75W 16 R1 [1] R3 50W +INA VCCC 1 VOCM 2 VCCA 3 +OUT VEEA 4 R9 5 24.9W 5 MINI0dB CIRCUITS TCM 4-19 • VCC C10 0.01mF 2 1 VCC R19 14k J3 VOCM R20 11k J6 TEST IN 5 T3 1:4 1 2 C19 0.1mF 1 2 • 1 2 4 TP2 VCC 1 2 1 TP3 GND 1 3 MINICIRCUITS TCM 4-19 VCC 1 1 2 5 MINICIRCUITS TCM 4-19 C14 4.7mF 2 1 C15 1mF NOTES: UNLESS OTHERWISE SPECIFIED, [1] DO NOT STUFF. • RELATED PARTS PART NUMBER LT1993-2 LT1993-10 LT5514 LT6600-2.5 LT6600-5 LT6600-10 LT6600-20 DESCRIPTION 800MHz Differential Amplifier/ADC Driver 700MHz Differential Amplifier/ADC Driver Ultralow Distortion IF Amplifier/ADC Driver Very Low Noise Differential Amplifier and 2.5MHz Lowpass Filter Very Low Noise Differential Amplifier and 5MHz Lowpass Filter Very Low Noise Differential Amplifier and 10MHz Lowpass Filter Very Low Noise Differential Amplifier and 20MHz Lowpass Filter COMMENTS Av = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz Av = 10V/V, NF = 12.7dB, OIP3 = 40dBm at 70MHz Digitally Controlled Gain Output IP3 47dBm at 100MHz 86dB S/N with 3V Supply, SO-8 Package 82dB S/N with 3V Supply, SO-8 Package 82dB S/N with 3V Supply, SO-8 Package 76dB S/N with 3V Supply, SO-8 Package 16 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005 U Demo Circuit DC800A Schematic (AC Test Circuit) R17 0W VCC VCC 2 1 2 1 C17 1000pF C18 0.01mF VCCB VEEB R12 75W –INA –OUTFILTERED LT1993-4 7 J4 –OUT +10.8dB R15 [1] +6dB 2 J5 +OUT VCC 2 1 C9 2 1000pF 1 2 1 C12 1000pF C13 0.01mF 2 1 C7 0.01mF C5 0.1mF 1 R21 [1] C6 0.1mF 2 R22 [1] C20 0.1mF 3 2 T4 4:1 4 J7 TEST OUT 19934 TA03 • • • • 19934fa LT/LT 1005 REV A • PRINTED IN USA