LT3686EDDPBF

LT3686 37V/1.2A Step-Down Regulator in 3mm × 3mm DFN FeAtures n Description The LT®3686 is a current mode PWM step-down DC/DC converter with an internal 1.2A power switch, packaged in 10-lead 3mm × 3mm DFN. The wide input range of 3.6V to 37V makes the LT3686 suitable for regulating power from a wide variety of sources, including 24V industrial supplies and automotive batteries. Its high maximum frequency allows the use of tiny inductors and capacitors, resulting in a very small solution. Operating frequency above the AM band avoids interfering with radio reception, making the LT3686 particularly suitable for automotive applications. Cycle-by-cycle current limit and DA current sense provide protection against fault conditions. Soft-start and frequency foldback eliminate input current surge during start-up. An optional internal regulated active load at the output via the BD pin keeps the LT3686 at full switching frequency at light loads, resulting in low, predictable output ripple above the audio and AM bands. Internal compensation and an internal boost diode reduce external component count. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n n n n n n n n n n Wide Input Range: Operation from 3.6V to 37V Overvoltage Lockout Protects Circuit Through 55V Transients Low Minimum On-Time: Converts 16VIN to 3.3VOUT at 2MHz 1.2A Output Current Adjustable Frequency: 300kHz to 2.5MHz Constant Switching Frequency at Light Loads Tracking and Soft-Start Precision UVLO Short-Circuit Robust IQ in Shutdown 0.8V 90 80 70 EFFICIENCY (%) 60 MODE < 0.4V IOUT (A) 50 40 30 20 10 0 0 200 VIN = 12V VOUT = 5V L = 10µH f = 2MHz 800 1000 600 400 LOAD CURRENT (mA) 1200 MODE > 0.8V TA = 25°C unless otherwise noted. 5VOUT Efficiency 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.3VOUT Maximum Load Current TYPICAL MINIMUM VOUT = 3.3V L = 6.8µH f = 2MHz 0 10 20 VIN (V) 30 40 3686 G03 3686 G01 3686 G02 2.0 1.8 1.6 1.4 IOUT (A) 1.2 1.0 0.8 0.6 0.4 0.2 0 5VOUT Maximum Load Current TYPICAL Switch Voltage Drop 900 800 700 3.5 4.0 Internal Undervoltage Lockout (UVLO) MINIMUM VSW (mV) 600 VIN (V) 150°C 125°C 25°C –50°C 0 500 1000 1500 ISW (mA) 2000 2500 3686 G05 500 400 300 3.0 VOUT = 5V L = 10µH f = 2MHz 10 20 VIN (V) 30 40 3686 G04 200 100 0 2.5 2.0 –50 0 50 100 TEMPERATURE (°C) 150 3686 G06 Overvoltage Lockout (OVLO) 40 820 VFB vs Temperature 39 810 VFB (mV) 0 50 100 TEMPERATURE (°C) 150 3686 G07 VIN (V) 38 800 37 36 790 35 –50 780 –50 0 50 100 TEMPERATURE (°C) 150 3686 G08 3686fa  LT3686 typicAl perForMAnce chArActeristics 300 250 FREQUENCY (MHz) 200 RT (k ) 150 100 50 0 TA = 25°C unless otherwise noted. Soft-Start/Track vs Frequency (1MHz) 1200 1000 FREQUENCY (kHz) 800 600 400 200 0 Switching Frequency vs RT Switching Frequency vs Temperature 2.20 2.15 2.10 2.05 2.00 1.95 1.90 –50 RT = 15.4k 0 0.5 1 1.5 FREQUENCY (MHz) 2 2.5 3686 G09 0 50 100 TEMPERATURE (°C) 150 3686 G10 0 500 1000 1500 SS (mV) 2000 2500 3686 G11 900 800 700 Soft-Start/Track vs VFB EN/UVLO Pin Current 45 40 35 EN/UVLO (µA) 30 25 20 15 10 5 CURRENT LIMIT (A) 2.5 3.0 Switch Current Limit vs Temperature 600 FB (mV) 500 400 300 200 100 0 0 200 400 600 800 SS (mV) 1000 1200 2.0 1.5 0 0 10 20 30 EN/UVLO (V) 40 50 3686 G13 1.0 –50 0 50 100 TEMPERATURE (°C) 150 3686 G14 3686 G12 Current Limit vs Duty Cycle 3.0 2.5 CURRENT LIMIT (A) SWITCH PEAK 2.0 VIN (V) 15 1.5 1.0 0.5 0 DA VALLEY 25 3.3VOUT Maximum VIN for Full Frequency (2MHz) 35 MODE > 0.8 30 25 VIN (V) 20 15 10 5 VOUT = 3.3V L = 6.8µH f = 2MHz 0 500 1000 LOAD CURRENT (mA) 1500 3686 G16 5VOUT Maximum VIN for Full Frequency (2MHz) MODE > 0.8 20 MODE < 0.4 MODE < 0.4 10 5 0 0 0 25 50 75 DUTY CYCLE (%) 100 3686 G15 0 VOUT = 5V L = 10µH f = 2MHz 1000 500 LOAD CURRENT (mA) 3686 G17 3686fa  LT3686 typicAl perForMAnce chArActeristics 3.3VOUT Typical Minimum Input Voltage 7 6 5 VIN (V) 4 3 2 1 0 1 10 ILOAD (mA) 3686 G18 TA = 25°C unless otherwise noted. 5VOUT Typical Minimum Input Voltage 8 7 MODE < 0.4 MODE > 0.8 VSW 2V/DIV IL 200mA/DIV Continuous Mode Waveform MODE < 0.4 VIN (V) MODE > 0.8 6 5 4 3 2 VOUT = 3.3V L = 15µH f = 1MHz 100 1000 1 0 1 10 ILOAD (mA) 3686 G19 200ns/DIV VIN = 10V VOUT = 3.3V L = 6.8µH f = 2MHz COUT = 22µF ILOAD = 200mA 3686 G20 VOUT = 5V L = 22µH f = 1MHz 100 1000 Light Load Discontinuous Mode Waveform Fixed Frequency No Load Waveform VSW 2V/DIV IL 200mA/DIV 200ns/DIV VIN = 10V VOUT = 3.3V L = 6.8µH f = 2MHz COUT = 22µF ILOAD = 25mA 3686 G21 VSW 2V/DIV IL 200mA/DIV 200ns/DIV VIN = 10V VOUT = 3.3V L = 6.8µH f = 2MHz COUT = 22µF ILOAD = 0mA 3686 G22 3686fa  LT3686 pin Functions VIN (Pin 1): The VIN pin supplies current to the LT3686’s internal regulator and to the internal power switch. This pin must be locally bypassed. BD (Pin 2): The BD pin is used to provide current to the internal Boost Schottky diode. Tie this pin to output whenever possible. When the MODE pin is greater than 0.8V, the LT3686 will prevent pulse-skipping at light loads by regulating an active load on the BD pin; see the Applications Information section Fixed Frequency at Light Load. FB (Pin 3): The LT3686 regulates its feedback pin to 0.8V. Connect the feedback resistor divider tap to this pin. Set the output voltage according to VOUT = 0.8(1 + R1/R2). A good value for R2 is 10k. SS (Pin 4): Provides Soft-Start and Tracking. An internal 2µA current source tied to a 2.5V reference supplies current to this pin to charge an external capacitor to create a voltage ramp at the pin. Feedback voltage and switching frequency both track SS voltage. Feedback voltage stops tracking at 0.8V. SS is reset under all fault conditions. Float the pin if soft-start feature is not being used. RT (Pin 5): The RT pin is used to program the oscillator frequency. Select the value of RT resistor according to Table 1 in the applications section of the data sheet. EN/UVLO (Pin 6): The EN/UVLO pin is used to start up the LT3686. Pull the pin below 0.4V to shutdown the LT3686. The 1.27V threshold can function as an accurate undervoltage lockout (UVLO), preventing the regulator from operating until the input voltage has reached the programmed level. Do not drive the EN/UVLO pin above VIN. MODE (Pin 7): The MODE pin acts as mode select for the BD active load; when it is tied high, the LT3686 will prevent pulse skipping at light loads by regulating an active load on the BD pin. To disable the active load, tie MODE to GND. BOOST (Pin 8): The BOOST pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar NPN power switch. DA (Pin 9): Connect catch diode (D1) anode to this pin. SW (Pin 10): The SW pin is the output of the internal power switch. Connect this pin to the inductor, catch diode and boost capacitor. GND (Exposed Pad Pin 11): The exposed pad GND pin is the only ground connection for the device. The exposed pad should be soldered to a large copper area to reduce thermal resistance. 3686fa  LT3686 block DiAgrAM BOOST VIN R4 C2 EN/ULVO 1.27V BD R1 FB SS C4 0.8V DA OSC FREQUENCY FOLDBACK GND RT R3 MODE 3686 BD VIN OFF ON R5 INT REG UVLO OVLO DRIVER Q1 SW C3 L1 VOUT C1 R2 – + + D1 gm ACTIVE LOAD VC SLOPE COMP R S Q Q 3686fa  LT3686 operAtion The LT3686 is a current mode step-down regulator. The EN/UVLO pin is used to place the LT3686 in shutdown. The 1.27V threshold on the EN/UVLO pin can be programmed by an external resistor divider (R4, R5) to disable the LT3686. When the EN/UVLO pin is driven above 1.27V, an internal regulator provides power to the control circuitry. This regulator includes both overvoltage and undervoltage lockout to prevent switching when VIN is more than 37V or less than 3.6V. Tracking soft-start is implemented by providing constant current via the SS pin to an external soft-start capacitor (C4) to generate a voltage ramp. FB voltage is regulated to the voltage at the SS pin until it exceeds 0.8V; FB is then regulated to the reference 0.8V. Soft-start also reduces the oscillator frequency to avoid hitting current limit during start-up. The SS capacitor is reset during fault events such as overvoltage, undervoltage, thermal shutdown and startup. An oscillator is programmed by resistor RT. The oscillator sets an RS flip-flop, turning on the internal 1.2A power switch Q1. An amplifier and comparator monitor the current flowing between the VIN and SW pins, turning the switch off when this current reaches a level determined by the voltage at VC. An error amplifier measures the output voltage through an external resistor divider tied to the FB pin and servos the VC node. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. An active clamp (not shown) on the VC node provides current limit. The switch driver operates from either VIN or from the BOOST pin. An external capacitor and the internal boost diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to fully saturate the internal bipolar NPN power switch for efficient operation. A comparator monitors the current flowing through the catch diode via the DA pin and reduces the LT3686’s operating frequency when the DA pin current exceeds the 1.7A valley current limit. This helps to control the output current in fault conditions such as shorted output with high input voltage. The DA comparator works in conjunction with the switch peak current limit comparator to determine the maximum deliverable current of the LT3686. The active load is enabled when MODE is tied above 0.8V and disabled when the MODE pin is below 0.4V. To use the active load, the BD pin should be tied to VOUT. The LT3686 will prevent pulse skipping at light loads by regulating the active load. The active load will assist startup by guaranteeing a minimum load to charge the boost capacitor. It also hastens the recharge of boost capacitor when operating beyond maximum duty cycle. The active load works only when the BD pin is less than 5.2V. 3686fa  LT3686 ApplicAtions inForMAtion FB Resistor Network The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the 1% resistors according to: ⎛V ⎞ R1= R2 ⎜ OUT – 1⎟ ⎝ 0.8V ⎠ R2 should be 20k or less to avoid bias current errors. Reference designators refer to the Block Diagram. Programmable Undervoltage Lockout The EN/UVLO pin can be programmed by an external resistor divider between VIN and the EN/UVLO pin. Choose the resistors according to: V  R4 = R5  IN – 1  1.27V  R4 also sets the hysteresis voltage for the programmable UVLO: Hysteresis = R4 • 2.4µA Once VIN drops below the programmed voltage, the LT3686 will enter a low quiescent current state (IQ ≈ 15µA). To shutdown the LT3686 completely (IQ < 2µA), reduce EN/ UVLO pin voltage to below 0.4V. 10000 45 40 35 EN/UVLO (µA) 30 25 20 15 10 5 0 0 10 20 30 EN/UVLO (V) 40 50 3686 F02 Figure 2. EN/UVLO Pin Current Input Voltage Range The input voltage range for the LT3686 applications depends on the output voltage and on the absolute maximum ratings of the VIN and BOOST pins. The minimum input voltage is determined by either the LT3686’s minimum operating voltage of 3.6V, or by its maximum duty cycle. The duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: DC = VOUT + VD VIN – VSW + VD 1000 100 IQ (µA) Where VD is the forward voltage drop of the catch diode (~0.4V) and VSW is the voltage drop of the internal switch (~0.67V at maximum load). This leads to a minimum input voltage of: VIN(MIN) = VOUT + VD – VD + VSW DC MAX 10 1 DCMAX can be adjusted with frequency. 0 1 2 3 4 5 EN/UVLO (V) 6 7 8 0.1 3686 F01 The boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to sustain the charge across the boost capacitor. Figure 1. IQ vs VEN/UVLO (VIN = 10V) 3686fa 0 LT3686 ApplicAtions inForMAtion The maximum input voltage is determined by the absolute maximum ratings of the VIN and BOOST pins. For fixed frequency operation, the maximum input voltage is determined by the minimum duty cycle DCMIN: VIN(MAX) = VOUT + VD – VD + VSW DCMIN When the required on time decreases below the typical minimum on time of 100ns, instead of the switch pulse width becoming narrower to accommodate the lower duty cycle requirement, the switch pulse width remains fixed at 100ns. The inductor current ramps up to a value exceeding the load current and the output ripple increases. The part then remains off until the output voltage dips below the programmed value before it begins switching again (Figure 4). Provided that the load can tolerate the increased output voltage ripple and that the components have been properly selected, operation while pulse skipping is safe and will not damage the part. As the input voltage increases, the inductor current ramps up quicker, the number of skipped pulses increases, and the output voltage ripple increases. Inductor current may reach current limit when operating in pulse skip mode with small valued inductors. In this case, the LT3686 will periodically reduce its frequency to keep the inductor valley current to 1.7A (Figure 5). Peak DCMIN can be adjusted with frequency. Note that this is a restriction on the operating input voltage for fixed frequency operation; the circuit will tolerate transient inputs up to the absolute maximum ratings of the VIN and BOOST pins. Minimum On Time As the input voltage is increased, the LT3686 is required to switch for shorter periods of time. Delays associated with turning off the power switch dictate the minimum on time of the part. The minimum on time for the LT3686 is 100ns (Figure 3). VSW 10V/DIV VSW 20V/DIV IL 500mA/DIV VOUT 100mV/DIV AC VIN = 18V VOUT = 3.3V L = 6.8µH COUT = 22µF ILOAD = 1.2mA IL 500mA/DIV VOUT 100mA/DIV AC 500ns/DIV 3686 F03 2µs/DIV VIN = 35V VOUT = 3.3V L = 6.8µH COUT = 22µF IOUT = 300mA 3686 F04 Figure 3. Continuous Mode Operation Near Minimum On Time Figure 4. Pulse Skip Occurs When Required On Time Is Below 100ns 3686fa  LT3686 ApplicAtions inForMAtion inductor current is therefore peak current plus minimum switch delay: 1.7A + (VIN – VOUT)/L • 100ns VSW 10V/DIV Table 1. RT vs Frequency FREQUENCY (MHz) 2.5 2.3 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 0.3 RT (kΩ) 9.51 12.38 15.8 20 25.32 31.95 40.85 52.7 69.9 98.6 151.6 280.8 IL 500mA/DIV VOUT 100mA/DIV AC VIN = 35V VOUT = 3.3V L = 6.8µH COUT = 22µF IOUT = 1.2A 2µs/DIV 3686 F05 Figure 5. Pulse Skip with Large Load Current Will Be Limited by the DA Valley Current Limit. Notice the Flat Inductor Valley Current and Reduced Switching Frequency 300 250 200 RT (k ) 150 100 50 0 The part is robust enough to survive prolonged operation under these conditions as long as the peak inductor current does not exceed 2A. Inductor current saturation and junction temperature may further limit performance during this operating regime. Frequency Selection The maximum frequency that the LT3686 can be programmed to is 2.5MHz. The minimum frequency that the LT3686 can be programmed to is 300kHz. The switching frequency is programmed by tying a 1% resistor from the RT pin to ground. Table 1 can be used to select the value of RT. Minimum on-time and edge loss must be taken into consideration when selecting the intended frequency of operation. Higher switching frequency increases power dissipation and lowers efficiency. Finite transistor bandwidth limits the speed at which the power switch can be turned on and off, effectively setting the minimum on-time of the LT3686. For a given output voltage, the minimum on-time determines the maximum input voltage to remain in continuous mode operation outlined in the Minimum On Time section of the data sheet. Finite transition time results in a small amount of power dissipation each time the power switch turns on and off (edge loss). Edge loss increases with frequency, switch current, and input voltage. 0 0.5 1 1.5 FREQUENCY (MHz) 2 2.5 3686 F06a Figure 6a. Switching Frequency vs RT 40 35 30 INDUCTANCE (µH) 25 20 15 10 5 0 0.25 0.75 1.25 1.75 FREQUENCY (MHz) 2.25 3686 F06b 5VOUT 12VOUT 3.3VOUT Figure 6b. Suggested Inductance vs Frequency 3686fa  LT3686 ApplicAtions inForMAtion The MODE pin serves as mode select for the BD active load circuit. The active load is enabled when MODE is tied high and disabled when MODE is tied low. See Fixed Frequency at Light Load section. Inductor Selection and Maximum Output Current A good first choice for the inductor value is: L= 4(VOUT + VD) f Catch Diode A low capacitance 1-2A Schottky diode is recommended for the catch diode, D1. The diode must have a reverse voltage rating equal to or greater than the maximum input voltage. The MBRM140 is a good choice; it is rated for 1A continuous forward current and a maximum reverse voltage of 40V. Input Capacitor Bypass the input of the LT3686 circuit with a 2.2μF or higher value ceramic capacitor of X7R or X5R type. Y5V types have poor performance over temperature and applied voltage and should not be used. A 2.2μF ceramic is adequate to bypass the LT3686 and will easily handle the ripple current. However, if the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage ripple at the LT3686 and to force this very high frequency switching current into a tight local loop, minimizing EMI. A 2.2μF capacitor is capable of this task, but only if it is placed close to the LT3686 and the catch diode (see the PCB Layout section). A second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT3686. A ceramic input capacitor combined with trace or cable inductance forms where VD is the voltage drop of the catch diode (~0.4V), L is in μH, frequency is in MHz. With this value there will be no subharmonic oscillation. The inductor’s RMS current rating must be greater than the maximum load current and its saturation current should be about 30% higher. For robust operation during fault conditions, the saturation current should be above 2A. To keep efficiency high, the series resistance (DCR) should be less than 0.1Ω. Table 2 lists several vendors and types that are suitable. There are several graphs in the Typical Performance Characteristics section of this data sheet that show the maximum load current as a function of input voltage and inductor value for several popular output voltages. Low inductance may result in discontinuous mode operation, which is okay, but further reduces maximum load current. For details of the maximum output current and discontinuous mode operation, see Linear Technology Application Note 44. Table 2 VENDOR Sumida URL www.sumida.com PART SERIES CDRH4D28 CDRH5D28 CDRH8D28 A916CY D585LC WE-TPC(M) WE-PD2(M) WE-PD(S) INDUCTANCE RATE (µH) 1.2 to 4.7 2.5 to 10 2.5 to 33 2 to 12 1.1 to 39 1 to 10 2.2 to 22 1 to 27 SIZE (mm) 4.5 × 4.5 5.5 × 5.5 8.3 × 8.3 6.3 × 6.2 8.1 × 8 4.8 × 4.8 5.2 × 5.8 7.3 × 7.3 Toko Würth Elektronik www.toko.com www.we-online.com 3686fa  LT3686 ApplicAtions inForMAtion a high quality (underdamped) tank circuit. If the LT3686 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT3686’s voltage rating. This situation is easily avoided; see the Hot-Plugging Safely section. Output Capacitor The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT3686 to produce the DC output. In this role it determines the output ripple so low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT3686’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. A good value is: C OUT = 145 VOUT • f response. Transient performance can be improved with a high value capacitor, but a phase lead capacitor across the feedback resistor, R1, may be required to get the full benefit (see the Compensation section). For small size, the output capacitor can be chosen according to: C OUT = 83 VOUT • f where COUT is in μF and frequency is in MHz. However, using an output capacitor this small results in an increased loop crossover frequency and increased sensitivity to noise, requiring careful PCB design. High performance electrolytic capacitors can be used for the output capacitor. Low ESR is important, so choose one that is intended for use in switching regulators. The ESR should be specified by the supplier and should be 0.1Ω or less. Such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low ESR. Table 3 lists several capacitor vendors. where COUT is in μF and frequency is in MHz. Use an X5R or X7R type and keep in mind that a ceramic capacitor biased with VOUT will have less than its nominal capacitance. This choice will provide low output ripple and good transient Table 3 VENDOR Panasonic PHONE (714) 373-7366 URL PART SERIES Ceramic Polymer Tantalum Ceramic Tantalum Ceramic Polymer Tantalum Ceramic Ceramic Tantalum Ceramic COMMENTS EEF Series T494, T495 www.panasonic.com Kemet Sanyo (864) 963-6300 (408) 794-9714 www.kemet.com www.sanyovideo.com POSCAP Murata AVX Taiyo Yuden (404) 436-1300 www.murata.com www.avxcorp.com TPS Series (864) 963-6300 www.taiyo-yuden.com 3686fa  LT3686 ApplicAtions inForMAtion Figure 7 shows the transient response of the LT3686 with several output capacitor choices. The output is 3.3V. The load current is stepped from 0.25A to 1A and back to 0.25A, and the oscilloscope traces show the output voltage. The upper photo shows the recommended value. The second photo shows the improved response (less voltage drop) resulting from a larger output capacitor and a phase lead capacitor. The last photo shows the response to a high performance electrolytic capacitor. Transient performance is improved due to the large output capacitance. MODE < 0.4V VOUT 32.4k FB 10k 22µF IL 500mA/DIV VOUT 50mV/DIV AC 3686 F07a BOOST and BD Pin Considerations Capacitor C3 and the internal boost diode are used to generate a boost voltage that is higher than the input voltage. In most cases a 0.22μF capacitor will work well. Figure 8 shows two ways to arrange the boost circuit. The BOOST pin must be at least 2.2V above the SW pin for best efficiency. For outputs of 3V and above, the standard circuit (Figure 8a) is best. For outputs less than 3V and above 2.5V, place a discrete Schottky diode (such as the MODE > 0.8V IL 500mA/DIV VOUT 50mV/DIV AC 20µs/DIV 3686 F07b 20µs/DIV 3686 F07c VOUT 32.4k FB 10k 47pF 22µF ×2 IL 500mA/DIV VOUT 50mV/DIV AC 3686 F07d IL 500mA/DIV VOUT 50mV/DIV AC 20µs/DIV 3686 F07e 20µs/DIV 3686 F07f VOUT 32.4k FB 10k + 100µF SANYO 4TPB100M 3686 F07g IL 500mA/DIV VOUT 50mV/DIV AC 20µs/DIV 3686 F07h IL 500mA/DIV VOUT 50mV/DIV AC 20µs/DIV 3686 F07i Figure 7. Transient Load Response of the LT3686 with Different Output Capacitors as the Load Current Is Stepped from 0.25A to 1A. VIN = 12V, VOUT = 3.3V, L = 6.8µH , Frequency = 2MHz 3686fa  LT3686 ApplicAtions inForMAtion BAT54) in parallel with the internal diode to reduce VD. The following equations can be used to calculate and minimize boost capacitance in μF: CBOOST = 0.065 (VBD + VCATCH – VD − 2.2) • f the optimal boost capacitor for the chosen BD voltage. The absence of BD voltage during startup will increase minimum voltage to start and reduce efficiency. You must also be sure that the maximum voltage rating of BOOST pin is not exceeded. The BD pin can also be tied to VIN (Figure 8c) but VIN will be limited to 25V and the active load circuit is automatically disabled. The minimum operating voltage of an LT3686 application is limited by the undervoltage lockout (3.6V) and by the maximum duty cycle as outlined above. For proper start-up, the minimum input voltage is also limited by the boost circuit. If the input voltage is ramped slowly, or VD is the forward drop of the boost diode, VCATCH is the forward drop of the catch diode (D1), and frequency is in MHz. For lower output voltages the BD pin can be tied to an external voltage source with adequate local bypassing (Figure 8b). The above equations still apply for calculating BD LT3686 VIN VIN BOOST SW VOUT GND DA 8a VDD VBOOST – VSW ≅ VOUT MAX VBOOST ≅ VIN + VOUT BD LT3686 VIN VIN BOOST SW VOUT GND DA 8b VBOOST – VSW ≅ VDD MAX VBOOST ≅ VIN + VDD BD LT3686 VIN VIN BOOST SW VOUT GND DA 8c VBOOST – VSW ≅ VIN MAX VBOOST ≅ 2VIN 3686 F08 Figure 8 3686fa  LT3686 ApplicAtions inForMAtion the LT3686 is turned on with its EN/UVLO pin when the output is already in regulation, then the boost capacitor may not be fully charged. Because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. This minimum load will depend on the input and output voltages, and on the arrangement of the boost circuit. The minimum load generally goes to zero once the circuit has started. Figure 9 shows plots of minimum load to start and to run as a function of input voltage. In many cases 7 6 5 VIN (V) VIN (V) START RUN SUSTAIN 1 10 ILOAD (mA) 3686 F09a the discharged output capacitor will present a load to the switcher which will allow it to start. At light loads, the inductor current becomes discontinuous and the effective duty cycle can be very high. This reduces the minimum input voltage to approximately 400mV above VOUT. At higher load currents, the inductor current is continuous and the duty cycle is limited by the maximum duty cycle, requiring a higher input voltage to maintain regulation. As the LT3686 enters dropout, the boost capacitor voltage will be limited by VOUT, which is fixed by the maximum duty cycle. If the boost capacitor’s voltage during dropout falls 9 8 7 6 5 4 3 2 1 0 1 10 ILOAD (mA) 3686 F09b 4 3 2 1 0 100 START RUN SUSTAIN 100 1000 1000 Figure 9a. Typical Minimum Input Voltage, VOUT = 3.3V, f = 1MHz, L = 15µH, Mode < 0.4V 7 6 5 VIN (V) 4 3 2 1 0 1 10 ILOAD (mA) 3686 F09c Figure 9b. Typical Minimum Input Voltage, VOUT = 5V, f = 1MHz, L = 22µH, Mode < 0.4V 8 7 6 RUN VIN (V) 5 4 3 2 1 100 1000 0 1 10 ILOAD (mA) 3686 F09d RUN 100 1000 Figure 9c. Typical Minimum Input Voltage, VOUT = 3.3V, f = 1MHz, L = 15µH, Mode > 0.8V Figure 9d. Typical Minimum Input Voltage, VOUT = 5V, f = 1MHz, L = 22µH, Mode > 0.8V 3686fa  LT3686 ApplicAtions inForMAtion below the minimum voltage to sustain boosted operation (2.2V across the boost capacitor), the output voltage will fall suddenly to: VOUT = (VIN – 2.2) • DCMAX Figure 9 shows the minimum VIN necessary to sustain boosted operation during dropout. Once VIN drops below the sustain voltage, VIN will need to reach the start voltage again to refresh the boost capacitor. The programmable undervoltage lockout (UVLO) function can be used to avoid operating unless VIN is greater than the start voltage. Fixed Frequency at Light Load The LT3686 contains unique active load circuitry to allow for full frequency switching at very light loads. To enable the active load, tie the MODE pin to greater than 0.8V. Typical fixed frequency nonsynchronous buck regulators skip pulses at light loads. With a fixed input voltage, as the load current decreases in discontinuous mode, the regulator is required to switch for shorter periods of time. When the required on time decreases below the typical minimum on time, the regulator skips one or more pulses so the effective average duty cycle is equal to the required duty cycle. This likelihood of entering pulse-skipping is exacerbated by the tendency for minimum on time to increase at very light loads. Pulse-skipping is undesirable because it causes unpredictable, sub-harmonic output ripple that can interfere with the operation of other sensitive components such as AM receivers and audio equipment. The BD active load is designed to combat pulse-skipping by providing an operational regime between full frequency discontinuous and pulse-skipping modes. The maximum VIN before pulse-skipping in discontinuous mode is directly dependent on load current; as the load decreases, so does the pulse-skipping boundary. An artificial load on the output helps push the pulse-skipping boundary higher. The LT3686 achieves this goal by commanding the minimum load necessary to keep itself at full switching frequency, hence the circuitry is called an active load. As the LT3686 approaches minimum on time in discontinuous mode, its power switch transitions smoothly into a fixed on time, fixed frequency open loop current source. Instead of controlling switch current, the internal error amplifier servos the active load on the output via the BD pin to maintain output voltage regulation. The impact on efficiency is mitigated by pulling the minimum current necessary to keep switching at full frequency. The necessary BD load to maintain output regulation depends on VIN, inductor size, and load current. As the necessary BD load increases beyond its 40mA limit, pulse-skipping mode will resume. The BD active load circuitry is enabled when MODE tied high and disabled when MODE is tied low. Even when activated, the active load will shutdown when BD voltage exceeds either 5.2V or VIN in an effort to minimize power dissipation and intelligently react to external configurations. To address the startup concerns delineated in the BOOST and BD Pin Considerations section, the active load will assist startup by pulling maximum current (40mA) to charge the boost capacitor voltage in the absence of an adequate load. An internal power good circuit will disable the BD active load when VFB reaches 0.7V. Figure 9 compares plots of minimum input voltage to start and run as a function of load current. In many cases the discharged output capacitor will present a load to the switcher which will allow it to start. The plots show the worst-case situation where VIN is ramping very slowly. The active load also activates to hasten the recharge of boost cap when operating beyond maximum duty cycle. When not in use, the active load pulls no current. 40 35 30 25 VIN (V) 20 15 10 5 0 0 20 40 60 80 IOUT (mA) 100 120 140 3686 F10 PULSE-SKIPPING ACTIVE LOAD DCM CCM Figure 10. Regions of Operation (5VOUT, 2MHz) 3686fa  LT3686 ApplicAtions inForMAtion Soft-Start The SS pin is used to soft-start the LT3686, eliminating input current surge during start-up. It can also be used to track another voltage in the system (Figure 11). An internal 2µA current source charges an external softstart capacitor to generate a voltage ramp. FB voltage is regulated to the voltage at the SS pin until it exceeds 0.8V, FB is then regulated to the reference 0.8V. Soft-start also reduces the oscillator frequency to avoid hitting current limit during start-up. Figure 12 shows the start-up waveforms with and without the soft-start circuit. VOUT 2V/DIV VSS 500mV/DIV 1ms/DIV 3686 F11 Figure 11. LT3686 Configured to Track Voltage on SS Pin VSW 10V/DIV SS GND IL 500mA/DIV VOUT 2V/DIV VIN = 10V VOUT = 3.3V L = 6.8µH COUT = 22µF CSS = 0 5µs/DIV VSW 10V/DIV SS 1.2nF GND IL 500mA/DIV VOUT 2V/DIV VIN = 10V VOUT = 3.3V L = 6.8µH COUT = 22µF CSS = 1.2nF 50µs/DIV 3686 F12 Figure 12. To Soft-Start the LT3686, Add a Capacitor to the SS Pin 3686fa  LT3686 ApplicAtions inForMAtion Short and Reverse Protection If the inductor is chosen so that it won’t saturate excessively, the LT3686 will tolerate a shorted output. When operating in short-circuit condition, the LT3686 will reduce its frequency until the valley current is 1.7A (Figure 13). There is another situation to consider in systems where the output will be held high when the input to the LT3686 is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ORed with the LT3686’s output. If the VIN pin is allowed to float and the EN/UVLO pin is held high (either by a logic signal or because it is tied to VIN), then the LT3686’s internal circuitry will pull its quiescent current through its SW pin. This is fine if your system can tolerate a few mA in this state. If you ground the EN/UVLO pin, the SW pin current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, then parasitic diodes inside the LT3686 can VSW 20V/DIV pull large currents from the output through the SW pin and the VIN pin. Figure 14 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LT3686 circuits. However, these capacitors can cause problems if the LT3686 are plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the VIN pin of the LT3686 can ring to twice the nominal input voltage, possibly exceeding the LT3686’s rating and damaging the part. If the input supply is poorly controlled or the user will be plugging the LT3686 into an energized LT3686 BD BOOST EN/UVLO SW VOUT VIN VIN IL 500mA/DIV 2µs/DIV VIN = 35V L = 6.8µH COUT = 22µF RT = 17.4k VOUT = 0V 3686 F13 MODE SS RT GND DA FB 3686 F14 Figure 13. The LT3686 Reduces its Frequency from 2MHz to 160kHz to Protect Against Shorted Output Figure 14. Input Diode Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output; it Also Protects the Circuit from a Reversed Input. The LT3686 Runs Only When the Input is Present 3686fa 0 LT3686 ApplicAtions inForMAtion supply, the input network should be designed to prevent this overshoot. Figure 15 shows the waveforms that result when an LT3686 circuit is connected to a 24V supply through six feet of 24-gauge twisted pair. The first plot is the response with a 2.2μF ceramic capacitor at the input. The input voltage rings as high as 35V and the input current peaks at 20A. One method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. In Figure 15b an aluminum electrolytic capacitor has been added. This capacitor’s high equivalent series resistance damps the circuit and eliminates the voltage CLOSING SWITCH SIMULATES HOT PLUG IIN VIN overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. An alternative solution is shown in Figure 15c. A 1Ω resistor is added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). A 0.1μF capacitor improves high frequency filtering. This solution is smaller and less expensive than the electrolytic capacitor. For high input voltages its impact on efficiency is minor, reducing efficiency less than one half percent for a 5V output at full load operating from 24V. + LT3686 2.2µF VIN 20V/DIV DANGER! RINGING VIN MAY EXCEED ABSOLUTE MAXIMUM RATING OF THE LT3686 LOW IMPEDANCE ENERGIZED 24V SUPPLY STRAY INDUCTANCE DUE TO 6 FEET (2 METERS) OF TWISTED PAIR IIN 5A/DIV 20µs/DIV (15a) LT3686 2.2µF IIN 5A/DIV VIN 20V/DIV + 10µF 35V AI.EI. + (15b) 1 LT3686 2.2µF IIN 5A/DIV VIN 20V/DIV 20µs/DIV + 0.1µF (15c) 20µs/DIV 3686 F15 Figure 15. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures Reliable Operation When the LT3686 Is Connected to a Live Supply 3686fa  LT3686 ApplicAtions inForMAtion Frequency Compensation The LT3686 uses current mode control to regulate the output. This simplifies loop compensation. In particular, the LT3686 does not require the ESR of the output capacitor for stability allowing the use of ceramic capacitors to achieve low output ripple and small circuit size. Figure 16 shows an equivalent circuit for the LT3686 control loop. The error amp is a transconductance amplifier with finite output impedance. The power section, consisting of the modulator, power switch and inductor, is modeled as a transconductance amplifier generating an output current proportional to the voltage at the VC node. Note that the output capacitor integrates this current, and that the capacitor on the VC node (CC) integrates the error amplifier output current, resulting in two poles in the loop. RC provides a zero. With the recommended output capacitor, the loop LT3686 1V CURRENT MODE POWER STAGE gm = 2A/V SW R1 FB ESR 800mV CPL OUT crossover occurs above the RCCC zero. This simple model works well as long as the value of the inductor is not too high and the loop crossover frequency is much lower than the switching frequency. With a larger ceramic capacitor (very low ESR), crossover may be lower and a phase lead capacitor (CPL) across the feedback divider may improve the phase margin and transient response. Large electrolytic capacitors may have an ESR large enough to create an additional zero, and the phase lead may not be necessary. If the output capacitor is different than the recommended capacitor, stability should be checked across all operating conditions, including load current, input voltage and temperature. The LT1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. VC RC 160k CC 100pF GND gm = 200µA/V ERROR AMPLIFIER 1M Figure 16. Model for Loop Response  – + + – + R2 C1 C1 3686 F16 3686fa LT3686 ApplicAtions inForMAtion PCB Layout For proper operation and minimum EMI, care must be taken during printed circuit board layout. Figure 17 shows the recommended component placement with trace, ground plane and via locations. Note that large, switched currents flow in the LT3686’s VIN and SW pins, the catch diode (D1) and the input capacitor (C2). The loop formed by these components should be as small as possible and tied to system ground in only one place. These components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. Place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location, ideally at the ground terminal of the output capacitor C1. The SW and BOOST nodes should be as small as possible. Finally, keep the FB node small so that the ground pin and ground traces will shield it from the SW and BOOST nodes. Include vias near the exposed GND pad of the LT3686 to help remove heat from the LT3686 to the ground plane. High Temperature Considerations The die temperature of the LT3686 must be lower than the maximum rating of 125°C. For high ambient temperatures, care should be taken in the layout of the circuit to ensure good heat sinking of the LT3686. The maximum load current should be derated as the ambient temperature approaches the maximum allowed junction temperature. OUT SW C2 D1 BD VIN DA BST FB SS RT UVLO MODE 3686 F17 Figure 17. PCB Layout 3686fa  LT3686 ApplicAtions inForMAtion The die temperature is calculated by multiplying the LT3686 power dissipation by the thermal resistance from junction to ambient. Power dissipation within the LT3686 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the catch diode loss. The resulting temperature rise at full load is nearly independent of input voltage. Thermal resistance depends on the layout of the circuit board, but 43°C/W is typical for the (3mm × 3mm) DFN package. Outputs Greater Than 19V Note that for outputs above 19V, the input voltage range will be limited by the maximum rating of the BOOST pin. The sum of input and output voltages cannot exceed the BOOST pin’s 50V rating. The 25V circuit (Figure 18) shows how to overcome this limitation using an additional Zener diode. Other Linear Technology Publications Application Notes 19, 35 and 44 contain more detailed descriptions and design information for Buck regulators and other switching regulators. The LT1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. Design Note 100 shows how to generate a bipolar output supply using a buck regulator. VIN 30V TO 36V 2.2µF 15V VIN EN/UVLO MODE SS LT3686 BD BOOST 0.22µF SW 100µH 0.22µF VOUT 500mA 100nF RT GND 61.9k DA FB 10k 301k 10µF 3686 F18 Figure 18. 25V Step-Down Converter 3686fa  LT3686 typicAl ApplicAtions 0.8V Step-Down Converter VIN 3.6V TO 25V VIN 5V TO 37V VIN 2.2µF EN/UVLO LT3686 MODE SS 1nF RT GND 61.9k 3686 TA02a 3.3V Step-Down Converter VIN 2.2µF EN/UVLO LT3686 MODE VOUT 0.8V 1.2A SS 1nF RT GND 61.9k 100µF 3686 TA02b BD BOOST SW 0.22µF 15µH VOUT 3.3V 1.2A 31.6k 10k 22µF BD BOOST SW 0.22µF 4.7µF DA FB DA FB 1.8V Step-Down Converter VIN 3.6V TO 25V 3.3V Step-Down Converter with Programmed UVLO VIN 7.5V TO 37V VIN 500k EN/UVLO VOUT 1.8V 1.2A 12.4k 10k 3686 TA02c BD LT3686 BOOST SW 0.22µF 15µH VOUT 3.3V 1.2A 31.6k 10k 22µF VIN 2.2µF EN/UVLO LT3686 MODE SS 1nF RT GND 61.9k BD BOOST SW 0.22µF 6.8µH 2.2µF 100k DA FB MODE SS DA FB GND 47µF 1nF RT 61.9k 3686 TA02d 2.5V Step-Down Converter VIN 3.6V TO 25V VIN 7V TO 37V VIN 2.2µF EN/UVLO LT3686 MODE SS 1nF RT GND 61.9k SW BD BOOST 0.22µF 10µH VOUT 2.5V 1.2A 21.5k 5V Step-Down Converter VIN 2.2µF EN/UVLO LT3686 MODE SS 1nF RT GND 61.9k 10k 3686 TA02e BD BOOST SW 0.22µF 22µH VOUT 5V 1.2A 52.3k 10k 3686 TA02f DA FB DA FB 15µF 33µF 3686fa  LT3686 pAckAge Description (Reference LTC DWG # 05-08-1699 Rev B) DD Package 10-Lead Plastic DFN (3mm × 3mm) 0.70 0.05 3.55 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) R = 0.125 TYP 6 0.40 10 0.10 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 1.65 0.10 (2 SIDES) 5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES) 1 (DD) DFN REV B 0309 0.25 0.05 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3686fa  LT3686 revision history REV A DATE 1/10 DESCRIPTION Revised Features Section Updated Electrical Characteristics (Feedback Voltage) PAGE NUMBER 1 3 3686fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.  LT3686 relAteD pArts PART NUMBER LT3689 DESCRIPTION 36V, 60V Transient Protection, 800mA, 2.2MHz, High Efficiency MicroPower Step-Down DC/DC Converter with POR Reset and Watchdog Timer 36V, 60VMAX, 1A, 2.2MHz, High Efficiency MicroPower Step-Down DC/DC Converter 40V, 350mA (IOUT), 2.2MHz, High Efficiency Step-Down DC/DC Converter with Only 2.5µA of Quiescent Current 36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz, High Efficiency Step-Down DC/DC Converter with Burst Mode® Operation 36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz, High Efficiency Step-Down DC/DC Converter 34V with Transient Protection to 36V, 2A (IOUT), 2.8MHz, High Efficiency Step-Down DC/DC Converter with Burst Mode Operation 34V with Transient Protection to 36V, 2A (IOUT), 2.8MHz, High Efficiency Step-Down DC/DC Converter 36V with Transient Protection to 40V, Dual 1.4A (IOUT), 3MHz, High Efficiency Step-Down DC/DC Converter 36V with Transient Protection to 40V, 1.4A (IOUT), 3MHz, High Efficiency Step-Down DC/DC Converter 36V, 40VMAX, 2A, 2.5MHz, High Efficiency Step-Down DC/DC Converter and LDO Controller 36V, 2.5MHz Triple (2.4A + 1.5A +1.5A (IOUT)) with LDO Controller High Efficiency Step-Down DC/DC Converter 60V, 400mA (IOUT), MicroPower Step-Down DC/DC Converter with Burst Mode Operation 60V, 1.2A (IOUT), 200/500kHz, High Efficiency Step-Down DC/DC Converter with Burst Mode Operation 60V, 2.4A (IOUT), 200/500kHz, High Efficiency Step-Down DC/DC Converter with Burst Mode Operation 36V, 1.4A (IOUT), 500kHz, High Efficiency Step-Down DC/DC Converter 36V, 1.4A (IOUT), 750kHz, High Efficiency Step-Down DC/DC Converter 60V, 1.2A (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter COMMENTS VIN: 3.6V to 36V Transient to 60V, VOUT(MIN) = 0.8V, IQ = 75µA, ISD